summaryrefslogtreecommitdiff
path: root/firmware/drivers/audio/uda1380.c
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/drivers/audio/uda1380.c')
-rw-r--r--firmware/drivers/audio/uda1380.c43
1 files changed, 7 insertions, 36 deletions
diff --git a/firmware/drivers/audio/uda1380.c b/firmware/drivers/audio/uda1380.c
index efe02caca8..11a0604a1b 100644
--- a/firmware/drivers/audio/uda1380.c
+++ b/firmware/drivers/audio/uda1380.c
@@ -18,15 +18,16 @@
18 * KIND, either express or implied. 18 * KIND, either express or implied.
19 * 19 *
20 ****************************************************************************/ 20 ****************************************************************************/
21#include <string.h>
22
23#include "config.h"
21#include "logf.h" 24#include "logf.h"
22#include "system.h" 25#include "system.h"
23#include "string.h"
24#include "audio.h" 26#include "audio.h"
25#include "debug.h" 27#include "debug.h"
28#include "udacodec.h"
26 29
27#include "i2c-coldfire.h"
28#include "audiohw.h" 30#include "audiohw.h"
29#include "pcf50606.h"
30 31
31const struct sound_settings_info audiohw_settings[] = { 32const struct sound_settings_info audiohw_settings[] = {
32 [SOUND_VOLUME] = {"dB", 0, 1, -84, 0, -25}, 33 [SOUND_VOLUME] = {"dB", 0, 1, -84, 0, -25},
@@ -109,13 +110,7 @@ unsigned short uda1380_defaults[2*NUM_DEFAULT_REGS] =
109/* Returns 0 if register was written or -1 if write failed */ 110/* Returns 0 if register was written or -1 if write failed */
110static int uda1380_write_reg(unsigned char reg, unsigned short value) 111static int uda1380_write_reg(unsigned char reg, unsigned short value)
111{ 112{
112 unsigned char data[3]; 113 if (udacodec_write(reg, value) < 0)
113
114 data[0] = reg;
115 data[1] = value >> 8;
116 data[2] = value & 0xff;
117
118 if (i2c_write(I2C_IFACE_0, UDA1380_ADDR, data, 3) != 3)
119 { 114 {
120 DEBUGF("uda1380 error reg=0x%x", reg); 115 DEBUGF("uda1380 error reg=0x%x", reg);
121 return -1; 116 return -1;
@@ -193,23 +188,6 @@ static int audiohw_set_regs(void)
193 return 0; 188 return 0;
194} 189}
195 190
196static void reset(void)
197{
198#ifdef IRIVER_H300_SERIES
199 int mask = disable_irq_save();
200 pcf50606_write(0x3b, 0x00); /* GPOOD2 high Z */
201 pcf50606_write(0x3b, 0x07); /* GPOOD2 low */
202 restore_irq(mask);
203#else
204 /* RESET signal */
205 or_l(1<<29, &GPIO_OUT);
206 or_l(1<<29, &GPIO_ENABLE);
207 or_l(1<<29, &GPIO_FUNCTION);
208 sleep(HZ/100);
209 and_l(~(1<<29), &GPIO_OUT);
210#endif
211}
212
213/** 191/**
214 * Sets frequency settings for DAC and ADC relative to MCLK 192 * Sets frequency settings for DAC and ADC relative to MCLK
215 * 193 *
@@ -268,7 +246,7 @@ void audiohw_init(void)
268 recgain_mic = 0; 246 recgain_mic = 0;
269 recgain_line = 0; 247 recgain_line = 0;
270 248
271 reset(); 249 udacodec_reset();
272 250
273 if (audiohw_set_regs() == -1) 251 if (audiohw_set_regs() == -1)
274 { 252 {
@@ -419,20 +397,13 @@ void audiohw_set_recvol(int left, int right, int type)
419 { 397 {
420 /* for this order we can combine both registers, 398 /* for this order we can combine both registers,
421 making the glitch even smaller */ 399 making the glitch even smaller */
422 unsigned char data[5];
423 unsigned short value_dec; 400 unsigned short value_dec;
424 unsigned short value_pga; 401 unsigned short value_pga;
425 value_dec = DEC_VOLL(left) | DEC_VOLR(right); 402 value_dec = DEC_VOLL(left) | DEC_VOLR(right);
426 value_pga = (uda1380_regs[REG_PGA] & ~PGA_GAIN_MASK) 403 value_pga = (uda1380_regs[REG_PGA] & ~PGA_GAIN_MASK)
427 | PGA_GAINL(left_ag) | PGA_GAINR(right_ag); 404 | PGA_GAINL(left_ag) | PGA_GAINR(right_ag);
428 405
429 data[0] = REG_DEC_VOL; 406 if (udacodec_write2(REG_DEC_VOL, value_dec, value_pga) < 0)
430 data[1] = value_dec >> 8;
431 data[2] = value_dec & 0xff;
432 data[3] = value_pga >> 8;
433 data[4] = value_pga & 0xff;
434
435 if (i2c_write(I2C_IFACE_0, UDA1380_ADDR, data, 5) != 5)
436 { 407 {
437 DEBUGF("uda1380 error reg=combi rec gain"); 408 DEBUGF("uda1380 error reg=combi rec gain");
438 } 409 }