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Diffstat (limited to 'firmware/boot.lds')
-rw-r--r--firmware/boot.lds57
1 files changed, 56 insertions, 1 deletions
diff --git a/firmware/boot.lds b/firmware/boot.lds
index a8404134ae..d2ea10a30d 100644
--- a/firmware/boot.lds
+++ b/firmware/boot.lds
@@ -11,6 +11,8 @@ OUTPUT_ARCH(arm)
11INPUT(target/arm/crt0-pp-bl.o) 11INPUT(target/arm/crt0-pp-bl.o)
12#elif defined(OLYMPUS_MROBE_500) 12#elif defined(OLYMPUS_MROBE_500)
13INPUT(target/arm/tms320dm320/crt0.o) 13INPUT(target/arm/tms320dm320/crt0.o)
14#elif defined(CPU_TCC77X)
15INPUT(target/arm/tcc77x/crt0.o)
14#else 16#else
15INPUT(target/arm/crt0.o) 17INPUT(target/arm/crt0.o)
16#endif 18#endif
@@ -77,6 +79,12 @@ INPUT(target/sh/crt0.o)
77#define IRAMSIZE 16K 79#define IRAMSIZE 16K
78#define FLASHORIG 0x0000000 80#define FLASHORIG 0x0000000
79#define FLASHSIZE 1M 81#define FLASHSIZE 1M
82#elif defined(CPU_TCC77X)
83#define DRAMORIG 0x20000000
84#define IRAMORIG 0x00000000
85#define IRAMSIZE 64K
86#define FLASHORIG 0x0000000
87#define FLASHSIZE 1M
80#else 88#else
81#define DRAMORIG 0x09000000 89#define DRAMORIG 0x09000000
82#define IRAMORIG 0x0f000000 90#define IRAMORIG 0x0f000000
@@ -85,7 +93,17 @@ INPUT(target/sh/crt0.o)
85#define FLASHSIZE 256K - ROM_START 93#define FLASHSIZE 256K - ROM_START
86#endif 94#endif
87 95
88#if !defined(CPU_PP) && (CONFIG_CPU!=S3C2440) && (CONFIG_CPU!=IMX31L) 96#if defined(CPU_TCC77X)
97MEMORY
98{
99#ifdef TCCBOOT
100 DRAM : ORIGIN = DRAMORIG + DRAMSIZE - 0x100000, LENGTH = 0x100000
101#else
102 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
103#endif
104 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
105}
106#elif !defined(CPU_PP) && (CONFIG_CPU!=S3C2440) && (CONFIG_CPU!=IMX31L)
89MEMORY 107MEMORY
90{ 108{
91 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE 109 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
@@ -168,6 +186,43 @@ SECTIONS
168 _end = .; 186 _end = .;
169 } 187 }
170} 188}
189#elif defined(CPU_TCC77X)
190{
191 .text : {
192 *(.init.text)
193 *(.text)
194 *(.text*)
195 *(.glue_7)
196 *(.glue_7t)
197 } > DRAM
198
199 .data : {
200 *(.icode)
201 *(.irodata)
202 *(.idata)
203 *(.data*)
204 *(.rodata.*)
205 . = ALIGN(0x4);
206 _dataend = . ;
207 } > DRAM
208
209 .stack :
210 {
211 *(.stack)
212 _stackbegin = .;
213 stackbegin = .;
214 . += 0x2000;
215 _stackend = .;
216 stackend = .;
217 } > DRAM
218 .bss : {
219 _edata = .;
220 *(.bss*);
221 *(.ibss);
222 *(COMMON)
223 _end = .;
224 } > DRAM
225}
171#elif (CONFIG_CPU==DM320) 226#elif (CONFIG_CPU==DM320)
172{ 227{
173 . = DRAMORIG + 0x1000000; 228 . = DRAMORIG + 0x1000000;