diff options
Diffstat (limited to 'firmware/app.lds')
-rw-r--r-- | firmware/app.lds | 575 |
1 files changed, 0 insertions, 575 deletions
diff --git a/firmware/app.lds b/firmware/app.lds deleted file mode 100644 index 5850a35fe1..0000000000 --- a/firmware/app.lds +++ /dev/null | |||
@@ -1,575 +0,0 @@ | |||
1 | #include "config.h" | ||
2 | |||
3 | ENTRY(start) | ||
4 | #ifdef CPU_COLDFIRE | ||
5 | OUTPUT_FORMAT(elf32-m68k) | ||
6 | INPUT(target/coldfire/crt0.o) | ||
7 | #elif defined(CPU_ARM) | ||
8 | OUTPUT_FORMAT(elf32-littlearm) | ||
9 | OUTPUT_ARCH(arm) | ||
10 | #ifdef CPU_PP | ||
11 | INPUT(target/arm/crt0-pp.o) | ||
12 | #elif CONFIG_CPU==DM320 | ||
13 | INPUT(target/arm/tms320dm320/crt0.o) | ||
14 | #elif CONFIG_CPU==S3C2440 | ||
15 | INPUT(target/arm/s3c2440/crt0.o) | ||
16 | #elif defined(CPU_TCC780X) | ||
17 | INPUT(target/arm/tcc780x/crt0.o) | ||
18 | #elif CONFIG_CPU == PNX0101 | ||
19 | INPUT(target/arm/pnx0101/crt0-pnx0101.o) | ||
20 | #elif CONFIG_CPU == IMX31L | ||
21 | INPUT(target/arm/imx31/crt0.o) | ||
22 | #elif defined(CPU_ARM) | ||
23 | INPUT(target/arm/crt0.o) | ||
24 | #endif | ||
25 | #else | ||
26 | OUTPUT_FORMAT(elf32-sh) | ||
27 | INPUT(target/sh/crt0.o) | ||
28 | #endif | ||
29 | |||
30 | #define PLUGINSIZE PLUGIN_BUFFER_SIZE | ||
31 | #define CODECSIZE CODEC_SIZE | ||
32 | |||
33 | #ifdef DEBUG | ||
34 | #define STUBOFFSET 0x10000 | ||
35 | #else | ||
36 | #define STUBOFFSET 0 | ||
37 | #endif | ||
38 | |||
39 | #if CONFIG_CPU==S3C2440 | ||
40 | #include "s3c2440.h" | ||
41 | #define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE | ||
42 | #elif CONFIG_CPU==IMX31L | ||
43 | #include "imx31l.h" | ||
44 | /* Subtract 1MB for the FRAME/TTB section */ | ||
45 | #define DRAMSIZE (MEMORYSIZE * 0x100000 - 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE | ||
46 | #elif CONFIG_CPU==DM320 | ||
47 | #include "dm320.h" | ||
48 | #define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE | ||
49 | #else | ||
50 | #define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE | ||
51 | #endif | ||
52 | |||
53 | #if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300) | ||
54 | #define DRAMORIG 0x31000000 + STUBOFFSET | ||
55 | #define IRAMORIG 0x10000000 | ||
56 | #define IRAMSIZE 0xc000 | ||
57 | #elif defined(IAUDIO_X5) || defined(IAUDIO_M5) | ||
58 | #define DRAMORIG 0x31000000 + STUBOFFSET | ||
59 | #define IRAMORIG 0x10000000 | ||
60 | #define IRAMSIZE 0x10000 | ||
61 | #elif defined(CPU_PP) | ||
62 | #define DRAMORIG 0x00000000 + STUBOFFSET | ||
63 | #define IRAMORIG 0x40000000 | ||
64 | #define IRAMSIZE 0xc000 | ||
65 | #elif CONFIG_CPU==PNX0101 | ||
66 | #define DRAMORIG 0xc00000 + STUBOFFSET | ||
67 | #define IRAM0ORIG 0x000000 | ||
68 | #define IRAM0SIZE 0x7000 | ||
69 | #define IRAMORIG 0x400000 | ||
70 | #define IRAMSIZE 0x7000 | ||
71 | #elif CONFIG_CPU==S3C2440 | ||
72 | #define DRAMORIG 0x00000100 + STUBOFFSET | ||
73 | #define IRAMORIG DRAMORIG | ||
74 | #define IRAM DRAM | ||
75 | #define IRAMSIZE 0x1000 | ||
76 | #elif CONFIG_CPU==DM320 | ||
77 | #define DRAMORIG 0x00900000 + STUBOFFSET | ||
78 | #define IRAMORIG 0x00000000 | ||
79 | #define IRAMSIZE 0x4000 | ||
80 | #elif CONFIG_CPU==IMX31L | ||
81 | #define DRAMORIG (0x0 + STUBOFFSET) | ||
82 | /* #define IRAMORIG 0x1FFFC000 */ | ||
83 | #define IRAMORIG DRAMORIG | ||
84 | #define IRAM DRAM | ||
85 | #define IRAMSIZE 0x4000 | ||
86 | #elif defined(CPU_TCC780X) | ||
87 | #define DRAMORIG 0x20000000 + STUBOFFSET | ||
88 | #define ITCMORIG 0x00000000 | ||
89 | #define ITCMSIZE 0x1000 | ||
90 | #define DTCMORIG 0xA0000000 | ||
91 | #define DTCMSIZE 0x2000 | ||
92 | #define SRAMORIG 0x10000000 | ||
93 | #define SRAMSIZE 0xc000 | ||
94 | #else | ||
95 | #define DRAMORIG 0x09000000 + STUBOFFSET | ||
96 | #define IRAMORIG 0x0f000000 | ||
97 | #define IRAMSIZE 0x1000 | ||
98 | #endif | ||
99 | |||
100 | /* End of the audio buffer, where the codec buffer starts */ | ||
101 | #define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) | ||
102 | |||
103 | /* Where the codec buffer ends, and the plugin buffer starts */ | ||
104 | #define ENDADDR (ENDAUDIOADDR + CODECSIZE) | ||
105 | |||
106 | MEMORY | ||
107 | { | ||
108 | DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE | ||
109 | #if defined(CPU_TCC780X) | ||
110 | /* Seperate data & instruction TCMs plus SRAM. */ | ||
111 | ITCM : ORIGIN = ITCMORIG, LENGTH = ITCMSIZE | ||
112 | DTCM : ORIGIN = DTCMORIG, LENGTH = DTCMSIZE | ||
113 | SRAM : ORIGIN = SRAMORIG, LENGTH = SRAMSIZE | ||
114 | #elif CONFIG_CPU != S3C2440 && CONFIG_CPU != IMX31L | ||
115 | IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE | ||
116 | #endif | ||
117 | #if CONFIG_CPU==PNX0101 | ||
118 | IRAM0 : ORIGIN = IRAM0ORIG, LENGTH = IRAM0SIZE | ||
119 | #endif | ||
120 | } | ||
121 | |||
122 | SECTIONS | ||
123 | { | ||
124 | #if (CONFIG_CPU==DM320) | ||
125 | .text : | ||
126 | { | ||
127 | loadaddress = .; | ||
128 | _loadaddress = .; | ||
129 | . = ALIGN(0x200); | ||
130 | *(.init.text) | ||
131 | *(.text*) | ||
132 | *(.glue_7) | ||
133 | *(.glue_7t) | ||
134 | . = ALIGN(0x4); | ||
135 | } > DRAM | ||
136 | |||
137 | .rodata : | ||
138 | { | ||
139 | *(.rodata) /* problems without this, dunno why */ | ||
140 | *(.rodata*) | ||
141 | *(.rodata.str1.1) | ||
142 | *(.rodata.str1.4) | ||
143 | . = ALIGN(0x4); | ||
144 | |||
145 | /* Pseudo-allocate the copies of the data sections */ | ||
146 | _datacopy = .; | ||
147 | } > DRAM | ||
148 | |||
149 | /* TRICK ALERT! For RAM execution, we put the .data section at the | ||
150 | same load address as the copy. Thus, we don't waste extra RAM | ||
151 | when we don't actually need the copy. */ | ||
152 | .data : AT ( _datacopy ) | ||
153 | { | ||
154 | _datastart = .; | ||
155 | *(.data*) | ||
156 | . = ALIGN(0x4); | ||
157 | _dataend = .; | ||
158 | } > DRAM | ||
159 | |||
160 | /DISCARD/ : | ||
161 | { | ||
162 | *(.eh_frame) | ||
163 | } | ||
164 | |||
165 | .vectors IRAMORIG : | ||
166 | { | ||
167 | _vectorsstart = .; | ||
168 | *(.vectors); | ||
169 | _vectorsend = .; | ||
170 | } > IRAM AT> DRAM | ||
171 | |||
172 | _vectorscopy = LOADADDR(.vectors); | ||
173 | |||
174 | .iram : | ||
175 | { | ||
176 | _iramstart = .; | ||
177 | *(.icode) | ||
178 | *(.irodata) | ||
179 | *(.idata) | ||
180 | . = ALIGN(0x4); | ||
181 | _iramend = .; | ||
182 | } > IRAM AT> DRAM | ||
183 | |||
184 | _iramcopy = LOADADDR(.iram); | ||
185 | |||
186 | .ibss (NOLOAD) : | ||
187 | { | ||
188 | _iedata = .; | ||
189 | *(.ibss) | ||
190 | . = ALIGN(0x4); | ||
191 | _iend = .; | ||
192 | } > IRAM | ||
193 | |||
194 | .stack : | ||
195 | { | ||
196 | *(.stack) | ||
197 | stackbegin = .; | ||
198 | . += 0x2000; | ||
199 | stackend = .; | ||
200 | } > IRAM | ||
201 | |||
202 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors): | ||
203 | { | ||
204 | _edata = .; | ||
205 | *(.bss*) | ||
206 | *(COMMON) | ||
207 | . = ALIGN(0x4); | ||
208 | _end = .; | ||
209 | } > DRAM | ||
210 | |||
211 | #elif defined(CPU_TCC780X) | ||
212 | .text : | ||
213 | { | ||
214 | loadaddress = .; | ||
215 | _loadaddress = .; | ||
216 | . = ALIGN(0x200); | ||
217 | *(.init.text) | ||
218 | *(.text*) | ||
219 | *(.glue_7) | ||
220 | *(.glue_7t) | ||
221 | . = ALIGN(0x4); | ||
222 | } > DRAM | ||
223 | |||
224 | .rodata : | ||
225 | { | ||
226 | *(.rodata) /* problems without this, dunno why */ | ||
227 | *(.rodata*) | ||
228 | *(.rodata.str1.1) | ||
229 | *(.rodata.str1.4) | ||
230 | . = ALIGN(0x4); | ||
231 | |||
232 | /* Pseudo-allocate the copies of the data sections */ | ||
233 | _datacopy = .; | ||
234 | } > DRAM | ||
235 | |||
236 | /* TRICK ALERT! For RAM execution, we put the .data section at the | ||
237 | same load address as the copy. Thus, we don't waste extra RAM | ||
238 | when we don't actually need the copy. */ | ||
239 | .data : AT ( _datacopy ) | ||
240 | { | ||
241 | _datastart = .; | ||
242 | *(.data*) | ||
243 | . = ALIGN(0x4); | ||
244 | _dataend = .; | ||
245 | } > DRAM | ||
246 | |||
247 | /DISCARD/ : | ||
248 | { | ||
249 | *(.eh_frame) | ||
250 | } | ||
251 | |||
252 | .vectors ITCMORIG : | ||
253 | { | ||
254 | _vectorsstart = .; | ||
255 | *(.vectors); | ||
256 | _vectorsend = .; | ||
257 | } > ITCM AT> DRAM | ||
258 | |||
259 | _vectorscopy = LOADADDR(.vectors); | ||
260 | |||
261 | .itcm : | ||
262 | { | ||
263 | _itcmstart = .; | ||
264 | _itcmend = .; | ||
265 | } > ITCM AT> DRAM | ||
266 | |||
267 | _itcmcopy = LOADADDR(.itcm); | ||
268 | |||
269 | .dtcm : | ||
270 | { | ||
271 | _dtcmstart = .; | ||
272 | _dtcmend = .; | ||
273 | } > DTCM AT> DRAM | ||
274 | |||
275 | _dtcmcopy = LOADADDR(.dtcm); | ||
276 | |||
277 | .iram : | ||
278 | { | ||
279 | _iramstart = .; | ||
280 | *(.irodata) | ||
281 | *(.idata) | ||
282 | *(.icode) | ||
283 | . = ALIGN(0x4); | ||
284 | _iramend = .; | ||
285 | } > SRAM AT> DRAM | ||
286 | |||
287 | _iramcopy = LOADADDR(.iram); | ||
288 | |||
289 | .ibss (NOLOAD) : | ||
290 | { | ||
291 | _iedata = .; | ||
292 | *(.ibss) | ||
293 | . = ALIGN(0x4); | ||
294 | _iend = .; | ||
295 | } > SRAM | ||
296 | |||
297 | .stack : | ||
298 | { | ||
299 | *(.stack) | ||
300 | stackbegin = .; | ||
301 | . += 0x2000; | ||
302 | stackend = .; | ||
303 | } > SRAM | ||
304 | |||
305 | .bss : | ||
306 | { | ||
307 | _edata = .; | ||
308 | *(.bss*) | ||
309 | *(COMMON) | ||
310 | . = ALIGN(0x4); | ||
311 | _end = .; | ||
312 | } > DRAM | ||
313 | |||
314 | #elif CONFIG_CPU==S3C2440 || CONFIG_CPU == IMX31L | ||
315 | .text : | ||
316 | { | ||
317 | loadaddress = .; | ||
318 | _loadaddress = .; | ||
319 | . = ALIGN(0x200); | ||
320 | *(.init.text) | ||
321 | *(.text*) | ||
322 | *(.glue_7) | ||
323 | *(.glue_7t) | ||
324 | . = ALIGN(0x4); | ||
325 | } > DRAM | ||
326 | |||
327 | .rodata : | ||
328 | { | ||
329 | *(.rodata) /* problems without this, dunno why */ | ||
330 | *(.rodata*) | ||
331 | *(.rodata.str1.1) | ||
332 | *(.rodata.str1.4) | ||
333 | . = ALIGN(0x4); | ||
334 | |||
335 | /* Pseudo-allocate the copies of the data sections */ | ||
336 | _datacopy = .; | ||
337 | } > DRAM | ||
338 | |||
339 | /* TRICK ALERT! For RAM execution, we put the .data section at the | ||
340 | same load address as the copy. Thus, we don't waste extra RAM | ||
341 | when we don't actually need the copy. */ | ||
342 | .data : AT ( _datacopy ) | ||
343 | { | ||
344 | _datastart = .; | ||
345 | *(.data*) | ||
346 | . = ALIGN(0x4); | ||
347 | _dataend = .; | ||
348 | } > DRAM | ||
349 | |||
350 | /DISCARD/ : | ||
351 | { | ||
352 | *(.eh_frame) | ||
353 | } | ||
354 | |||
355 | .vectors 0x0 : | ||
356 | { | ||
357 | _vectorsstart = .; | ||
358 | *(.vectors); | ||
359 | _vectorsend = .; | ||
360 | } AT> DRAM | ||
361 | |||
362 | _vectorscopy = LOADADDR(.vectors); | ||
363 | |||
364 | .iram : | ||
365 | { | ||
366 | _iramstart = .; | ||
367 | *(.icode) | ||
368 | *(.irodata) | ||
369 | *(.idata) | ||
370 | _iramend = .; | ||
371 | } > DRAM | ||
372 | |||
373 | _iramcopy = LOADADDR(.iram); | ||
374 | |||
375 | .ibss (NOLOAD) : | ||
376 | { | ||
377 | _iedata = .; | ||
378 | *(.ibss) | ||
379 | . = ALIGN(0x4); | ||
380 | _iend = .; | ||
381 | } > DRAM | ||
382 | |||
383 | .stack : | ||
384 | { | ||
385 | *(.stack) | ||
386 | stackbegin = .; | ||
387 | . += 0x2000; | ||
388 | stackend = .; | ||
389 | } > DRAM | ||
390 | |||
391 | .bss : | ||
392 | { | ||
393 | _edata = .; | ||
394 | *(.bss*) | ||
395 | *(COMMON) | ||
396 | . = ALIGN(0x4); | ||
397 | _end = .; | ||
398 | } > DRAM | ||
399 | |||
400 | #else /* End CONFIG_CPU */ | ||
401 | |||
402 | #if !defined(CPU_ARM) | ||
403 | .vectors : | ||
404 | { | ||
405 | loadaddress = .; | ||
406 | _loadaddress = .; | ||
407 | KEEP(*(.resetvectors)); | ||
408 | *(.resetvectors); | ||
409 | KEEP(*(.vectors)); | ||
410 | *(.vectors); | ||
411 | } > DRAM | ||
412 | |||
413 | .text : | ||
414 | { | ||
415 | #else | ||
416 | .text : | ||
417 | { | ||
418 | loadaddress = .; | ||
419 | _loadaddress = .; | ||
420 | #endif | ||
421 | . = ALIGN(0x200); | ||
422 | *(.init.text) | ||
423 | *(.text*) | ||
424 | #ifdef CPU_ARM | ||
425 | *(.glue_7) | ||
426 | *(.glue_7t) | ||
427 | #endif | ||
428 | . = ALIGN(0x4); | ||
429 | } > DRAM | ||
430 | |||
431 | .rodata : | ||
432 | { | ||
433 | *(.rodata) /* problems without this, dunno why */ | ||
434 | *(.rodata*) | ||
435 | *(.rodata.str1.1) | ||
436 | *(.rodata.str1.4) | ||
437 | . = ALIGN(0x4); | ||
438 | |||
439 | /* Pseudo-allocate the copies of the data sections */ | ||
440 | _datacopy = .; | ||
441 | } > DRAM | ||
442 | |||
443 | /* TRICK ALERT! For RAM execution, we put the .data section at the | ||
444 | same load address as the copy. Thus, we don't waste extra RAM | ||
445 | when we don't actually need the copy. */ | ||
446 | .data : AT ( _datacopy ) | ||
447 | { | ||
448 | _datastart = .; | ||
449 | *(.data*) | ||
450 | . = ALIGN(0x4); | ||
451 | _dataend = .; | ||
452 | } > DRAM | ||
453 | |||
454 | /DISCARD/ : | ||
455 | { | ||
456 | *(.eh_frame) | ||
457 | } | ||
458 | |||
459 | #if defined(CPU_ARM) | ||
460 | .vectors 0x0 : | ||
461 | { | ||
462 | _vectorsstart = .; | ||
463 | *(.vectors); | ||
464 | _vectorsend = .; | ||
465 | #if CONFIG_CPU==PNX0101 | ||
466 | *(.dmabuf) | ||
467 | } >IRAM0 AT> DRAM | ||
468 | #else | ||
469 | } AT> DRAM | ||
470 | #endif | ||
471 | |||
472 | _vectorscopy = LOADADDR(.vectors); | ||
473 | #endif | ||
474 | |||
475 | #if CONFIG_CPU==PNX0101 | ||
476 | .iram IRAMORIG + SIZEOF(.vectors) : | ||
477 | #else | ||
478 | .iram IRAMORIG : | ||
479 | #endif | ||
480 | { | ||
481 | _iramstart = .; | ||
482 | *(.icode) | ||
483 | *(.irodata) | ||
484 | *(.idata) | ||
485 | _iramend = .; | ||
486 | } > IRAM AT> DRAM | ||
487 | |||
488 | _iramcopy = LOADADDR(.iram); | ||
489 | |||
490 | .ibss (NOLOAD) : | ||
491 | { | ||
492 | _iedata = .; | ||
493 | *(.ibss) | ||
494 | . = ALIGN(0x4); | ||
495 | _iend = .; | ||
496 | } > IRAM | ||
497 | |||
498 | #if defined(CPU_COLDFIRE) || defined(CPU_ARM) | ||
499 | #ifdef CPU_PP | ||
500 | .idle_stacks : | ||
501 | { | ||
502 | *(.idle_stacks) | ||
503 | #if NUM_CORES > 1 | ||
504 | cpu_idlestackbegin = .; | ||
505 | . += IDLE_STACK_SIZE; | ||
506 | cpu_idlestackend = .; | ||
507 | #endif | ||
508 | cop_idlestackbegin = .; | ||
509 | . += IDLE_STACK_SIZE; | ||
510 | cop_idlestackend = .; | ||
511 | } > IRAM | ||
512 | #endif | ||
513 | |||
514 | .stack : | ||
515 | { | ||
516 | *(.stack) | ||
517 | stackbegin = .; | ||
518 | . += 0x2000; | ||
519 | stackend = .; | ||
520 | } > IRAM | ||
521 | |||
522 | #else | ||
523 | /* TRICK ALERT! We want 0x2000 bytes of stack, but we set the section | ||
524 | size smaller, and allow the stack to grow into the .iram copy */ | ||
525 | .stack ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram): | ||
526 | { | ||
527 | *(.stack) | ||
528 | _stackbegin = . - SIZEOF(.iram); | ||
529 | . += 0x2000 - SIZEOF(.iram); | ||
530 | _stackend = .; | ||
531 | } > DRAM | ||
532 | #endif | ||
533 | |||
534 | #if defined(CPU_COLDFIRE) | ||
535 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram): | ||
536 | #elif defined(CPU_ARM) | ||
537 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors): | ||
538 | #else | ||
539 | .bss : | ||
540 | #endif | ||
541 | { | ||
542 | _edata = .; | ||
543 | *(.bss*) | ||
544 | *(COMMON) | ||
545 | . = ALIGN(0x4); | ||
546 | _end = .; | ||
547 | } > DRAM | ||
548 | |||
549 | #endif | ||
550 | |||
551 | .audiobuf ALIGN(4) : | ||
552 | { | ||
553 | _audiobuffer = .; | ||
554 | audiobuffer = .; | ||
555 | } > DRAM | ||
556 | |||
557 | .audiobufend ENDAUDIOADDR: | ||
558 | { | ||
559 | audiobufend = .; | ||
560 | _audiobufend = .; | ||
561 | } > DRAM | ||
562 | |||
563 | .codec ENDAUDIOADDR: | ||
564 | { | ||
565 | codecbuf = .; | ||
566 | _codecbuf = .; | ||
567 | } | ||
568 | |||
569 | .plugin ENDADDR: | ||
570 | { | ||
571 | _pluginbuf = .; | ||
572 | pluginbuf = .; | ||
573 | } | ||
574 | } | ||
575 | |||