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-rw-r--r--apps/debug_menu.c335
1 files changed, 0 insertions, 335 deletions
diff --git a/apps/debug_menu.c b/apps/debug_menu.c
index 000c557906..7778f35de4 100644
--- a/apps/debug_menu.c
+++ b/apps/debug_menu.c
@@ -946,151 +946,6 @@ bool dbg_cpufreq(void)
946} 946}
947#endif 947#endif
948 948
949#ifdef HAVE_RTC
950/* Read RTC RAM contents and display them */
951bool dbg_rtc(void)
952{
953 char buf[32];
954 unsigned char addr = 0, r, c;
955 int i;
956 int button;
957
958#ifdef HAVE_LCD_BITMAP
959 lcd_setmargins(0, 0);
960#endif
961 lcd_clear_display();
962 lcd_puts(0, 0, "RTC read:");
963
964 while(1)
965 {
966 for (r = 0; r < 4; r++) {
967 snprintf(buf, 10, "0x%02x: ", addr + r*4);
968 for (c = 0; c <= 3; c++) {
969 i = rtc_read(addr + r*4 + c);
970 snprintf(buf + 6 + c*2, 3, "%02x", i);
971 }
972 lcd_puts(1, r+1, buf);
973 }
974
975 lcd_update();
976
977 button = button_get_w_tmo(HZ/2);
978
979 switch(button)
980 {
981 case SETTINGS_INC:
982 if (addr < 63-16) { addr += 16; }
983 break;
984
985 case SETTINGS_DEC:
986 if (addr) { addr -= 16; }
987 break;
988
989#ifdef BUTTON_F2
990 case BUTTON_F2:
991 /* clear the user RAM space */
992 for (c = 0; c <= 43; c++)
993 rtc_write(0x14 + c, 0);
994 break;
995#endif
996
997 case SETTINGS_OK:
998 case SETTINGS_CANCEL:
999 return false;
1000 }
1001 }
1002 return false;
1003}
1004#endif /* HAVE_RTC */
1005
1006#if CONFIG_HWCODEC != MASNONE
1007
1008#ifdef HAVE_LCD_CHARCELLS
1009#define NUMROWS 1
1010#else
1011#define NUMROWS 4
1012#endif
1013/* Read MAS registers and display them */
1014bool dbg_mas(void)
1015{
1016 char buf[32];
1017 unsigned int addr = 0, r, i;
1018
1019#ifdef HAVE_LCD_BITMAP
1020 lcd_setmargins(0, 0);
1021#endif
1022 lcd_clear_display();
1023 lcd_puts(0, 0, "MAS register read:");
1024
1025 while(1)
1026 {
1027 for (r = 0; r < NUMROWS; r++) {
1028 i = mas_readreg(addr + r);
1029 snprintf(buf, 30, "%02x %08x", addr + r, i);
1030 lcd_puts(0, r+1, buf);
1031 }
1032
1033 lcd_update();
1034
1035 switch(button_get_w_tmo(HZ/16))
1036 {
1037 case SETTINGS_INC:
1038 addr = (addr + NUMROWS) & 0xFF; /* register addrs are 8 bit */
1039 break;
1040
1041 case SETTINGS_DEC:
1042 addr = (addr - NUMROWS) & 0xFF; /* register addrs are 8 bit */
1043 break;
1044
1045 case SETTINGS_OK:
1046 case SETTINGS_CANCEL:
1047 return false;
1048 }
1049 }
1050 return false;
1051}
1052#endif /* CONFIG_HWCODEC != MASNONE */
1053
1054#if (CONFIG_HWCODEC == MAS3587F) || (CONFIG_HWCODEC == MAS3539F)
1055bool dbg_mas_codec(void)
1056{
1057 char buf[32];
1058 unsigned int addr = 0, r, i;
1059
1060#ifdef HAVE_LCD_BITMAP
1061 lcd_setmargins(0, 0);
1062#endif
1063 lcd_clear_display();
1064 lcd_puts(0, 0, "MAS codec reg read:");
1065
1066 while(1)
1067 {
1068 for (r = 0; r < 4; r++) {
1069 i = mas_codec_readreg(addr + r);
1070 snprintf(buf, 30, "0x%02x: %08x", addr + r, i);
1071 lcd_puts(1, r+1, buf);
1072 }
1073
1074 lcd_update();
1075
1076 switch(button_get_w_tmo(HZ/16))
1077 {
1078 case SETTINGS_INC:
1079 addr += 4;
1080 break;
1081 case SETTINGS_DEC:
1082 if (addr) { addr -= 4; }
1083 break;
1084
1085 case SETTINGS_OK:
1086 case SETTINGS_CANCEL:
1087 return false;
1088 }
1089 }
1090 return false;
1091}
1092#endif
1093
1094#ifdef HAVE_LCD_BITMAP 949#ifdef HAVE_LCD_BITMAP
1095/* 950/*
1096 * view_battery() shows a automatically scaled graph of the battery voltage 951 * view_battery() shows a automatically scaled graph of the battery voltage
@@ -1253,182 +1108,6 @@ bool view_battery(void)
1253 1108
1254#endif 1109#endif
1255 1110
1256#if CONFIG_HWCODEC == MAS3507D
1257bool dbg_mas_info(void)
1258{
1259 int button;
1260 char buf[32];
1261 int currval = 0;
1262 unsigned long val;
1263 unsigned long pll48, pll44, config;
1264 int pll_toggle = 0;
1265
1266#ifdef HAVE_LCD_BITMAP
1267 lcd_setmargins(0, 0);
1268#endif
1269 while(1)
1270 {
1271 switch(currval)
1272 {
1273 case 0:
1274 mas_readmem(MAS_BANK_D1, 0xff7, &val, 1);
1275 lcd_puts(0, 0, "Design Code");
1276 snprintf(buf, 32, "%05lx ", val);
1277 break;
1278 case 1:
1279 lcd_puts(0, 0, "DC/DC mode ");
1280 snprintf(buf, 32, "8e: %05x ", mas_readreg(0x8e) & 0xfffff);
1281 break;
1282 case 2:
1283 lcd_puts(0, 0, "Mute/Bypass");
1284 snprintf(buf, 32, "aa: %05x ", mas_readreg(0xaa) & 0xfffff);
1285 break;
1286 case 3:
1287 lcd_puts(0, 0, "PIOData ");
1288 snprintf(buf, 32, "ed: %05x ", mas_readreg(0xed) & 0xfffff);
1289 break;
1290 case 4:
1291 lcd_puts(0, 0, "Startup Cfg");
1292 snprintf(buf, 32, "e6: %05x ", mas_readreg(0xe6) & 0xfffff);
1293 break;
1294 case 5:
1295 lcd_puts(0, 0, "KPrescale ");
1296 snprintf(buf, 32, "e7: %05x ", mas_readreg(0xe7) & 0xfffff);
1297 break;
1298 case 6:
1299 lcd_puts(0, 0, "KBass ");
1300 snprintf(buf, 32, "6b: %05x ", mas_readreg(0x6b) & 0xfffff);
1301 break;
1302 case 7:
1303 lcd_puts(0, 0, "KTreble ");
1304 snprintf(buf, 32, "6f: %05x ", mas_readreg(0x6f) & 0xfffff);
1305 break;
1306 case 8:
1307 mas_readmem(MAS_BANK_D0, MAS_D0_MPEG_FRAME_COUNT, &val, 1);
1308 lcd_puts(0, 0, "Frame Count");
1309 snprintf(buf, 32, "0/300: %04x", (unsigned int)(val & 0xffff));
1310 break;
1311 case 9:
1312 mas_readmem(MAS_BANK_D0, MAS_D0_MPEG_STATUS_1, &val, 1);
1313 lcd_puts(0, 0, "Status1 ");
1314 snprintf(buf, 32, "0/301: %04x", (unsigned int)(val & 0xffff));
1315 break;
1316 case 10:
1317 mas_readmem(MAS_BANK_D0, MAS_D0_MPEG_STATUS_2, &val, 1);
1318 lcd_puts(0, 0, "Status2 ");
1319 snprintf(buf, 32, "0/302: %04x", (unsigned int)(val & 0xffff));
1320 break;
1321 case 11:
1322 mas_readmem(MAS_BANK_D0, MAS_D0_CRC_ERROR_COUNT, &val, 1);
1323 lcd_puts(0, 0, "CRC Count ");
1324 snprintf(buf, 32, "0/303: %04x", (unsigned int)(val & 0xffff));
1325 break;
1326 case 12:
1327 mas_readmem(MAS_BANK_D0, 0x36d, &val, 1);
1328 lcd_puts(0, 0, "PLLOffset48");
1329 snprintf(buf, 32, "0/36d %05lx", val & 0xfffff);
1330 break;
1331 case 13:
1332 mas_readmem(MAS_BANK_D0, 0x32d, &val, 1);
1333 lcd_puts(0, 0, "PLLOffset48");
1334 snprintf(buf, 32, "0/32d %05lx", val & 0xfffff);
1335 break;
1336 case 14:
1337 mas_readmem(MAS_BANK_D0, 0x36e, &val, 1);
1338 lcd_puts(0, 0, "PLLOffset44");
1339 snprintf(buf, 32, "0/36e %05lx", val & 0xfffff);
1340 break;
1341 case 15:
1342 mas_readmem(MAS_BANK_D0, 0x32e, &val, 1);
1343 lcd_puts(0, 0, "PLLOffset44");
1344 snprintf(buf, 32, "0/32e %05lx", val & 0xfffff);
1345 break;
1346 case 16:
1347 mas_readmem(MAS_BANK_D0, 0x36f, &val, 1);
1348 lcd_puts(0, 0, "OutputConf ");
1349 snprintf(buf, 32, "0/36f %05lx", val & 0xfffff);
1350 break;
1351 case 17:
1352 mas_readmem(MAS_BANK_D0, 0x32f, &val, 1);
1353 lcd_puts(0, 0, "OutputConf ");
1354 snprintf(buf, 32, "0/32f %05lx", val & 0xfffff);
1355 break;
1356 case 18:
1357 mas_readmem(MAS_BANK_D1, 0x7f8, &val, 1);
1358 lcd_puts(0, 0, "LL Gain ");
1359 snprintf(buf, 32, "1/7f8 %05lx", val & 0xfffff);
1360 break;
1361 case 19:
1362 mas_readmem(MAS_BANK_D1, 0x7f9, &val, 1);
1363 lcd_puts(0, 0, "LR Gain ");
1364 snprintf(buf, 32, "1/7f9 %05lx", val & 0xfffff);
1365 break;
1366 case 20:
1367 mas_readmem(MAS_BANK_D1, 0x7fa, &val, 1);
1368 lcd_puts(0, 0, "RL Gain ");
1369 snprintf(buf, 32, "1/7fa %05lx", val & 0xfffff);
1370 break;
1371 case 21:
1372 mas_readmem(MAS_BANK_D1, 0x7fb, &val, 1);
1373 lcd_puts(0, 0, "RR Gain ");
1374 snprintf(buf, 32, "1/7fb %05lx", val & 0xfffff);
1375 break;
1376 case 22:
1377 lcd_puts(0, 0, "L Trailbits");
1378 snprintf(buf, 32, "c5: %05x ", mas_readreg(0xc5) & 0xfffff);
1379 break;
1380 case 23:
1381 lcd_puts(0, 0, "R Trailbits");
1382 snprintf(buf, 32, "c6: %05x ", mas_readreg(0xc6) & 0xfffff);
1383 break;
1384 }
1385 lcd_puts(0, 1, buf);
1386
1387 button = button_get_w_tmo(HZ/5);
1388 switch(button)
1389 {
1390 case SETTINGS_CANCEL:
1391 return false;
1392
1393 case SETTINGS_DEC:
1394 currval--;
1395 if(currval < 0)
1396 currval = 23;
1397 break;
1398
1399 case SETTINGS_INC:
1400 currval++;
1401 if(currval > 23)
1402 currval = 0;
1403 break;
1404
1405 case SETTINGS_OK:
1406 pll_toggle = !pll_toggle;
1407 if(pll_toggle)
1408 {
1409 /* 14.31818 MHz crystal */
1410 pll48 = 0x5d9d0;
1411 pll44 = 0xfffceceb;
1412 config = 0;
1413 }
1414 else
1415 {
1416 /* 14.725 MHz crystal */
1417 pll48 = 0x2d0de;
1418 pll44 = 0xfffa2319;
1419 config = 0;
1420 }
1421 mas_writemem(MAS_BANK_D0, 0x32d, &pll48, 1);
1422 mas_writemem(MAS_BANK_D0, 0x32e, &pll44, 1);
1423 mas_writemem(MAS_BANK_D0, 0x32f, &config, 1);
1424 mas_run(0x475);
1425 break;
1426 }
1427 }
1428 return false;
1429}
1430#endif
1431
1432static bool view_runtime(void) 1111static bool view_runtime(void)
1433{ 1112{
1434 char s[32]; 1113 char s[32];
@@ -1893,23 +1572,9 @@ bool debug_menu(void)
1893 { "PCM recording", pcm_rec_screen }, 1572 { "PCM recording", pcm_rec_screen },
1894#endif 1573#endif
1895#if CONFIG_CPU == SH7034 1574#if CONFIG_CPU == SH7034
1896#ifdef HAVE_LCD_BITMAP
1897#ifdef HAVE_RTC
1898 { "View/clr RTC RAM", dbg_rtc },
1899#endif /* HAVE_RTC */
1900#endif /* HAVE_LCD_BITMAP */
1901 { "Catch mem accesses", dbg_set_memory_guard }, 1575 { "Catch mem accesses", dbg_set_memory_guard },
1902#endif /* CONFIG_CPU == SH7034 */ 1576#endif /* CONFIG_CPU == SH7034 */
1903 { "View OS stacks", dbg_os }, 1577 { "View OS stacks", dbg_os },
1904#if CONFIG_HWCODEC == MAS3507D
1905 { "View MAS info", dbg_mas_info },
1906#endif
1907#if CONFIG_HWCODEC != MASNONE
1908 { "View MAS regs", dbg_mas },
1909#endif
1910#if (CONFIG_HWCODEC == MAS3587F) || (CONFIG_HWCODEC == MAS3539F)
1911 { "View MAS codec", dbg_mas_codec },
1912#endif
1913#ifdef HAVE_LCD_BITMAP 1578#ifdef HAVE_LCD_BITMAP
1914 { "View battery", view_battery }, 1579 { "View battery", view_battery },
1915 { "Screendump", dbg_screendump }, 1580 { "Screendump", dbg_screendump },
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-24 10:23:11 +0000