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Diffstat (limited to 'apps/codecs/spc/spc_codec.h')
-rw-r--r--apps/codecs/spc/spc_codec.h100
1 files changed, 74 insertions, 26 deletions
diff --git a/apps/codecs/spc/spc_codec.h b/apps/codecs/spc/spc_codec.h
index f2677df04a..c785acc468 100644
--- a/apps/codecs/spc/spc_codec.h
+++ b/apps/codecs/spc/spc_codec.h
@@ -32,38 +32,51 @@
32 32
33/** Basic configuration options **/ 33/** Basic configuration options **/
34 34
35/* TGB is the only target fast enough for gaussian and realtime BRR decode */ 35#define SPC_DUAL_CORE 1
36/* echo is almost fast enough but not quite */
37#ifndef TOSHIBA_GIGABEAT_F
38 /* Cache BRR waves */
39 #define SPC_BRRCACHE 1
40 36
41 /* Disable gaussian interpolation */ 37#if !defined(SPC_DUAL_CORE) || NUM_CORES == 1
42 #define SPC_NOINTERP 1 38#undef SPC_DUAL_CORE
43 39#define SPC_DUAL_CORE 0
44#ifndef CPU_COLDFIRE
45 /* Disable echo processing */
46 #define SPC_NOECHO 1
47#else
48 /* Enable echo processing */
49 #define SPC_NOECHO 0
50#endif 40#endif
51#else 41
42/* TGB is the only target fast enough for gaussian and realtime BRR decode */
43/* echo is almost fast enough but not quite */
44#if defined(TOSHIBA_GIGABEAT_F) || defined(SIMULATOR)
52 /* Don't cache BRR waves */ 45 /* Don't cache BRR waves */
53 #define SPC_BRRCACHE 0 46 #define SPC_BRRCACHE 0
54 47
55 /* Allow gaussian interpolation */ 48 /* Allow gaussian interpolation */
56 #define SPC_NOINTERP 0 49 #define SPC_NOINTERP 0
50
51 /* Allow echo processing */
52 #define SPC_NOECHO 0
53#elif defined(CPU_COLDFIRE)
54 /* Cache BRR waves */
55 #define SPC_BRRCACHE 1
57 56
57 /* Disable gaussian interpolation */
58 #define SPC_NOINTERP 1
59
58 /* Allow echo processing */ 60 /* Allow echo processing */
59 #define SPC_NOECHO 0 61 #define SPC_NOECHO 0
60#endif 62#elif defined (CPU_PP) && SPC_DUAL_CORE
63 /* Cache BRR waves */
64 #define SPC_BRRCACHE 1
65
66 /* Disable gaussian interpolation */
67 #define SPC_NOINTERP 1
61 68
62/* Samples per channel per iteration */ 69 /* Allow echo processing */
63#ifdef CPU_COLDFIRE 70 #define SPC_NOECHO 0
64#define WAV_CHUNK_SIZE 1024
65#else 71#else
66#define WAV_CHUNK_SIZE 2048 72 /* Cache BRR waves */
73 #define SPC_BRRCACHE 1
74
75 /* Disable gaussian interpolation */
76 #define SPC_NOINTERP 1
77
78 /* Disable echo processing */
79 #define SPC_NOECHO 1
67#endif 80#endif
68 81
69#ifdef CPU_ARM 82#ifdef CPU_ARM
@@ -72,6 +85,26 @@
72 85
73 #undef IDATA_ATTR 86 #undef IDATA_ATTR
74 #define IDATA_ATTR 87 #define IDATA_ATTR
88
89 #undef ICONST_ATTR
90 #define ICONST_ATTR
91
92 #undef IBSS_ATTR
93 #define IBSS_ATTR
94
95#if SPC_DUAL_CORE
96 #undef NOCACHEBSS_ATTR
97 #define NOCACHEBSS_ATTR __attribute__ ((section(".ibss")))
98 #undef NOCACHEDATA_ATTR
99 #define NOCACHEDATA_ATTR __attribute__((section(".idata")))
100#endif
101#endif
102
103/* Samples per channel per iteration */
104#if defined(CPU_PP) && NUM_CORES == 1
105#define WAV_CHUNK_SIZE 2048
106#else
107#define WAV_CHUNK_SIZE 1024
75#endif 108#endif
76 109
77/**************** Little-endian handling ****************/ 110/**************** Little-endian handling ****************/
@@ -231,16 +264,26 @@ extern int16_t BRRcache [BRR_CACHE_SIZE];
231 264
232enum { FIR_BUF_HALF = 8 }; 265enum { FIR_BUF_HALF = 8 };
233 266
234#ifdef CPU_COLDFIRE 267#if defined(CPU_COLDFIRE)
235/* global because of the large aligment requirement for hardware masking - 268/* global because of the large aligment requirement for hardware masking -
236 * L-R interleaved 16-bit samples for easy loading and mac.w use. 269 * L-R interleaved 16-bit samples for easy loading and mac.w use.
237 */ 270 */
238enum 271enum
239{ 272{
240 FIR_BUF_SIZE = FIR_BUF_HALF * sizeof ( int32_t ), 273 FIR_BUF_CNT = FIR_BUF_HALF,
241 FIR_BUF_MASK = ~FIR_BUF_SIZE 274 FIR_BUF_SIZE = FIR_BUF_CNT * sizeof ( int32_t ),
275 FIR_BUF_ALIGN = FIR_BUF_SIZE * 2,
276 FIR_BUF_MASK = ~((FIR_BUF_ALIGN / 2) | (sizeof ( int32_t ) - 1))
277};
278#elif defined (CPU_ARM)
279enum
280{
281 FIR_BUF_CNT = FIR_BUF_HALF * 2 * 2,
282 FIR_BUF_SIZE = FIR_BUF_CNT * sizeof ( int32_t ),
283 FIR_BUF_ALIGN = FIR_BUF_SIZE,
284 FIR_BUF_MASK = ~((FIR_BUF_ALIGN / 2) | (sizeof ( int32_t ) * 2 - 1))
242}; 285};
243#endif /* CPU_COLDFIRE */ 286#endif /* CPU_* */
244 287
245struct Spc_Dsp 288struct Spc_Dsp
246{ 289{
@@ -257,14 +300,19 @@ struct Spc_Dsp
257 int noise_count; 300 int noise_count;
258 uint16_t noise; /* also read as int16_t */ 301 uint16_t noise; /* also read as int16_t */
259 302
260#ifdef CPU_COLDFIRE 303#if defined(CPU_COLDFIRE)
261 /* circularly hardware masked address */ 304 /* circularly hardware masked address */
262 int32_t *fir_ptr; 305 int32_t *fir_ptr;
263 /* wrapped address just behind current position - 306 /* wrapped address just behind current position -
264 allows mac.w to increment and mask fir_ptr */ 307 allows mac.w to increment and mask fir_ptr */
265 int32_t *last_fir_ptr; 308 int32_t *last_fir_ptr;
266 /* copy of echo FIR constants as int16_t for use with mac.w */ 309 /* copy of echo FIR constants as int16_t for use with mac.w */
267 int16_t fir_coeff[VOICE_COUNT]; 310 int16_t fir_coeff [VOICE_COUNT];
311#elif defined (CPU_ARM)
312 /* fir_buf [i + 8] == fir_buf [i], to avoid wrap checking in FIR code */
313 int32_t *fir_ptr;
314 /* copy of echo FIR constants as int32_t, for faster access */
315 int32_t fir_coeff [VOICE_COUNT];
268#else 316#else
269 /* fir_buf [i + 8] == fir_buf [i], to avoid wrap checking in FIR code */ 317 /* fir_buf [i + 8] == fir_buf [i], to avoid wrap checking in FIR code */
270 int fir_pos; /* (0 to 7) */ 318 int fir_pos; /* (0 to 7) */