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-rw-r--r--apps/codecs/libtremor/asm_arm.h168
1 files changed, 0 insertions, 168 deletions
diff --git a/apps/codecs/libtremor/asm_arm.h b/apps/codecs/libtremor/asm_arm.h
index eb0d3ca789..42f82ec088 100644
--- a/apps/codecs/libtremor/asm_arm.h
+++ b/apps/codecs/libtremor/asm_arm.h
@@ -17,174 +17,6 @@
17 17
18#ifdef _ARM_ASSEM_ 18#ifdef _ARM_ASSEM_
19 19
20#if !defined(_V_WIDE_MATH) && !defined(_LOW_ACCURACY_)
21#define _V_WIDE_MATH
22#ifndef _TREMOR_VECT_OPS
23#define _TREMOR_VECT_OPS
24/* asm versions of vector operations for block.c, window.c */
25/* SOME IMPORTANT NOTES: this implementation of vect_mult_bw does
26 NOT do a final shift, meaning that the result of vect_mult_bw is
27 only 31 bits not 32. This is so that we can do the shift in-place
28 in vect_add_xxxx instead to save one instruction for each mult on arm */
29static inline
30void vect_add_right_left(ogg_int32_t *x, const ogg_int32_t *y, int n)
31{
32 /* first arg is right subframe of previous frame and second arg
33 is left subframe of current frame. overlap left onto right overwriting
34 the right subframe */
35
36 do{
37 asm volatile (
38 "ldmia %[x], {r0, r1, r2, r3};"
39 "ldmia %[y]!, {r4, r5, r6, r7};"
40 "add r0, r4, r0, lsl #1;"
41 "add r1, r5, r1, lsl #1;"
42 "add r2, r6, r2, lsl #1;"
43 "add r3, r7, r3, lsl #1;"
44 "stmia %[x]!, {r0, r1, r2, r3};"
45 "ldmia %[x], {r0, r1, r2, r3};"
46 "ldmia %[y]!, {r4, r5, r6, r7};"
47 "add r0, r4, r0, lsl #1;"
48 "add r1, r5, r1, lsl #1;"
49 "add r2, r6, r2, lsl #1;"
50 "add r3, r7, r3, lsl #1;"
51 "stmia %[x]!, {r0, r1, r2, r3};"
52 : [x] "+r" (x), [y] "+r" (y)
53 : : "r0", "r1", "r2", "r3",
54 "r4", "r5", "r6", "r7",
55 "memory");
56 n -= 8;
57 } while (n);
58}
59
60static inline
61void vect_add_left_right(ogg_int32_t *x, const ogg_int32_t *y, int n)
62{
63 /* first arg is left subframe of current frame and second arg
64 is right subframe of previous frame. overlap right onto left overwriting
65 the LEFT subframe */
66 do{
67 asm volatile (
68 "ldmia %[x], {r0, r1, r2, r3};"
69 "ldmia %[y]!, {r4, r5, r6, r7};"
70 "add r0, r0, r4, lsl #1;"
71 "add r1, r1, r5, lsl #1;"
72 "add r2, r2, r6, lsl #1;"
73 "add r3, r3, r7, lsl #1;"
74 "stmia %[x]!, {r0, r1, r2, r3};"
75 "ldmia %[x], {r0, r1, r2, r3};"
76 "ldmia %[y]!, {r4, r5, r6, r7};"
77 "add r0, r0, r4, lsl #1;"
78 "add r1, r1, r5, lsl #1;"
79 "add r2, r2, r6, lsl #1;"
80 "add r3, r3, r7, lsl #1;"
81 "stmia %[x]!, {r0, r1, r2, r3};"
82 : [x] "+r" (x), [y] "+r" (y)
83 : : "r0", "r1", "r2", "r3",
84 "r4", "r5", "r6", "r7",
85 "memory");
86 n -= 8;
87 } while (n);
88}
89
90#if ARM_ARCH >= 6
91static inline
92void ogg_vect_mult_fw(ogg_int32_t *data, LOOKUP_T *window, int n)
93{
94 /* Note, mult_fw uses MULT31 */
95 do{
96 asm volatile (
97 "ldmia %[d], {r0, r1, r2, r3};"
98 "ldmia %[w]!, {r4, r5, r6, r7};"
99 "smmul r0, r4, r0;"
100 "smmul r1, r5, r1;"
101 "smmul r2, r6, r2;"
102 "smmul r3, r7, r3;"
103 "mov r0, r0, lsl #1;"
104 "mov r1, r1, lsl #1;"
105 "mov r2, r2, lsl #1;"
106 "mov r3, r3, lsl #1;"
107 "stmia %[d]!, {r0, r1, r2, r3};"
108 : [d] "+r" (data), [w] "+r" (window)
109 : : "r0", "r1", "r2", "r3",
110 "r4", "r5", "r6", "r7",
111 "memory" );
112 n -= 4;
113 } while (n);
114}
115#else
116static inline
117void ogg_vect_mult_fw(ogg_int32_t *data, LOOKUP_T *window, int n)
118{
119 /* Note, mult_fw uses MULT31 */
120 do{
121 asm volatile (
122 "ldmia %[d], {r0, r1, r2, r3};"
123 "ldmia %[w]!, {r4, r5, r6, r7};"
124 "smull r8, r0, r4, r0;"
125 "mov r0, r0, lsl #1;"
126 "smull r8, r1, r5, r1;"
127 "mov r1, r1, lsl #1;"
128 "smull r8, r2, r6, r2;"
129 "mov r2, r2, lsl #1;"
130 "smull r8, r3, r7, r3;"
131 "mov r3, r3, lsl #1;"
132 "stmia %[d]!, {r0, r1, r2, r3};"
133 : [d] "+r" (data), [w] "+r" (window)
134 : : "r0", "r1", "r2", "r3",
135 "r4", "r5", "r6", "r7", "r8",
136 "memory" );
137 n -= 4;
138 } while (n);
139}
140#endif
141
142#if ARM_ARCH >= 6
143static inline
144void ogg_vect_mult_bw(ogg_int32_t *data, LOOKUP_T *window, int n)
145{
146 /* NOTE mult_bw uses MULT_32 i.e. doesn't shift result left at end */
147 /* On ARM, we can do the shift at the same time as the overlap-add */
148 do{
149 asm volatile ("ldmia %[d], {r0, r1, r2, r3};"
150 "ldmda %[w]!, {r4, r5, r6, r7};"
151 "smmul r0, r7, r0;"
152 "smmul r1, r6, r1;"
153 "smmul r2, r5, r2;"
154 "smmul r3, r4, r3;"
155 "stmia %[d]!, {r0, r1, r2, r3};"
156 : [d] "+r" (data), [w] "+r" (window)
157 : : "r0", "r1", "r2", "r3",
158 "r4", "r5", "r6", "r7",
159 "memory" );
160 n -= 4;
161 } while (n);
162}
163#else
164static inline
165void ogg_vect_mult_bw(ogg_int32_t *data, LOOKUP_T *window, int n)
166{
167 /* NOTE mult_bw uses MULT_32 i.e. doesn't shift result left at end */
168 /* On ARM, we can do the shift at the same time as the overlap-add */
169 do{
170 asm volatile ("ldmia %[d], {r0, r1, r2, r3};"
171 "ldmda %[w]!, {r4, r5, r6, r7};"
172 "smull r8, r0, r7, r0;"
173 "smull r7, r1, r6, r1;"
174 "smull r6, r2, r5, r2;"
175 "smull r5, r3, r4, r3;"
176 "stmia %[d]!, {r0, r1, r2, r3};"
177 : [d] "+r" (data), [w] "+r" (window)
178 : : "r0", "r1", "r2", "r3",
179 "r4", "r5", "r6", "r7", "r8",
180 "memory" );
181 n -= 4;
182 } while (n);
183}
184#endif
185#endif
186#endif
187
188#ifndef _V_LSP_MATH_ASM 20#ifndef _V_LSP_MATH_ASM
189#define _V_LSP_MATH_ASM 21#define _V_LSP_MATH_ASM
190 22
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