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1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Tomasz Malesinski
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19
20#include "config.h"
21
22/* This performs slower in IRAM on PP502x and there is no space in
23 mpegplayer on the PP5002 */
24#if defined(CPU_PP502x) || (CONFIG_CPU == PP5002 && defined(MPEGPLAYER))
25 .section .text,"ax",%progbits
26#else
27 .section .icode,"ax",%progbits
28#endif
29
30 .global synth_full1
31 .global synth_full2
32
33 ;; r0 = pcm
34 ;; r1 = fo
35 ;; r2 = fe
36 ;; r3 = D0ptr
37 ;; r4 = D1ptr
38synth_full1:
39 stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, r12, lr}
40 ldr r4, [sp, #40]
41 ldr r5, =synth_full_sp
42 str sp, [r5]
43 mov r5, #15
44 add r2, r2, #32
45.l:
46 add r3, r3, #128
47 add r4, r4, #128
48 ldmia r1!, {r10, r11, r12, lr}
49 ldr r7, [r3, #4]
50 smull r6, r7, r10, r7
51 ldr r9, [r4, #120]
52 smull r8, r9, r10, r9
53
54 ldr r10, [r3, #60]
55 smlal r6, r7, r11, r10
56 ldr r10, [r3, #52]
57 smlal r6, r7, r12, r10
58 ldr r10, [r3, #44]
59 smlal r6, r7, lr, r10
60
61 ldr r10, [r4, #64]
62 smlal r8, r9, r11, r10
63 ldr r10, [r4, #72]
64 smlal r8, r9, r12, r10
65 ldr r10, [r4, #80]
66 smlal r8, r9, lr, r10
67
68 ldmia r1!, {r11, r12, sp, lr}
69 ldr r10, [r3, #36]
70 smlal r6, r7, r11, r10
71 ldr r10, [r3, #28]
72 smlal r6, r7, r12, r10
73 ldr r10, [r3, #20]
74 smlal r6, r7, sp, r10
75 ldr r10, [r3, #12]
76 smlal r6, r7, lr, r10
77
78 ldr r10, [r4, #88]
79 smlal r8, r9, r11, r10
80 ldr r10, [r4, #96]
81 smlal r8, r9, r12, r10
82 ldr r10, [r4, #104]
83 smlal r8, r9, sp, r10
84 ldr r10, [r4, #112]
85 smlal r8, r9, lr, r10
86
87 rsbs r6, r6, #0
88 rsc r7, r7, #0
89
90 ldmia r2!, {r11, r12, sp, lr}
91
92 ldr r10, [r3, #0]
93 smlal r6, r7, r11, r10
94 ldr r10, [r3, #56]
95 smlal r6, r7, r12, r10
96 ldr r10, [r3, #48]
97 smlal r6, r7, sp, r10
98 ldr r10, [r3, #40]
99 smlal r6, r7, lr, r10
100
101 ldr r10, [r4, #60]
102 smlal r8, r9, r11, r10
103 ldr r10, [r4, #68]
104 smlal r8, r9, r12, r10
105 ldr r10, [r4, #76]
106 smlal r8, r9, sp, r10
107 ldr r10, [r4, #84]
108 smlal r8, r9, lr, r10
109
110 ldmia r2!, {r11, r12, sp, lr}
111 ldr r10, [r3, #32]
112 smlal r6, r7, r11, r10
113 ldr r10, [r3, #24]
114 smlal r6, r7, r12, r10
115 ldr r10, [r3, #16]
116 smlal r6, r7, sp, r10
117 ldr r10, [r3, #8]
118 smlal r6, r7, lr, r10
119
120 ldr r10, [r4, #92]
121 smlal r8, r9, r11, r10
122 ldr r10, [r4, #100]
123 smlal r8, r9, r12, r10
124 ldr r10, [r4, #108]
125 smlal r8, r9, sp, r10
126 ldr r10, [r4, #116]
127 smlal r8, r9, lr, r10
128
129 movs r6, r6, lsr #16
130 adc r6, r6, r7, lsl #16
131 str r6, [r0, -r5, lsl #2]
132
133 movs r8, r8, lsr #16
134 adc r8, r8, r9, lsl #16
135 str r8, [r0, r5, lsl #2]
136
137 subs r5, r5, #1
138 bne .l
139
140 ldr r5, =synth_full_sp
141 ldr sp, [r5]
142 ldmia sp!, {r4, r5, r6, r7, r8, r9, r10, r11, r12, pc}
143
144synth_full2:
145 stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, r12, lr}
146 ldr r4, [sp, #40]
147 ldr r5, =synth_full_sp
148 str sp, [r5]
149 mov r5, #15
150 add r2, r2, #32
151.l2:
152 add r3, r3, #128
153 add r4, r4, #128
154 ldmia r1!, {r10, r11, r12, lr}
155 ldr r7, [r3, #0]
156 smull r6, r7, r10, r7
157 ldr r9, [r4, #60]
158 smull r8, r9, r10, r9
159
160 ldr r10, [r3, #56]
161 smlal r6, r7, r11, r10
162 ldr r10, [r3, #48]
163 smlal r6, r7, r12, r10
164 ldr r10, [r3, #40]
165 smlal r6, r7, lr, r10
166
167 ldr r10, [r4, #68]
168 smlal r8, r9, r11, r10
169 ldr r10, [r4, #76]
170 smlal r8, r9, r12, r10
171 ldr r10, [r4, #84]
172 smlal r8, r9, lr, r10
173
174 ldmia r1!, {r11, r12, sp, lr}
175 ldr r10, [r3, #32]
176 smlal r6, r7, r11, r10
177 ldr r10, [r3, #24]
178 smlal r6, r7, r12, r10
179 ldr r10, [r3, #16]
180 smlal r6, r7, sp, r10
181 ldr r10, [r3, #8]
182 smlal r6, r7, lr, r10
183
184 ldr r10, [r4, #92]
185 smlal r8, r9, r11, r10
186 ldr r10, [r4, #100]
187 smlal r8, r9, r12, r10
188 ldr r10, [r4, #108]
189 smlal r8, r9, sp, r10
190 ldr r10, [r4, #116]
191 smlal r8, r9, lr, r10
192
193 rsbs r6, r6, #0
194 rsc r7, r7, #0
195
196 ldmia r2!, {r11, r12, sp, lr}
197
198 ldr r10, [r3, #4]
199 smlal r6, r7, r11, r10
200 ldr r10, [r3, #60]
201 smlal r6, r7, r12, r10
202 ldr r10, [r3, #52]
203 smlal r6, r7, sp, r10
204 ldr r10, [r3, #44]
205 smlal r6, r7, lr, r10
206
207 ldr r10, [r4, #120]
208 smlal r8, r9, r11, r10
209 ldr r10, [r4, #64]
210 smlal r8, r9, r12, r10
211 ldr r10, [r4, #72]
212 smlal r8, r9, sp, r10
213 ldr r10, [r4, #80]
214 smlal r8, r9, lr, r10
215
216 ldmia r2!, {r11, r12, sp, lr}
217 ldr r10, [r3, #36]
218 smlal r6, r7, r11, r10
219 ldr r10, [r3, #28]
220 smlal r6, r7, r12, r10
221 ldr r10, [r3, #20]
222 smlal r6, r7, sp, r10
223 ldr r10, [r3, #12]
224 smlal r6, r7, lr, r10
225
226 ldr r10, [r4, #88]
227 smlal r8, r9, r11, r10
228 ldr r10, [r4, #96]
229 smlal r8, r9, r12, r10
230 ldr r10, [r4, #104]
231 smlal r8, r9, sp, r10
232 ldr r10, [r4, #112]
233 smlal r8, r9, lr, r10
234
235 movs r6, r6, lsr #16
236 adc r6, r6, r7, lsl #16
237 str r6, [r0, -r5, lsl #2]
238
239 movs r8, r8, lsr #16
240 adc r8, r8, r9, lsl #16
241 str r8, [r0, r5, lsl #2]
242
243 subs r5, r5, #1
244 bne .l2
245
246 ldr r5, =synth_full_sp
247 ldr sp, [r5]
248 ldmia sp!, {r4, r5, r6, r7, r8, r9, r10, r11, r12, pc}
249
250 .global III_aliasreduce
251
252III_aliasreduce:
253 stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, r12, lr}
254 add r1, r0, r1, lsl #2
255 add r0, r0, #72
256.arl1:
257 mov r2, #8
258 mov r3, r0 @ a
259 mov r4, r0 @ b
260 ldr r5, =csa @ cs/ca
261.arl2:
262 ldmdb r3, {r6, r12}
263 ldmia r4, {r7, lr}
264
265 ldmia r5!, {r8, r9}
266 smull r10, r11, r7, r8
267 smlal r10, r11, r12, r9
268 movs r10, r10, lsr #28
269 adc r10, r10, r11, lsl #4
270
271 rsb r7, r7, #0
272 smull r11, r8, r12, r8
273 smlal r11, r8, r7, r9
274 movs r11, r11, lsr #28
275 adc r11, r11, r8, lsl #4
276
277 ldmia r5!, {r8, r9}
278 smull r12, r7, lr, r8
279 smlal r12, r7, r6, r9
280 movs r12, r12, lsr #28
281 adc r12, r12, r7, lsl #4
282 stmia r4!, {r10, r12}
283
284 rsb lr, lr, #0
285 smull r7, r10, r6, r8
286 smlal r7, r10, lr, r9
287 movs r7, r7, lsr #28
288 adc r7, r7, r10, lsl #4
289 stmdb r3!, {r7, r11}
290
291 subs r2, r2, #2
292 bne .arl2
293 add r0, r0, #72
294 cmp r0, r1
295 blo .arl1
296 ldmia sp!, {r4, r5, r6, r7, r8, r9, r10, r11, r12, pc}
297
298csa:
299 .word +0x0db84a81
300 .word -0x083b5fe7
301 .word +0x0e1b9d7f
302 .word -0x078c36d2
303 .word +0x0f31adcf
304 .word -0x05039814
305 .word +0x0fbba815
306 .word -0x02e91dd1
307 .word +0x0feda417
308 .word -0x0183603a
309 .word +0x0ffc8fc8
310 .word -0x00a7cb87
311 .word +0x0fff964c
312 .word -0x003a2847
313 .word +0x0ffff8d3
314 .word -0x000f27b4
315
316 .global III_overlap
317III_overlap:
318 stmdb sp!, {r4, r5, r6, r7, r8, lr}
319 add r2, r2, r3, lsl #2
320 mov r3, #6
321.ol:
322 ldmia r0!, {r4, r5, r6}
323 ldmia r1!, {r7, r8, lr}
324 add r4, r4, r7
325 add r5, r5, r8
326 add r6, r6, lr
327 str r4, [r2], #128
328 str r5, [r2], #128
329 str r6, [r2], #128
330 subs r3, r3, #1
331 bne .ol
332 sub r1, r1, #72
333 ldmia r0!, {r4, r5, r6, r7, r8, lr}
334 stmia r1!, {r4, r5, r6, r7, r8, lr}
335 ldmia r0!, {r4, r5, r6, r7, r8, lr}
336 stmia r1!, {r4, r5, r6, r7, r8, lr}
337 ldmia r0!, {r4, r5, r6, r7, r8, lr}
338 stmia r1!, {r4, r5, r6, r7, r8, lr}
339 ldmia sp!, {r4, r5, r6, r7, r8, pc}
340
341 .section .ibss,"aw",%nobits
342synth_full_sp:
343 .space 4
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