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1/***********************************************************************************
2
3 emu2413.c -- YM2413 emulator written by Mitsutaka Okazaki 2001
4
5 2001 01-08 : Version 0.10 -- 1st version.
6 2001 01-15 : Version 0.20 -- semi-public version.
7 2001 01-16 : Version 0.30 -- 1st public version.
8 2001 01-17 : Version 0.31 -- Fixed bassdrum problem.
9 : Version 0.32 -- LPF implemented.
10 2001 01-18 : Version 0.33 -- Fixed the drum problem, refine the mix-down method.
11 -- Fixed the LFO bug.
12 2001 01-24 : Version 0.35 -- Fixed the drum problem,
13 support undocumented EG behavior.
14 2001 02-02 : Version 0.38 -- Improved the performance.
15 Fixed the hi-hat and cymbal model.
16 Fixed the default percussive datas.
17 Noise reduction.
18 Fixed the feedback problem.
19 2001 03-03 : Version 0.39 -- Fixed some drum bugs.
20 Improved the performance.
21 2001 03-04 : Version 0.40 -- Improved the feedback.
22 Change the default table size.
23 Clock and Rate can be changed during play.
24 2001 06-24 : Version 0.50 -- Improved the hi-hat and the cymbal tone.
25 Added VRC7 patch (OPLL_reset_patch is changed).
26 Fixed OPLL_reset() bug.
27 Added OPLL_setMask, OPLL_getMask and OPLL_toggleMask.
28 Added OPLL_writeIO.
29 2001 09-28 : Version 0.51 -- Removed the noise table.
30 2002 01-28 : Version 0.52 -- Added Stereo mode.
31 2002 02-07 : Version 0.53 -- Fixed some drum bugs.
32 2002 02-20 : Version 0.54 -- Added the best quality mode.
33 2002 03-02 : Version 0.55 -- Removed OPLL_init & OPLL_close.
34 2002 05-30 : Version 0.60 -- Fixed HH&CYM generator and all voice datas.
35 2004 04-10 : Version 0.61 -- Added YMF281B tone (defined by Chabin).
36
37 2011 03-22 : --------------- Modified by gama to use precalculated tables.
38
39 References:
40 fmopl.c -- 1999,2000 written by Tatsuyuki Satoh (MAME development).
41 fmopl.c(fixed) -- (C) 2002 Jarek Burczynski.
42 s_opl.c -- 2001 written by Mamiya (NEZplug development).
43 fmgen.cpp -- 1999,2000 written by cisc.
44 fmpac.ill -- 2000 created by NARUTO.
45 MSX-Datapack
46 YMU757 data sheet
47 YM2143 data sheet
48
49**************************************************************************************/
50#include <stdio.h>
51#include <stdlib.h>
52#include <string.h>
53#include <math.h>
54#include "emu2413.h"
55
56#include "emutables.h"
57#if !defined(ROCKBOX)
58 #define EMU2413_CALCUL_TABLES
59#else
60 #define EMU2413_COMPACTION
61 #include "emutables.h"
62#endif
63
64#if defined(EMU2413_COMPACTION) && !defined(ROCKBOX)
65#define OPLL_TONE_NUM 1
66static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 16] = {
67 {
68#include "2413tone.h"
69 }
70};
71#else
72#define OPLL_TONE_NUM 3
73static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 16] = {
74 {
75#include "2413tone.h"
76 },
77 {
78#include "vrc7tone.h"
79 },
80 {
81#include "281btone.h"
82 }
83};
84#endif
85
86/* Size of Sintable ( 8 -- 18 can be used. 9 recommended.) */
87#define PG_BITS 9
88#define PG_WIDTH (1<<PG_BITS)
89
90/* Phase increment counter */
91#define DP_BITS 18
92#define DP_WIDTH (1<<DP_BITS)
93#define DP_BASE_BITS (DP_BITS - PG_BITS)
94
95/* Dynamic range (Accuracy of sin table) */
96#define DB_BITS 8
97#define DB_STEP (48.0/(1<<DB_BITS))
98#define DB_MUTE (1<<DB_BITS)
99
100/* Dynamic range of envelope */
101#define EG_STEP 0.375
102#define EG_BITS 7
103#define EG_MUTE (1<<EG_BITS)
104
105/* Dynamic range of total level */
106#define TL_STEP 0.75
107#define TL_BITS 6
108#define TL_MUTE (1<<TL_BITS)
109
110/* Dynamic range of sustine level */
111#define SL_STEP 3.0
112#define SL_BITS 4
113#define SL_MUTE (1<<SL_BITS)
114
115#define EG2DB(d) ((d)*(e_int32)(EG_STEP/DB_STEP))
116#define TL2EG(d) ((d)*(e_int32)(TL_STEP/EG_STEP))
117#define SL2EG(d) ((d)*(e_int32)(SL_STEP/EG_STEP))
118
119#define DB_POS(x) (e_uint32)((x)/DB_STEP)
120#define DB_NEG(x) (e_uint32)(DB_MUTE+DB_MUTE+(x)/DB_STEP)
121
122/* Bits for liner value */
123#define DB2LIN_AMP_BITS 8
124#define SLOT_AMP_BITS (DB2LIN_AMP_BITS)
125
126/* Bits for envelope phase incremental counter */
127#define EG_DP_BITS 22
128#define EG_DP_WIDTH (1<<EG_DP_BITS)
129
130/* Bits for Pitch and Amp modulator */
131#define PM_PG_BITS 8
132#define PM_PG_WIDTH (1<<PM_PG_BITS)
133#define PM_DP_BITS 16
134#define PM_DP_WIDTH (1<<PM_DP_BITS)
135#define AM_PG_BITS 8
136#define AM_PG_WIDTH (1<<AM_PG_BITS)
137#define AM_DP_BITS 16
138#define AM_DP_WIDTH (1<<AM_DP_BITS)
139
140/* PM table is calcurated by PM_AMP * pow(2,PM_DEPTH*sin(x)/1200) */
141#define PM_AMP_BITS 8
142#define PM_AMP (1<<PM_AMP_BITS)
143
144/* PM speed(Hz) and depth(cent) */
145#define PM_SPEED 6.4
146#define PM_DEPTH 13.75
147
148/* AM speed(Hz) and depth(dB) */
149#define AM_SPEED 3.6413
150#define AM_DEPTH 4.875
151
152/* Cut the lower b bit(s) off. */
153#define HIGHBITS(c,b) ((c)>>(b))
154
155/* Leave the lower b bit(s). */
156#define LOWBITS(c,b) ((c)&((1<<(b))-1))
157
158/* Expand x which is s bits to d bits. */
159#define EXPAND_BITS(x,s,d) ((x)<<((d)-(s)))
160
161/* Expand x which is s bits to d bits and fill expanded bits '1' */
162#define EXPAND_BITS_X(x,s,d) (((x)<<((d)-(s)))|((1<<((d)-(s)))-1))
163
164/* Adjust envelope speed which depends on sampling rate. */
165#define RATE_ADJUST(x) (rate==49716?(e_uint32)x:(e_uint32)((double)(x)*clk/72/rate + 0.5)) /* added 0.5 to round the value*/
166
167#define MOD(o,x) (&(o)->slot[(x)<<1])
168#define CAR(o,x) (&(o)->slot[((x)<<1)|1])
169
170#define BIT(s,b) (((s)>>(b))&1)
171
172/* Input clock */
173static e_uint32 clk = 844451141;
174/* Sampling rate */
175static e_uint32 rate = 3354932;
176
177/* WaveTable for each envelope amp */
178static e_uint16 fullsintable[PG_WIDTH];
179static e_uint16 halfsintable[PG_WIDTH];
180
181static e_uint16 *waveform[2] = { fullsintable, halfsintable };
182
183/* LFO Table */
184static e_int32 pmtable[PM_PG_WIDTH];
185static e_int32 amtable[AM_PG_WIDTH];
186
187/* Phase delta for LFO */
188static e_uint32 pm_dphase;
189static e_uint32 am_dphase;
190
191/* dB to Liner table */
192static e_int16 DB2LIN_TABLE[(DB_MUTE + DB_MUTE) * 2];
193
194/* Liner to Log curve conversion table (for Attack rate). */
195static e_uint16 AR_ADJUST_TABLE[1 << EG_BITS];
196
197/* Empty voice data */
198static OPLL_PATCH null_patch = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
199
200/* Basic voice Data */
201static OPLL_PATCH default_patch[OPLL_TONE_NUM][(16 + 3) * 2];
202
203/* Definition of envelope mode */
204enum OPLL_EG_STATE
205{ READY, ATTACK, DECAY, SUSHOLD, SUSTINE, RELEASE, SETTLE, FINISH };
206
207/* Phase incr table for Attack */
208static e_uint32 dphaseARTable[16][16];
209/* Phase incr table for Decay and Release */
210static e_uint32 dphaseDRTable[16][16];
211
212/* KSL + TL Table */
213static e_uint32 tllTable[16][8][1 << TL_BITS][4];
214static e_int32 rksTable[2][8][2];
215
216/* We may not have too much SRAM in rockbox */
217#if !defined(ROCKBOX)
218/* Phase incr table for PG */
219static e_uint32 dphaseTable[512][8][16];
220#endif
221
222/***************************************************
223
224 Create tables
225
226****************************************************/
227INLINE static e_int32
228Min (e_int32 i, e_int32 j)
229{
230 if (i < j)
231 return i;
232 else
233 return j;
234}
235
236/* Table for AR to LogCurve. */
237static void
238makeAdjustTable (void)
239{
240 e_int32 i;
241
242 AR_ADJUST_TABLE[0] = (1 << EG_BITS) - 1;
243 for (i = 1; i < (1<<EG_BITS); i++)
244 #ifdef EMU2413_CALCUL_TABLES
245 AR_ADJUST_TABLE[i] = (e_uint16) ((double) (1<<EG_BITS)-1 - ((1<<EG_BITS)-1)*log(i)/log(127));
246 #else
247 AR_ADJUST_TABLE[i] = ar_adjust_coeff[i];
248 #endif
249}
250
251
252/* Table for dB(0 -- (1<<DB_BITS)-1) to Liner(0 -- DB2LIN_AMP_WIDTH) */
253static void
254makeDB2LinTable (void)
255{
256 e_int32 i;
257 for (i = 0; i < DB_MUTE + DB_MUTE; i++)
258 {
259 #ifdef EMU2413_CALCUL_TABLES
260 DB2LIN_TABLE[i] = (e_int16) ((double) ((1 << DB2LIN_AMP_BITS) - 1) * pow (10, -(double) i * DB_STEP / 20));
261 #else
262 DB2LIN_TABLE[i] = db2lin_coeff[i];
263 #endif
264 if (i >= DB_MUTE) DB2LIN_TABLE[i] = 0;
265 DB2LIN_TABLE[i + DB_MUTE + DB_MUTE] = (e_int16) (-DB2LIN_TABLE[i]);
266 }
267}
268
269#ifdef EMU2413_CALCUL_TABLES
270/* Liner(+0.0 - +1.0) to dB((1<<DB_BITS) - 1 -- 0) */
271static e_int32
272lin2db (double d)
273{
274 if (d == 0)
275 return (DB_MUTE - 1);
276 else
277 return Min (-(e_int32) (20.0 * log10 (d) / DB_STEP), DB_MUTE-1); /* 0 -- 127 */
278}
279#endif
280
281/* Sin Table */
282static void
283makeSinTable (void)
284{
285 e_int32 i;
286
287 for (i = 0; i < PG_WIDTH / 4; i++)
288 #ifdef EMU2413_CALCUL_TABLES
289 fullsintable[i] = (e_uint32) lin2db (sin (2.0 * PI * i / PG_WIDTH) );
290 #else
291 fullsintable[i] = sin_coeff[i];
292 #endif
293
294 for (i = 0; i < PG_WIDTH / 4; i++)
295 {
296 fullsintable[PG_WIDTH / 2 - 1 - i] = fullsintable[i];
297 }
298
299 for (i = 0; i < PG_WIDTH / 2; i++)
300 {
301 fullsintable[PG_WIDTH / 2 + i] = (e_uint32) (DB_MUTE + DB_MUTE + fullsintable[i]);
302 }
303
304 for (i = 0; i < PG_WIDTH / 2; i++)
305 halfsintable[i] = fullsintable[i];
306 for (i = PG_WIDTH / 2; i < PG_WIDTH; i++)
307 halfsintable[i] = fullsintable[0];
308}
309
310static double saw(double phase)
311{
312 if(phase <= PI/2)
313 return phase * 2 / PI ;
314 else if(phase <= PI*3/2)
315 return 2.0 - ( phase * 2 / PI );
316 else
317 return -4.0 + phase * 2 / PI;
318}
319
320/* Table for Pitch Modulator */
321static void
322makePmTable (void)
323{
324 e_int32 i;
325
326 for (i = 0; i < PM_PG_WIDTH; i++)
327 /* pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * sin (2.0 * PI * i / PM_PG_WIDTH) / 1200)); */
328 #ifdef EMU2413_CALCUL_TABLES
329 pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * saw (2.0 * PI * i / PM_PG_WIDTH) / 1200));
330 #else
331 pmtable[i] = pm_coeff[i];
332 #endif
333}
334
335/* Table for Amp Modulator */
336static void
337makeAmTable (void)
338{
339 e_int32 i;
340
341 for (i = 0; i < AM_PG_WIDTH; i++)
342 /* amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + sin (2.0 * PI * i / PM_PG_WIDTH))); */
343 amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + saw (2.0 * PI * i / PM_PG_WIDTH)));
344}
345
346#if !defined(ROCKBOX)
347/* Phase increment counter table */
348static void
349makeDphaseTable (void)
350{
351 e_uint32 fnum, block, ML;
352 e_uint32 mltable[16] =
353 { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 };
354
355 for (fnum = 0; fnum < 512; fnum++)
356 for (block = 0; block < 8; block++)
357 for (ML = 0; ML < 16; ML++)
358 dphaseTable[fnum][block][ML] = RATE_ADJUST (((fnum * mltable[ML]) << block) >> (20 - DP_BITS));
359}
360#endif
361
362static void
363makeTllTable (void)
364{
365#define dB2(x) ((x)*2)
366
367 static double kltable[16] = {
368 dB2 (0.000), dB2 (9.000), dB2 (12.000), dB2 (13.875), dB2 (15.000), dB2 (16.125), dB2 (16.875), dB2 (17.625),
369 dB2 (18.000), dB2 (18.750), dB2 (19.125), dB2 (19.500), dB2 (19.875), dB2 (20.250), dB2 (20.625), dB2 (21.000)
370 };
371
372 e_int32 tmp;
373 e_int32 fnum, block, TL, KL;
374
375 for (fnum = 0; fnum < 16; fnum++)
376 for (block = 0; block < 8; block++)
377 for (TL = 0; TL < 64; TL++)
378 for (KL = 0; KL < 4; KL++)
379 {
380 if (KL == 0)
381 {
382 tllTable[fnum][block][TL][KL] = TL2EG (TL);
383 }
384 else
385 {
386 tmp = (e_int32) (kltable[fnum] - dB2 (3.000) * (7 - block));
387 if (tmp <= 0)
388 tllTable[fnum][block][TL][KL] = TL2EG (TL);
389 else
390 tllTable[fnum][block][TL][KL] = (e_uint32) ((tmp >> (3 - KL)) / EG_STEP) + TL2EG (TL);
391 }
392 }
393}
394
395#ifdef USE_SPEC_ENV_SPEED
396static double attacktime[16][4] = {
397 {0, 0, 0, 0},
398 {1730.15, 1400.60, 1153.43, 988.66},
399 {865.08, 700.30, 576.72, 494.33},
400 {432.54, 350.15, 288.36, 247.16},
401 {216.27, 175.07, 144.18, 123.58},
402 {108.13, 87.54, 72.09, 61.79},
403 {54.07, 43.77, 36.04, 30.90},
404 {27.03, 21.88, 18.02, 15.45},
405 {13.52, 10.94, 9.01, 7.72},
406 {6.76, 5.47, 4.51, 3.86},
407 {3.38, 2.74, 2.25, 1.93},
408 {1.69, 1.37, 1.13, 0.97},
409 {0.84, 0.70, 0.60, 0.54},
410 {0.50, 0.42, 0.34, 0.30},
411 {0.28, 0.22, 0.18, 0.14},
412 {0.00, 0.00, 0.00, 0.00}
413};
414
415static double decaytime[16][4] = {
416 {0, 0, 0, 0},
417 {20926.60, 16807.20, 14006.00, 12028.60},
418 {10463.30, 8403.58, 7002.98, 6014.32},
419 {5231.64, 4201.79, 3501.49, 3007.16},
420 {2615.82, 2100.89, 1750.75, 1503.58},
421 {1307.91, 1050.45, 875.37, 751.79},
422 {653.95, 525.22, 437.69, 375.90},
423 {326.98, 262.61, 218.84, 187.95},
424 {163.49, 131.31, 109.42, 93.97},
425 {81.74, 65.65, 54.71, 46.99},
426 {40.87, 32.83, 27.36, 23.49},
427 {20.44, 16.41, 13.68, 11.75},
428 {10.22, 8.21, 6.84, 5.87},
429 {5.11, 4.10, 3.42, 2.94},
430 {2.55, 2.05, 1.71, 1.47},
431 {1.27, 1.27, 1.27, 1.27}
432};
433#endif
434
435/* Rate Table for Attack */
436static void
437makeDphaseARTable (void)
438{
439 e_int32 AR, Rks, RM, RL;
440
441#ifdef USE_SPEC_ENV_SPEED
442 e_uint32 attacktable[16][4];
443
444 for (RM = 0; RM < 16; RM++)
445 for (RL = 0; RL < 4; RL++)
446 {
447 if (RM == 0)
448 attacktable[RM][RL] = 0;
449 else if (RM == 15)
450 attacktable[RM][RL] = EG_DP_WIDTH;
451 else
452 attacktable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (attacktime[RM][RL] * 3579545 / 72000));
453
454 }
455#endif
456
457 for (AR = 0; AR < 16; AR++)
458 for (Rks = 0; Rks < 16; Rks++)
459 {
460 RM = AR + (Rks >> 2);
461 RL = Rks & 3;
462 if (RM > 15)
463 RM = 15;
464 switch (AR)
465 {
466 case 0:
467 dphaseARTable[AR][Rks] = 0;
468 break;
469 case 15:
470 dphaseARTable[AR][Rks] = 0;/*EG_DP_WIDTH;*/
471 break;
472 default:
473#ifdef USE_SPEC_ENV_SPEED
474 dphaseARTable[AR][Rks] = RATE_ADJUST (attacktable[RM][RL]);
475#else
476 dphaseARTable[AR][Rks] = RATE_ADJUST ((3 * (RL + 4) << (RM + 1)));
477#endif
478 break;
479 }
480 }
481}
482
483/* Rate Table for Decay and Release */
484static void
485makeDphaseDRTable (void)
486{
487 e_int32 DR, Rks, RM, RL;
488
489#ifdef USE_SPEC_ENV_SPEED
490 e_uint32 decaytable[16][4];
491
492 for (RM = 0; RM < 16; RM++)
493 for (RL = 0; RL < 4; RL++)
494 if (RM == 0)
495 decaytable[RM][RL] = 0;
496 else
497 decaytable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (decaytime[RM][RL] * 3579545 / 72000));
498#endif
499
500 for (DR = 0; DR < 16; DR++)
501 for (Rks = 0; Rks < 16; Rks++)
502 {
503 RM = DR + (Rks >> 2);
504 RL = Rks & 3;
505 if (RM > 15)
506 RM = 15;
507 switch (DR)
508 {
509 case 0:
510 dphaseDRTable[DR][Rks] = 0;
511 break;
512 default:
513#ifdef USE_SPEC_ENV_SPEED
514 dphaseDRTable[DR][Rks] = RATE_ADJUST (decaytable[RM][RL]);
515#else
516 dphaseDRTable[DR][Rks] = RATE_ADJUST ((RL + 4) << (RM - 1));
517#endif
518 break;
519 }
520 }
521}
522
523static void
524makeRksTable (void)
525{
526
527 e_int32 fnum8, block, KR;
528
529 for (fnum8 = 0; fnum8 < 2; fnum8++)
530 for (block = 0; block < 8; block++)
531 for (KR = 0; KR < 2; KR++)
532 {
533 if (KR != 0)
534 rksTable[fnum8][block][KR] = (block << 1) + fnum8;
535 else
536 rksTable[fnum8][block][KR] = block >> 1;
537 }
538}
539
540void
541OPLL_dump2patch (const e_uint8 * dump, OPLL_PATCH * patch)
542{
543 patch[0].AM = (dump[0] >> 7) & 1;
544 patch[1].AM = (dump[1] >> 7) & 1;
545 patch[0].PM = (dump[0] >> 6) & 1;
546 patch[1].PM = (dump[1] >> 6) & 1;
547 patch[0].EG = (dump[0] >> 5) & 1;
548 patch[1].EG = (dump[1] >> 5) & 1;
549 patch[0].KR = (dump[0] >> 4) & 1;
550 patch[1].KR = (dump[1] >> 4) & 1;
551 patch[0].ML = (dump[0]) & 15;
552 patch[1].ML = (dump[1]) & 15;
553 patch[0].KL = (dump[2] >> 6) & 3;
554 patch[1].KL = (dump[3] >> 6) & 3;
555 patch[0].TL = (dump[2]) & 63;
556 patch[0].FB = (dump[3]) & 7;
557 patch[0].WF = (dump[3] >> 3) & 1;
558 patch[1].WF = (dump[3] >> 4) & 1;
559 patch[0].AR = (dump[4] >> 4) & 15;
560 patch[1].AR = (dump[5] >> 4) & 15;
561 patch[0].DR = (dump[4]) & 15;
562 patch[1].DR = (dump[5]) & 15;
563 patch[0].SL = (dump[6] >> 4) & 15;
564 patch[1].SL = (dump[7] >> 4) & 15;
565 patch[0].RR = (dump[6]) & 15;
566 patch[1].RR = (dump[7]) & 15;
567}
568
569void
570OPLL_getDefaultPatch (e_int32 type, e_int32 num, OPLL_PATCH * patch)
571{
572 OPLL_dump2patch (default_inst[type] + num * 16, patch);
573}
574
575static void
576makeDefaultPatch ( void )
577{
578 e_int32 i, j;
579
580 for (i = 0; i < OPLL_TONE_NUM; i++)
581 for (j = 0; j < 19; j++)
582 OPLL_getDefaultPatch (i, j, &default_patch[i][j * 2]);
583
584}
585
586void
587OPLL_setPatch (OPLL * opll, const e_uint8 * dump)
588{
589 OPLL_PATCH patch[2];
590 int i;
591
592 for (i = 0; i < 19; i++)
593 {
594 OPLL_dump2patch (dump + i * 16, patch);
595 memcpy (&opll->patch[i*2+0], &patch[0], sizeof (OPLL_PATCH));
596 memcpy (&opll->patch[i*2+1], &patch[1], sizeof (OPLL_PATCH));
597 }
598}
599
600void
601OPLL_patch2dump (const OPLL_PATCH * patch, e_uint8 * dump)
602{
603 dump[0] = (e_uint8) ((patch[0].AM << 7) + (patch[0].PM << 6) + (patch[0].EG << 5) + (patch[0].KR << 4) + patch[0].ML);
604 dump[1] = (e_uint8) ((patch[1].AM << 7) + (patch[1].PM << 6) + (patch[1].EG << 5) + (patch[1].KR << 4) + patch[1].ML);
605 dump[2] = (e_uint8) ((patch[0].KL << 6) + patch[0].TL);
606 dump[3] = (e_uint8) ((patch[1].KL << 6) + (patch[1].WF << 4) + (patch[0].WF << 3) + patch[0].FB);
607 dump[4] = (e_uint8) ((patch[0].AR << 4) + patch[0].DR);
608 dump[5] = (e_uint8) ((patch[1].AR << 4) + patch[1].DR);
609 dump[6] = (e_uint8) ((patch[0].SL << 4) + patch[0].RR);
610 dump[7] = (e_uint8) ((patch[1].SL << 4) + patch[1].RR);
611 dump[8] = 0;
612 dump[9] = 0;
613 dump[10] = 0;
614 dump[11] = 0;
615 dump[12] = 0;
616 dump[13] = 0;
617 dump[14] = 0;
618 dump[15] = 0;
619}
620
621/************************************************************
622
623 Calc Parameters
624
625************************************************************/
626
627INLINE static e_uint32
628calc_eg_dphase (OPLL_SLOT * slot)
629{
630
631 switch (slot->eg_mode)
632 {
633 case ATTACK:
634 return dphaseARTable[slot->patch->AR][slot->rks];
635
636 case DECAY:
637 return dphaseDRTable[slot->patch->DR][slot->rks];
638
639 case SUSHOLD:
640 return 0;
641
642 case SUSTINE:
643 return dphaseDRTable[slot->patch->RR][slot->rks];
644
645 case RELEASE:
646 if (slot->sustine)
647 return dphaseDRTable[5][slot->rks];
648 else if (slot->patch->EG)
649 return dphaseDRTable[slot->patch->RR][slot->rks];
650 else
651 return dphaseDRTable[7][slot->rks];
652
653 case SETTLE:
654 return dphaseDRTable[15][0];
655
656 case FINISH:
657 return 0;
658
659 default:
660 return 0;
661 }
662}
663
664/*************************************************************
665
666 OPLL internal interfaces
667
668*************************************************************/
669#define SLOT_BD1 12
670#define SLOT_BD2 13
671#define SLOT_HH 14
672#define SLOT_SD 15
673#define SLOT_TOM 16
674#define SLOT_CYM 17
675
676/* We will set this dinamically, but not sure if this affects playback */
677#if defined(ROCKBOX)
678INLINE static void
679UPDATE_PG(OPLL_SLOT * slot)
680{
681 static const e_uint32 mltable[16] =
682 { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 };
683
684 slot->dphase = RATE_ADJUST (((slot->fnum * mltable[slot->patch->ML]) << slot->block) >> (20 - DP_BITS));
685}
686#else
687#define UPDATE_PG(S) (S)->dphase = dphaseTable[(S)->fnum][(S)->block][(S)->patch->ML]
688#endif
689
690#define UPDATE_TLL(S)\
691(((S)->type==0)?\
692((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->patch->TL][(S)->patch->KL]):\
693((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->volume][(S)->patch->KL]))
694#define UPDATE_RKS(S) (S)->rks = rksTable[((S)->fnum)>>8][(S)->block][(S)->patch->KR]
695#define UPDATE_WF(S) (S)->sintbl = waveform[(S)->patch->WF]
696#define UPDATE_EG(S) (S)->eg_dphase = calc_eg_dphase(S)
697#define UPDATE_ALL(S)\
698 UPDATE_PG(S);\
699 UPDATE_TLL(S);\
700 UPDATE_RKS(S);\
701 UPDATE_WF(S); \
702 UPDATE_EG(S) /* EG should be updated last. */
703
704
705/* Slot key on */
706INLINE static void
707slotOn (OPLL_SLOT * slot)
708{
709 slot->eg_mode = ATTACK;
710 slot->eg_phase = 0;
711 slot->phase = 0;
712 UPDATE_EG(slot);
713}
714
715/* Slot key on without reseting the phase */
716INLINE static void
717slotOn2 (OPLL_SLOT * slot)
718{
719 slot->eg_mode = ATTACK;
720 slot->eg_phase = 0;
721 UPDATE_EG(slot);
722}
723
724/* Slot key off */
725INLINE static void
726slotOff (OPLL_SLOT * slot)
727{
728 if (slot->eg_mode == ATTACK)
729 slot->eg_phase = EXPAND_BITS (AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)], EG_BITS, EG_DP_BITS);
730 slot->eg_mode = RELEASE;
731 UPDATE_EG(slot);
732}
733
734/* Channel key on */
735INLINE static void
736keyOn (OPLL * opll, e_int32 i)
737{
738 if (!opll->slot_on_flag[i * 2])
739 slotOn (MOD(opll,i));
740 if (!opll->slot_on_flag[i * 2 + 1])
741 slotOn (CAR(opll,i));
742 opll->key_status[i] = 1;
743}
744
745/* Channel key off */
746INLINE static void
747keyOff (OPLL * opll, e_int32 i)
748{
749 if (opll->slot_on_flag[i * 2 + 1])
750 slotOff (CAR(opll,i));
751 opll->key_status[i] = 0;
752}
753
754INLINE static void
755keyOn_BD (OPLL * opll)
756{
757 keyOn (opll, 6);
758}
759INLINE static void
760keyOn_SD (OPLL * opll)
761{
762 if (!opll->slot_on_flag[SLOT_SD])
763 slotOn (CAR(opll,7));
764}
765INLINE static void
766keyOn_TOM (OPLL * opll)
767{
768 if (!opll->slot_on_flag[SLOT_TOM])
769 slotOn (MOD(opll,8));
770}
771INLINE static void
772keyOn_HH (OPLL * opll)
773{
774 if (!opll->slot_on_flag[SLOT_HH])
775 slotOn2 (MOD(opll,7));
776}
777INLINE static void
778keyOn_CYM (OPLL * opll)
779{
780 if (!opll->slot_on_flag[SLOT_CYM])
781 slotOn2 (CAR(opll,8));
782}
783
784/* Drum key off */
785INLINE static void
786keyOff_BD (OPLL * opll)
787{
788 keyOff (opll, 6);
789}
790INLINE static void
791keyOff_SD (OPLL * opll)
792{
793 if (opll->slot_on_flag[SLOT_SD])
794 slotOff (CAR(opll,7));
795}
796INLINE static void
797keyOff_TOM (OPLL * opll)
798{
799 if (opll->slot_on_flag[SLOT_TOM])
800 slotOff (MOD(opll,8));
801}
802INLINE static void
803keyOff_HH (OPLL * opll)
804{
805 if (opll->slot_on_flag[SLOT_HH])
806 slotOff (MOD(opll,7));
807}
808INLINE static void
809keyOff_CYM (OPLL * opll)
810{
811 if (opll->slot_on_flag[SLOT_CYM])
812 slotOff (CAR(opll,8));
813}
814
815/* Change a voice */
816INLINE static void
817setPatch (OPLL * opll, e_int32 i, e_int32 num)
818{
819 opll->patch_number[i] = num;
820 MOD(opll,i)->patch = &opll->patch[num * 2 + 0];
821 CAR(opll,i)->patch = &opll->patch[num * 2 + 1];
822}
823
824/* Change a rhythm voice */
825INLINE static void
826setSlotPatch (OPLL_SLOT * slot, OPLL_PATCH * patch)
827{
828 slot->patch = patch;
829}
830
831/* Set sustine parameter */
832INLINE static void
833setSustine (OPLL * opll, e_int32 c, e_int32 sustine)
834{
835 CAR(opll,c)->sustine = sustine;
836 if (MOD(opll,c)->type)
837 MOD(opll,c)->sustine = sustine;
838}
839
840/* Volume : 6bit ( Volume register << 2 ) */
841INLINE static void
842setVolume (OPLL * opll, e_int32 c, e_int32 volume)
843{
844 CAR(opll,c)->volume = volume;
845}
846
847INLINE static void
848setSlotVolume (OPLL_SLOT * slot, e_int32 volume)
849{
850 slot->volume = volume;
851}
852
853/* Set F-Number ( fnum : 9bit ) */
854INLINE static void
855setFnumber (OPLL * opll, e_int32 c, e_int32 fnum)
856{
857 CAR(opll,c)->fnum = fnum;
858 MOD(opll,c)->fnum = fnum;
859}
860
861/* Set Block data (block : 3bit ) */
862INLINE static void
863setBlock (OPLL * opll, e_int32 c, e_int32 block)
864{
865 CAR(opll,c)->block = block;
866 MOD(opll,c)->block = block;
867}
868
869/* Change Rhythm Mode */
870INLINE static void
871update_rhythm_mode (OPLL * opll)
872{
873 if (opll->patch_number[6] & 0x10)
874 {
875 if (!(opll->slot_on_flag[SLOT_BD2] | (opll->reg[0x0e] & 32)))
876 {
877 opll->slot[SLOT_BD1].eg_mode = FINISH;
878 opll->slot[SLOT_BD2].eg_mode = FINISH;
879 setPatch (opll, 6, opll->reg[0x36] >> 4);
880 }
881 }
882 else if (opll->reg[0x0e] & 32)
883 {
884 opll->patch_number[6] = 16;
885 opll->slot[SLOT_BD1].eg_mode = FINISH;
886 opll->slot[SLOT_BD2].eg_mode = FINISH;
887 setSlotPatch (&opll->slot[SLOT_BD1], &opll->patch[16 * 2 + 0]);
888 setSlotPatch (&opll->slot[SLOT_BD2], &opll->patch[16 * 2 + 1]);
889 }
890
891 if (opll->patch_number[7] & 0x10)
892 {
893 if (!((opll->slot_on_flag[SLOT_HH] && opll->slot_on_flag[SLOT_SD]) | (opll->reg[0x0e] & 32)))
894 {
895 opll->slot[SLOT_HH].type = 0;
896 opll->slot[SLOT_HH].eg_mode = FINISH;
897 opll->slot[SLOT_SD].eg_mode = FINISH;
898 setPatch (opll, 7, opll->reg[0x37] >> 4);
899 }
900 }
901 else if (opll->reg[0x0e] & 32)
902 {
903 opll->patch_number[7] = 17;
904 opll->slot[SLOT_HH].type = 1;
905 opll->slot[SLOT_HH].eg_mode = FINISH;
906 opll->slot[SLOT_SD].eg_mode = FINISH;
907 setSlotPatch (&opll->slot[SLOT_HH], &opll->patch[17 * 2 + 0]);
908 setSlotPatch (&opll->slot[SLOT_SD], &opll->patch[17 * 2 + 1]);
909 }
910
911 if (opll->patch_number[8] & 0x10)
912 {
913 if (!((opll->slot_on_flag[SLOT_CYM] && opll->slot_on_flag[SLOT_TOM]) | (opll->reg[0x0e] & 32)))
914 {
915 opll->slot[SLOT_TOM].type = 0;
916 opll->slot[SLOT_TOM].eg_mode = FINISH;
917 opll->slot[SLOT_CYM].eg_mode = FINISH;
918 setPatch (opll, 8, opll->reg[0x38] >> 4);
919 }
920 }
921 else if (opll->reg[0x0e] & 32)
922 {
923 opll->patch_number[8] = 18;
924 opll->slot[SLOT_TOM].type = 1;
925 opll->slot[SLOT_TOM].eg_mode = FINISH;
926 opll->slot[SLOT_CYM].eg_mode = FINISH;
927 setSlotPatch (&opll->slot[SLOT_TOM], &opll->patch[18 * 2 + 0]);
928 setSlotPatch (&opll->slot[SLOT_CYM], &opll->patch[18 * 2 + 1]);
929 }
930}
931
932INLINE static void
933update_key_status (OPLL * opll)
934{
935 int ch;
936
937 for (ch = 0; ch < 9; ch++)
938 opll->slot_on_flag[ch * 2] = opll->slot_on_flag[ch * 2 + 1] = (opll->reg[0x20 + ch]) & 0x10;
939
940 if (opll->reg[0x0e] & 32)
941 {
942 opll->slot_on_flag[SLOT_BD1] |= (opll->reg[0x0e] & 0x10);
943 opll->slot_on_flag[SLOT_BD2] |= (opll->reg[0x0e] & 0x10);
944 opll->slot_on_flag[SLOT_SD] |= (opll->reg[0x0e] & 0x08);
945 opll->slot_on_flag[SLOT_HH] |= (opll->reg[0x0e] & 0x01);
946 opll->slot_on_flag[SLOT_TOM] |= (opll->reg[0x0e] & 0x04);
947 opll->slot_on_flag[SLOT_CYM] |= (opll->reg[0x0e] & 0x02);
948 }
949}
950
951void
952OPLL_copyPatch (OPLL * opll, e_int32 num, OPLL_PATCH * patch)
953{
954 memcpy (&opll->patch[num], patch, sizeof (OPLL_PATCH));
955}
956
957/***********************************************************
958
959 Initializing
960
961***********************************************************/
962
963static void
964OPLL_SLOT_reset (OPLL_SLOT * slot, int type)
965{
966 slot->type = type;
967 slot->sintbl = waveform[0];
968 slot->phase = 0;
969 slot->dphase = 0;
970 slot->output[0] = 0;
971 slot->output[1] = 0;
972 slot->feedback = 0;
973 slot->eg_mode = FINISH;
974 slot->eg_phase = EG_DP_WIDTH;
975 slot->eg_dphase = 0;
976 slot->rks = 0;
977 slot->tll = 0;
978 slot->sustine = 0;
979 slot->fnum = 0;
980 slot->block = 0;
981 slot->volume = 0;
982 slot->pgout = 0;
983 slot->egout = 0;
984 slot->patch = &null_patch;
985}
986
987static void
988internal_refresh (void)
989{
990#if !defined(ROCKBOX)
991 makeDphaseTable ();
992#endif
993 makeDphaseARTable ();
994 makeDphaseDRTable ();
995 pm_dphase = (e_uint32) RATE_ADJUST (PM_SPEED * PM_DP_WIDTH / (clk / 72));
996 am_dphase = (e_uint32) RATE_ADJUST (AM_SPEED * AM_DP_WIDTH / (clk / 72));
997}
998
999static void
1000maketables (e_uint32 c, e_uint32 r)
1001{
1002 if (c != clk)
1003 {
1004 clk = c;
1005 makePmTable ();
1006 makeAmTable ();
1007 makeDB2LinTable ();
1008 makeAdjustTable ();
1009 makeTllTable ();
1010 makeRksTable ();
1011 makeSinTable ();
1012 makeDefaultPatch ();
1013 }
1014
1015 if (r != rate)
1016 {
1017 rate = r;
1018 internal_refresh ();
1019 }
1020}
1021
1022void
1023OPLL_new (OPLL *opll, e_uint32 clk, e_uint32 rate)
1024{
1025 e_int32 i;
1026
1027 maketables (clk, rate);
1028
1029 memset(opll, 0, sizeof (OPLL));
1030 for (i = 0; i < 19 * 2; i++)
1031 memcpy(&opll->patch[i],&null_patch,sizeof(OPLL_PATCH));
1032
1033 opll->mask = 0;
1034
1035 OPLL_reset (opll);
1036 OPLL_reset_patch (opll, 0);
1037}
1038
1039
1040void
1041OPLL_delete (OPLL * opll)
1042{
1043 (void) opll;
1044}
1045
1046
1047/* Reset patch datas by system default. */
1048void
1049OPLL_reset_patch (OPLL * opll, e_int32 type)
1050{
1051 e_int32 i;
1052
1053 for (i = 0; i < 19 * 2; i++)
1054 OPLL_copyPatch (opll, i, &default_patch[type % OPLL_TONE_NUM][i]);
1055}
1056
1057/* Reset whole of OPLL except patch datas. */
1058void
1059OPLL_reset (OPLL * opll)
1060{
1061 e_int32 i;
1062
1063 if (!opll)
1064 return;
1065
1066 opll->adr = 0;
1067 opll->out = 0;
1068
1069 opll->pm_phase = 0;
1070 opll->am_phase = 0;
1071
1072 opll->noise_seed = 0xffff;
1073 opll->mask = 0;
1074
1075 for (i = 0; i <18; i++)
1076 OPLL_SLOT_reset(&opll->slot[i], i%2);
1077
1078 for (i = 0; i < 9; i++)
1079 {
1080 opll->key_status[i] = 0;
1081 setPatch (opll, i, 0);
1082 }
1083
1084 for (i = 0; i < 0x40; i++)
1085 OPLL_writeReg (opll, i, 0);
1086
1087#ifndef EMU2413_COMPACTION
1088 opll->realstep = (e_uint32) ((1 << 31) / rate);
1089 opll->opllstep = (e_uint32) ((1 << 31) / (clk / 72));
1090 opll->oplltime = 0;
1091 for (i = 0; i < 14; i++)
1092 opll->pan[i] = 2;
1093 opll->sprev[0] = opll->sprev[1] = 0;
1094 opll->snext[0] = opll->snext[1] = 0;
1095#endif
1096}
1097
1098/* Force Refresh (When external program changes some parameters). */
1099void
1100OPLL_forceRefresh (OPLL * opll)
1101{
1102 e_int32 i;
1103
1104 if (opll == NULL)
1105 return;
1106
1107 for (i = 0; i < 9; i++)
1108 setPatch(opll,i,opll->patch_number[i]);
1109
1110 for (i = 0; i < 18; i++)
1111 {
1112 UPDATE_PG (&opll->slot[i]);
1113 UPDATE_RKS (&opll->slot[i]);
1114 UPDATE_TLL (&opll->slot[i]);
1115 UPDATE_WF (&opll->slot[i]);
1116 UPDATE_EG (&opll->slot[i]);
1117 }
1118}
1119
1120void
1121OPLL_set_rate (OPLL * opll, e_uint32 r)
1122{
1123 if (rate == r) return;
1124 if (opll->quality)
1125 rate = 49716;
1126 else
1127 rate = r;
1128 internal_refresh ();
1129 rate = r;
1130}
1131
1132void
1133OPLL_set_quality (OPLL * opll, e_uint32 q)
1134{
1135 opll->quality = q;
1136 OPLL_set_rate (opll, rate);
1137}
1138
1139/*********************************************************
1140
1141 Generate wave data
1142
1143*********************************************************/
1144/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 2PI). */
1145#if ( SLOT_AMP_BITS - PG_BITS ) > 0
1146#define wave2_2pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS ))
1147#else
1148#define wave2_2pi(e) ( (e) << ( PG_BITS - SLOT_AMP_BITS ))
1149#endif
1150
1151/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 4PI). */
1152#if ( SLOT_AMP_BITS - PG_BITS - 1 ) == 0
1153#define wave2_4pi(e) (e)
1154#elif ( SLOT_AMP_BITS - PG_BITS - 1 ) > 0
1155#define wave2_4pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 1 ))
1156#else
1157#define wave2_4pi(e) ( (e) << ( 1 + PG_BITS - SLOT_AMP_BITS ))
1158#endif
1159
1160/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 8PI). */
1161#if ( SLOT_AMP_BITS - PG_BITS - 2 ) == 0
1162#define wave2_8pi(e) (e)
1163#elif ( SLOT_AMP_BITS - PG_BITS - 2 ) > 0
1164#define wave2_8pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 2 ))
1165#else
1166#define wave2_8pi(e) ( (e) << ( 2 + PG_BITS - SLOT_AMP_BITS ))
1167#endif
1168
1169/* Update AM, PM unit */
1170static void
1171update_ampm (OPLL * opll)
1172{
1173 opll->pm_phase = (opll->pm_phase + pm_dphase) & (PM_DP_WIDTH - 1);
1174 opll->am_phase = (opll->am_phase + am_dphase) & (AM_DP_WIDTH - 1);
1175 opll->lfo_am = amtable[HIGHBITS (opll->am_phase, AM_DP_BITS - AM_PG_BITS)];
1176 opll->lfo_pm = pmtable[HIGHBITS (opll->pm_phase, PM_DP_BITS - PM_PG_BITS)];
1177}
1178
1179/* PG */
1180INLINE static void
1181calc_phase (OPLL_SLOT * slot, e_int32 lfo)
1182{
1183 if (slot->patch->PM)
1184 slot->phase += (slot->dphase * lfo) >> PM_AMP_BITS;
1185 else
1186 slot->phase += slot->dphase;
1187
1188 slot->phase &= (DP_WIDTH - 1);
1189
1190 slot->pgout = HIGHBITS (slot->phase, DP_BASE_BITS);
1191}
1192
1193/* Update Noise unit */
1194static void
1195update_noise (OPLL * opll)
1196{
1197 if(opll->noise_seed&1) opll->noise_seed ^= 0x8003020;
1198 opll->noise_seed >>= 1;
1199}
1200
1201/* EG */
1202static void
1203calc_envelope (OPLL_SLOT * slot, e_int32 lfo)
1204{
1205#define S2E(x) (SL2EG((e_int32)(x/SL_STEP))<<(EG_DP_BITS-EG_BITS))
1206
1207 static e_uint32 SL[16] = {
1208 S2E (0.0), S2E (3.0), S2E (6.0), S2E (9.0), S2E (12.0), S2E (15.0), S2E (18.0), S2E (21.0),
1209 S2E (24.0), S2E (27.0), S2E (30.0), S2E (33.0), S2E (36.0), S2E (39.0), S2E (42.0), S2E (48.0)
1210 };
1211
1212 e_uint32 egout;
1213
1214 switch (slot->eg_mode)
1215 {
1216 case ATTACK:
1217 egout = AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)];
1218 slot->eg_phase += slot->eg_dphase;
1219 if((EG_DP_WIDTH & slot->eg_phase)||(slot->patch->AR==15))
1220 {
1221 egout = 0;
1222 slot->eg_phase = 0;
1223 slot->eg_mode = DECAY;
1224 UPDATE_EG (slot);
1225 }
1226 break;
1227
1228 case DECAY:
1229 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1230 slot->eg_phase += slot->eg_dphase;
1231 if (slot->eg_phase >= SL[slot->patch->SL])
1232 {
1233 if (slot->patch->EG)
1234 {
1235 slot->eg_phase = SL[slot->patch->SL];
1236 slot->eg_mode = SUSHOLD;
1237 UPDATE_EG (slot);
1238 }
1239 else
1240 {
1241 slot->eg_phase = SL[slot->patch->SL];
1242 slot->eg_mode = SUSTINE;
1243 UPDATE_EG (slot);
1244 }
1245 }
1246 break;
1247
1248 case SUSHOLD:
1249 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1250 if (slot->patch->EG == 0)
1251 {
1252 slot->eg_mode = SUSTINE;
1253 UPDATE_EG (slot);
1254 }
1255 break;
1256
1257 case SUSTINE:
1258 case RELEASE:
1259 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1260 slot->eg_phase += slot->eg_dphase;
1261 if (egout >= (1 << EG_BITS))
1262 {
1263 slot->eg_mode = FINISH;
1264 egout = (1 << EG_BITS) - 1;
1265 }
1266 break;
1267
1268 case SETTLE:
1269 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1270 slot->eg_phase += slot->eg_dphase;
1271 if (egout >= (1 << EG_BITS))
1272 {
1273 slot->eg_mode = ATTACK;
1274 egout = (1 << EG_BITS) - 1;
1275 UPDATE_EG(slot);
1276 }
1277 break;
1278
1279 case FINISH:
1280 egout = (1 << EG_BITS) - 1;
1281 break;
1282
1283 default:
1284 egout = (1 << EG_BITS) - 1;
1285 break;
1286 }
1287
1288 if (slot->patch->AM)
1289 egout = EG2DB (egout + slot->tll) + lfo;
1290 else
1291 egout = EG2DB (egout + slot->tll);
1292
1293 if (egout >= DB_MUTE)
1294 egout = DB_MUTE - 1;
1295
1296 slot->egout = egout | 3;
1297}
1298
1299/* CARRIOR */
1300INLINE static e_int32
1301calc_slot_car (OPLL_SLOT * slot, e_int32 fm)
1302{
1303 if (slot->egout >= (DB_MUTE - 1))
1304 {
1305 slot->output[0] = 0;
1306 }
1307 else
1308 {
1309 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+wave2_8pi(fm))&(PG_WIDTH-1)] + slot->egout];
1310 }
1311
1312 slot->output[1] = (slot->output[1] + slot->output[0]) >> 1;
1313 return slot->output[1];
1314}
1315
1316/* MODULATOR */
1317INLINE static e_int32
1318calc_slot_mod (OPLL_SLOT * slot)
1319{
1320 e_int32 fm;
1321
1322 slot->output[1] = slot->output[0];
1323
1324 if (slot->egout >= (DB_MUTE - 1))
1325 {
1326 slot->output[0] = 0;
1327 }
1328 else if (slot->patch->FB != 0)
1329 {
1330 fm = wave2_4pi (slot->feedback) >> (7 - slot->patch->FB);
1331 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+fm)&(PG_WIDTH-1)] + slot->egout];
1332 }
1333 else
1334 {
1335 slot->output[0] = DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
1336 }
1337
1338 slot->feedback = (slot->output[1] + slot->output[0]) >> 1;
1339
1340 return slot->feedback;
1341
1342}
1343
1344/* TOM */
1345INLINE static e_int32
1346calc_slot_tom (OPLL_SLOT * slot)
1347{
1348 if (slot->egout >= (DB_MUTE - 1))
1349 return 0;
1350
1351 return DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
1352
1353}
1354
1355/* SNARE */
1356INLINE static e_int32
1357calc_slot_snare (OPLL_SLOT * slot, e_uint32 noise)
1358{
1359 if(slot->egout>=(DB_MUTE-1))
1360 return 0;
1361
1362 if(BIT(slot->pgout,7))
1363 return DB2LIN_TABLE[(noise?DB_POS(0.0):DB_POS(15.0))+slot->egout];
1364 else
1365 return DB2LIN_TABLE[(noise?DB_NEG(0.0):DB_NEG(15.0))+slot->egout];
1366}
1367
1368/*
1369 TOP-CYM
1370 */
1371INLINE static e_int32
1372calc_slot_cym (OPLL_SLOT * slot, e_uint32 pgout_hh)
1373{
1374 e_uint32 dbout;
1375
1376 if (slot->egout >= (DB_MUTE - 1))
1377 return 0;
1378 else if(
1379 /* the same as fmopl.c */
1380 ((BIT(pgout_hh,PG_BITS-8)^BIT(pgout_hh,PG_BITS-1))|BIT(pgout_hh,PG_BITS-7)) ^
1381 /* different from fmopl.c */
1382 (BIT(slot->pgout,PG_BITS-7)&!BIT(slot->pgout,PG_BITS-5))
1383 )
1384 dbout = DB_NEG(3.0);
1385 else
1386 dbout = DB_POS(3.0);
1387
1388 return DB2LIN_TABLE[dbout + slot->egout];
1389}
1390
1391/*
1392 HI-HAT
1393*/
1394INLINE static e_int32
1395calc_slot_hat (OPLL_SLOT *slot, e_int32 pgout_cym, e_uint32 noise)
1396{
1397 e_uint32 dbout;
1398
1399 if (slot->egout >= (DB_MUTE - 1))
1400 return 0;
1401 else if(
1402 /* the same as fmopl.c */
1403 ((BIT(slot->pgout,PG_BITS-8)^BIT(slot->pgout,PG_BITS-1))|BIT(slot->pgout,PG_BITS-7)) ^
1404 /* different from fmopl.c */
1405 (BIT(pgout_cym,PG_BITS-7)&!BIT(pgout_cym,PG_BITS-5))
1406 )
1407 {
1408 if(noise)
1409 dbout = DB_NEG(12.0);
1410 else
1411 dbout = DB_NEG(24.0);
1412 }
1413 else
1414 {
1415 if(noise)
1416 dbout = DB_POS(12.0);
1417 else
1418 dbout = DB_POS(24.0);
1419 }
1420
1421 return DB2LIN_TABLE[dbout + slot->egout];
1422}
1423
1424static e_int16
1425calc (OPLL * opll)
1426{
1427 e_int32 i;
1428
1429 update_ampm (opll);
1430 update_noise (opll);
1431
1432 for (i = 0; i < 18; i++)
1433 {
1434 calc_phase(&opll->slot[i],opll->lfo_pm);
1435 calc_envelope(&opll->slot[i],opll->lfo_am);
1436 }
1437
1438 e_uint32 channel_mask = opll->mask;
1439 for (i = 0; i < 9; i++) {
1440 if (CAR(opll,i)->eg_mode != FINISH)
1441 channel_mask |= (1 << i);
1442 }
1443
1444 e_int32 mix = 0;
1445
1446 /* CH6 */
1447 if (opll->patch_number[6] & 0x10) {
1448 if (channel_mask & OPLL_MASK_CH (6)) {
1449 mix += calc_slot_car (CAR(opll,6), calc_slot_mod(MOD(opll,6)));
1450 channel_mask &= ~(1 << 6);
1451 }
1452 }
1453
1454 /* CH7 */
1455 if (opll->patch_number[7] & 0x10) {
1456 if (MOD(opll,7)->eg_mode != FINISH)
1457 mix += calc_slot_hat (MOD(opll,7), CAR(opll,8)->pgout, opll->noise_seed&1);
1458 if (channel_mask & OPLL_MASK_SD) {
1459 mix -= calc_slot_snare (CAR(opll,7), opll->noise_seed&1);
1460 channel_mask &= ~OPLL_MASK_SD;
1461 }
1462 }
1463
1464 /* CH8 */
1465 if (opll->patch_number[8] & 0x10) {
1466 if (MOD(opll,8)->eg_mode != FINISH)
1467 mix += calc_slot_tom (MOD(opll,8));
1468 if (channel_mask & OPLL_MASK_CYM) {
1469 mix -= calc_slot_cym (CAR(opll,8), MOD(opll,7)->pgout);
1470 channel_mask &= ~OPLL_MASK_CYM;
1471 }
1472 }
1473
1474 mix <<= 1;
1475
1476 opll->current_mask = channel_mask;
1477 for (i = 0; channel_mask; channel_mask >>= 1, ++i) {
1478 if (channel_mask & 1) {
1479 mix += calc_slot_car (CAR(opll,i), calc_slot_mod(MOD(opll,i)));
1480 }
1481 }
1482
1483 return (e_int16) mix << 3;
1484}
1485
1486void
1487OPLL_set_internal_mute(OPLL * opll, e_uint32 mute)
1488{
1489 opll->internal_mute = mute;
1490}
1491
1492e_uint32
1493OPLL_is_internal_muted(OPLL * opll)
1494{
1495 return opll->internal_mute;
1496}
1497
1498e_uint32
1499check_mute_helper(OPLL * opll)
1500{
1501 for (int i = 0; i < 6; i++) {
1502 /* if (ch[i].car.eg_mode != FINISH) return 0; */
1503 if (!(opll->current_mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH)) return 0;
1504 }
1505
1506 if (!(opll->reg[0x0e] & 0x20)) {
1507 for(int i = 6; i < 9; i++) {
1508 /* if (ch[i].car.eg_mode != FINISH) return 0; */
1509 if (!(opll->current_mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH)) return 0;
1510 }
1511 } else {
1512 /* if (ch[6].car.eg_mode != FINISH) return false;
1513 if (ch[7].mod.eg_mode != FINISH) return false;
1514 if (ch[7].car.eg_mode != FINISH) return false;
1515 if (ch[8].mod.eg_mode != FINISH) return false;
1516 if (ch[8].car.eg_mode != FINISH) return false; */
1517 if (!(opll->current_mask & OPLL_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH)) return 0;
1518 if (!(opll->current_mask & OPLL_MASK_CH (7)) && (MOD(opll,7)->eg_mode != FINISH)) return 0;
1519 if (!(opll->current_mask & OPLL_MASK_CH (7)) && (CAR(opll,7)->eg_mode != FINISH)) return 0;
1520 if (!(opll->current_mask & OPLL_MASK_CH (8)) && (MOD(opll,8)->eg_mode != FINISH)) return 0;
1521 if (!(opll->current_mask & OPLL_MASK_CH (8)) && (CAR(opll,8)->eg_mode != FINISH)) return 0;
1522 }
1523
1524 return 1; /* nothing is playing, then mute */
1525}
1526
1527void
1528check_mute(OPLL * opll)
1529{
1530 OPLL_set_internal_mute (opll, check_mute_helper (opll));
1531}
1532
1533EMU2413_API e_int16 *OPLL_update_buffer(OPLL * opll, e_uint32 length)
1534{
1535 e_int16* buf = opll->buffer;
1536 while (length--) {
1537 *(buf++) = calc (opll);
1538 }
1539 check_mute (opll);
1540
1541 return opll->buffer;
1542}
1543
1544#ifdef EMU2413_COMPACTION
1545e_int16
1546OPLL_calc (OPLL * opll)
1547{
1548 return calc (opll);
1549}
1550#else
1551e_int16
1552OPLL_calc (OPLL * opll)
1553{
1554 if (!opll->quality)
1555 return calc (opll);
1556
1557 while (opll->realstep > opll->oplltime)
1558 {
1559 opll->oplltime += opll->opllstep;
1560 opll->prev = opll->next;
1561 opll->next = calc (opll);
1562 }
1563
1564 opll->oplltime -= opll->realstep;
1565 opll->out = (e_int16) (((double) opll->next * (opll->opllstep - opll->oplltime)
1566 + (double) opll->prev * opll->oplltime) / opll->opllstep);
1567
1568 return (e_int16) opll->out;
1569}
1570#endif
1571
1572e_uint32
1573OPLL_setMask (OPLL * opll, e_uint32 mask)
1574{
1575 e_uint32 ret;
1576
1577 if (opll)
1578 {
1579 ret = opll->mask;
1580 opll->mask = mask;
1581 return ret;
1582 }
1583 else
1584 return 0;
1585}
1586
1587e_uint32
1588OPLL_toggleMask (OPLL * opll, e_uint32 mask)
1589{
1590 e_uint32 ret;
1591
1592 if (opll)
1593 {
1594 ret = opll->mask;
1595 opll->mask ^= mask;
1596 return ret;
1597 }
1598 else
1599 return 0;
1600}
1601
1602/****************************************************
1603
1604 I/O Ctrl
1605
1606*****************************************************/
1607
1608void
1609OPLL_writeReg (OPLL * opll, e_uint32 reg, e_uint32 data)
1610{
1611 e_int32 i, v, ch;
1612
1613 data = data & 0xff;
1614 reg = reg & 0x3f;
1615 opll->reg[reg] = (e_uint8) data;
1616
1617 switch (reg)
1618 {
1619 case 0x00:
1620 opll->patch[0].AM = (data >> 7) & 1;
1621 opll->patch[0].PM = (data >> 6) & 1;
1622 opll->patch[0].EG = (data >> 5) & 1;
1623 opll->patch[0].KR = (data >> 4) & 1;
1624 opll->patch[0].ML = (data) & 15;
1625 for (i = 0; i < 9; i++)
1626 {
1627 if (opll->patch_number[i] == 0)
1628 {
1629 UPDATE_PG (MOD(opll,i));
1630 UPDATE_RKS (MOD(opll,i));
1631 UPDATE_EG (MOD(opll,i));
1632 }
1633 }
1634 break;
1635
1636 case 0x01:
1637 opll->patch[1].AM = (data >> 7) & 1;
1638 opll->patch[1].PM = (data >> 6) & 1;
1639 opll->patch[1].EG = (data >> 5) & 1;
1640 opll->patch[1].KR = (data >> 4) & 1;
1641 opll->patch[1].ML = (data) & 15;
1642 for (i = 0; i < 9; i++)
1643 {
1644 if (opll->patch_number[i] == 0)
1645 {
1646 UPDATE_PG (CAR(opll,i));
1647 UPDATE_RKS (CAR(opll,i));
1648 UPDATE_EG (CAR(opll,i));
1649 }
1650 }
1651 break;
1652
1653 case 0x02:
1654 opll->patch[0].KL = (data >> 6) & 3;
1655 opll->patch[0].TL = (data) & 63;
1656 for (i = 0; i < 9; i++)
1657 {
1658 if (opll->patch_number[i] == 0)
1659 {
1660 UPDATE_TLL(MOD(opll,i));
1661 }
1662 }
1663 break;
1664
1665 case 0x03:
1666 opll->patch[1].KL = (data >> 6) & 3;
1667 opll->patch[1].WF = (data >> 4) & 1;
1668 opll->patch[0].WF = (data >> 3) & 1;
1669 opll->patch[0].FB = (data) & 7;
1670 for (i = 0; i < 9; i++)
1671 {
1672 if (opll->patch_number[i] == 0)
1673 {
1674 UPDATE_WF(MOD(opll,i));
1675 UPDATE_WF(CAR(opll,i));
1676 }
1677 }
1678 break;
1679
1680 case 0x04:
1681 opll->patch[0].AR = (data >> 4) & 15;
1682 opll->patch[0].DR = (data) & 15;
1683 for (i = 0; i < 9; i++)
1684 {
1685 if (opll->patch_number[i] == 0)
1686 {
1687 UPDATE_EG (MOD(opll,i));
1688 }
1689 }
1690 break;
1691
1692 case 0x05:
1693 opll->patch[1].AR = (data >> 4) & 15;
1694 opll->patch[1].DR = (data) & 15;
1695 for (i = 0; i < 9; i++)
1696 {
1697 if (opll->patch_number[i] == 0)
1698 {
1699 UPDATE_EG(CAR(opll,i));
1700 }
1701 }
1702 break;
1703
1704 case 0x06:
1705 opll->patch[0].SL = (data >> 4) & 15;
1706 opll->patch[0].RR = (data) & 15;
1707 for (i = 0; i < 9; i++)
1708 {
1709 if (opll->patch_number[i] == 0)
1710 {
1711 UPDATE_EG (MOD(opll,i));
1712 }
1713 }
1714 break;
1715
1716 case 0x07:
1717 opll->patch[1].SL = (data >> 4) & 15;
1718 opll->patch[1].RR = (data) & 15;
1719 for (i = 0; i < 9; i++)
1720 {
1721 if (opll->patch_number[i] == 0)
1722 {
1723 UPDATE_EG (CAR(opll,i));
1724 }
1725 }
1726 break;
1727
1728 case 0x0e:
1729 update_rhythm_mode (opll);
1730 if (data & 32)
1731 {
1732 if (data & 0x10)
1733 keyOn_BD (opll);
1734 else
1735 keyOff_BD (opll);
1736 if (data & 0x8)
1737 keyOn_SD (opll);
1738 else
1739 keyOff_SD (opll);
1740 if (data & 0x4)
1741 keyOn_TOM (opll);
1742 else
1743 keyOff_TOM (opll);
1744 if (data & 0x2)
1745 keyOn_CYM (opll);
1746 else
1747 keyOff_CYM (opll);
1748 if (data & 0x1)
1749 keyOn_HH (opll);
1750 else
1751 keyOff_HH (opll);
1752 }
1753 update_key_status (opll);
1754
1755 UPDATE_ALL (MOD(opll,6));
1756 UPDATE_ALL (CAR(opll,6));
1757 UPDATE_ALL (MOD(opll,7));
1758 UPDATE_ALL (CAR(opll,7));
1759 UPDATE_ALL (MOD(opll,8));
1760 UPDATE_ALL (CAR(opll,8));
1761
1762 break;
1763
1764 case 0x0f:
1765 break;
1766
1767 case 0x10:
1768 case 0x11:
1769 case 0x12:
1770 case 0x13:
1771 case 0x14:
1772 case 0x15:
1773 case 0x16:
1774 case 0x17:
1775 case 0x18:
1776 ch = reg - 0x10;
1777 setFnumber (opll, ch, data + ((opll->reg[0x20 + ch] & 1) << 8));
1778 UPDATE_ALL (MOD(opll,ch));
1779 UPDATE_ALL (CAR(opll,ch));
1780 break;
1781
1782 case 0x20:
1783 case 0x21:
1784 case 0x22:
1785 case 0x23:
1786 case 0x24:
1787 case 0x25:
1788 case 0x26:
1789 case 0x27:
1790 case 0x28:
1791 ch = reg - 0x20;
1792 setFnumber (opll, ch, ((data & 1) << 8) + opll->reg[0x10 + ch]);
1793 setBlock (opll, ch, (data >> 1) & 7);
1794 setSustine (opll, ch, (data >> 5) & 1);
1795 if (data & 0x10)
1796 keyOn (opll, ch);
1797 else
1798 keyOff (opll, ch);
1799 UPDATE_ALL (MOD(opll,ch));
1800 UPDATE_ALL (CAR(opll,ch));
1801 update_key_status (opll);
1802 update_rhythm_mode (opll);
1803 break;
1804
1805 case 0x30:
1806 case 0x31:
1807 case 0x32:
1808 case 0x33:
1809 case 0x34:
1810 case 0x35:
1811 case 0x36:
1812 case 0x37:
1813 case 0x38:
1814 i = (data >> 4) & 15;
1815 v = data & 15;
1816 if ((opll->reg[0x0e] & 32) && (reg >= 0x36))
1817 {
1818 switch (reg)
1819 {
1820 case 0x37:
1821 setSlotVolume (MOD(opll,7), i << 2);
1822 break;
1823 case 0x38:
1824 setSlotVolume (MOD(opll,8), i << 2);
1825 break;
1826 default:
1827 break;
1828 }
1829 }
1830 else
1831 {
1832 setPatch (opll, reg - 0x30, i);
1833 }
1834 setVolume (opll, reg - 0x30, v << 2);
1835 UPDATE_ALL (MOD(opll,reg - 0x30));
1836 UPDATE_ALL (CAR(opll,reg - 0x30));
1837 break;
1838
1839 default:
1840 break;
1841
1842 }
1843}
1844
1845void
1846OPLL_writeIO (OPLL * opll, e_uint32 adr, e_uint32 val)
1847{
1848 if (adr & 1)
1849 OPLL_writeReg (opll, opll->adr, val);
1850 else
1851 opll->adr = val;
1852}
1853
1854e_uint32
1855OPLL_read(OPLL * opll, e_uint32 a)
1856{
1857 if( !(a&1) )
1858 {
1859 /* status port */
1860 return opll->status;
1861 }
1862 return 0xff;
1863}
1864
1865#ifndef EMU2413_COMPACTION
1866/* STEREO MODE (OPT) */
1867void
1868OPLL_set_pan (OPLL * opll, e_uint32 ch, e_uint32 pan)
1869{
1870 opll->pan[ch & 15] = pan & 3;
1871}
1872
1873static void
1874calc_stereo (OPLL * opll, e_int32 out[2])
1875{
1876 e_int32 b[4] = { 0, 0, 0, 0 }; /* Ignore, Right, Left, Center */
1877 e_int32 r[4] = { 0, 0, 0, 0 }; /* Ignore, Right, Left, Center */
1878 e_int32 i;
1879
1880 update_ampm (opll);
1881 update_noise (opll);
1882
1883 for(i=0;i<18;i++)
1884 {
1885 calc_phase(&opll->slot[i],opll->lfo_pm);
1886 calc_envelope(&opll->slot[i],opll->lfo_am);
1887 }
1888
1889 for (i = 0; i < 6; i++)
1890 if (!(opll->mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH))
1891 b[opll->pan[i]] += calc_slot_car (CAR(opll,i), calc_slot_mod (MOD(opll,i)));
1892
1893
1894 if (opll->patch_number[6] <= 15)
1895 {
1896 if (!(opll->mask & OPLL_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH))
1897 b[opll->pan[6]] += calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6)));
1898 }
1899 else
1900 {
1901 if (!(opll->mask & OPLL_MASK_BD) && (CAR(opll,6)->eg_mode != FINISH))
1902 r[opll->pan[9]] += calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6)));
1903 }
1904
1905 if (opll->patch_number[7] <= 15)
1906 {
1907 if (!(opll->mask & OPLL_MASK_CH (7)) && (CAR (opll,7)->eg_mode != FINISH))
1908 b[opll->pan[7]] += calc_slot_car (CAR (opll,7), calc_slot_mod (MOD (opll,7)));
1909 }
1910 else
1911 {
1912 if (!(opll->mask & OPLL_MASK_HH) && (MOD (opll,7)->eg_mode != FINISH))
1913 r[opll->pan[10]] += calc_slot_hat (MOD (opll,7), CAR(opll,8)->pgout, opll->noise_seed&1);
1914 if (!(opll->mask & OPLL_MASK_SD) && (CAR (opll,7)->eg_mode != FINISH))
1915 r[opll->pan[11]] -= calc_slot_snare (CAR (opll,7), opll->noise_seed&1);
1916 }
1917
1918 if (opll->patch_number[8] <= 15)
1919 {
1920 if (!(opll->mask & OPLL_MASK_CH (8)) && (CAR (opll,8)->eg_mode != FINISH))
1921 b[opll->pan[8]] += calc_slot_car (CAR (opll,8), calc_slot_mod (MOD (opll,8)));
1922 }
1923 else
1924 {
1925 if (!(opll->mask & OPLL_MASK_TOM) && (MOD (opll,8)->eg_mode != FINISH))
1926 r[opll->pan[12]] += calc_slot_tom (MOD (opll,8));
1927 if (!(opll->mask & OPLL_MASK_CYM) && (CAR (opll,8)->eg_mode != FINISH))
1928 r[opll->pan[13]] -= calc_slot_cym (CAR (opll,8), MOD(opll,7)->pgout);
1929 }
1930
1931 out[1] = (b[1] + b[3] + ((r[1] + r[3]) << 1)) <<3;
1932 out[0] = (b[2] + b[3] + ((r[2] + r[3]) << 1)) <<3;
1933}
1934
1935void
1936OPLL_calc_stereo (OPLL * opll, e_int32 out[2])
1937{
1938 if (!opll->quality)
1939 {
1940 calc_stereo (opll, out);
1941 return;
1942 }
1943
1944 while (opll->realstep > opll->oplltime)
1945 {
1946 opll->oplltime += opll->opllstep;
1947 opll->sprev[0] = opll->snext[0];
1948 opll->sprev[1] = opll->snext[1];
1949 calc_stereo (opll, opll->snext);
1950 }
1951
1952 opll->oplltime -= opll->realstep;
1953 out[0] = (e_int16) (((double) opll->snext[0] * (opll->opllstep - opll->oplltime)
1954 + (double) opll->sprev[0] * opll->oplltime) / opll->opllstep);
1955 out[1] = (e_int16) (((double) opll->snext[1] * (opll->opllstep - opll->oplltime)
1956 + (double) opll->sprev[1] * opll->oplltime) / opll->opllstep);
1957}
1958#endif /* EMU2413_COMPACTION */
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-22 21:15:06 +0000