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-rw-r--r--apps/codecs/libgme/emu2413.c3962
1 files changed, 1981 insertions, 1981 deletions
diff --git a/apps/codecs/libgme/emu2413.c b/apps/codecs/libgme/emu2413.c
index a4637ce15b..01075821cb 100644
--- a/apps/codecs/libgme/emu2413.c
+++ b/apps/codecs/libgme/emu2413.c
@@ -1,1981 +1,1981 @@
1/*********************************************************************************** 1/***********************************************************************************
2 2
3 emu2413.c -- YM2413 emulator written by Mitsutaka Okazaki 2001 3 emu2413.c -- YM2413 emulator written by Mitsutaka Okazaki 2001
4 4
5 2001 01-08 : Version 0.10 -- 1st version. 5 2001 01-08 : Version 0.10 -- 1st version.
6 2001 01-15 : Version 0.20 -- semi-public version. 6 2001 01-15 : Version 0.20 -- semi-public version.
7 2001 01-16 : Version 0.30 -- 1st public version. 7 2001 01-16 : Version 0.30 -- 1st public version.
8 2001 01-17 : Version 0.31 -- Fixed bassdrum problem. 8 2001 01-17 : Version 0.31 -- Fixed bassdrum problem.
9 : Version 0.32 -- LPF implemented. 9 : Version 0.32 -- LPF implemented.
10 2001 01-18 : Version 0.33 -- Fixed the drum problem, refine the mix-down method. 10 2001 01-18 : Version 0.33 -- Fixed the drum problem, refine the mix-down method.
11 -- Fixed the LFO bug. 11 -- Fixed the LFO bug.
12 2001 01-24 : Version 0.35 -- Fixed the drum problem, 12 2001 01-24 : Version 0.35 -- Fixed the drum problem,
13 support undocumented EG behavior. 13 support undocumented EG behavior.
14 2001 02-02 : Version 0.38 -- Improved the performance. 14 2001 02-02 : Version 0.38 -- Improved the performance.
15 Fixed the hi-hat and cymbal model. 15 Fixed the hi-hat and cymbal model.
16 Fixed the default percussive datas. 16 Fixed the default percussive datas.
17 Noise reduction. 17 Noise reduction.
18 Fixed the feedback problem. 18 Fixed the feedback problem.
19 2001 03-03 : Version 0.39 -- Fixed some drum bugs. 19 2001 03-03 : Version 0.39 -- Fixed some drum bugs.
20 Improved the performance. 20 Improved the performance.
21 2001 03-04 : Version 0.40 -- Improved the feedback. 21 2001 03-04 : Version 0.40 -- Improved the feedback.
22 Change the default table size. 22 Change the default table size.
23 Clock and Rate can be changed during play. 23 Clock and Rate can be changed during play.
24 2001 06-24 : Version 0.50 -- Improved the hi-hat and the cymbal tone. 24 2001 06-24 : Version 0.50 -- Improved the hi-hat and the cymbal tone.
25 Added VRC7 patch (OPLL_reset_patch is changed). 25 Added VRC7 patch (OPLL_reset_patch is changed).
26 Fixed OPLL_reset() bug. 26 Fixed OPLL_reset() bug.
27 Added OPLL_setMask, OPLL_getMask and OPLL_toggleMask. 27 Added OPLL_setMask, OPLL_getMask and OPLL_toggleMask.
28 Added OPLL_writeIO. 28 Added OPLL_writeIO.
29 2001 09-28 : Version 0.51 -- Removed the noise table. 29 2001 09-28 : Version 0.51 -- Removed the noise table.
30 2002 01-28 : Version 0.52 -- Added Stereo mode. 30 2002 01-28 : Version 0.52 -- Added Stereo mode.
31 2002 02-07 : Version 0.53 -- Fixed some drum bugs. 31 2002 02-07 : Version 0.53 -- Fixed some drum bugs.
32 2002 02-20 : Version 0.54 -- Added the best quality mode. 32 2002 02-20 : Version 0.54 -- Added the best quality mode.
33 2002 03-02 : Version 0.55 -- Removed OPLL_init & OPLL_close. 33 2002 03-02 : Version 0.55 -- Removed OPLL_init & OPLL_close.
34 2002 05-30 : Version 0.60 -- Fixed HH&CYM generator and all voice datas. 34 2002 05-30 : Version 0.60 -- Fixed HH&CYM generator and all voice datas.
35 2004 04-10 : Version 0.61 -- Added YMF281B tone (defined by Chabin). 35 2004 04-10 : Version 0.61 -- Added YMF281B tone (defined by Chabin).
36 36
37 2011 03-22 : --------------- Modified by gama to use precalculated tables. 37 2011 03-22 : --------------- Modified by gama to use precalculated tables.
38 38
39 References: 39 References:
40 fmopl.c -- 1999,2000 written by Tatsuyuki Satoh (MAME development). 40 fmopl.c -- 1999,2000 written by Tatsuyuki Satoh (MAME development).
41 fmopl.c(fixed) -- (C) 2002 Jarek Burczynski. 41 fmopl.c(fixed) -- (C) 2002 Jarek Burczynski.
42 s_opl.c -- 2001 written by Mamiya (NEZplug development). 42 s_opl.c -- 2001 written by Mamiya (NEZplug development).
43 fmgen.cpp -- 1999,2000 written by cisc. 43 fmgen.cpp -- 1999,2000 written by cisc.
44 fmpac.ill -- 2000 created by NARUTO. 44 fmpac.ill -- 2000 created by NARUTO.
45 MSX-Datapack 45 MSX-Datapack
46 YMU757 data sheet 46 YMU757 data sheet
47 YM2143 data sheet 47 YM2143 data sheet
48 48
49**************************************************************************************/ 49**************************************************************************************/
50#include <stdio.h> 50#include <stdio.h>
51#include <stdlib.h> 51#include <stdlib.h>
52#include <string.h> 52#include <string.h>
53#include <math.h> 53#include <math.h>
54#include "emu2413.h" 54#include "emu2413.h"
55 55
56#include "emutables.h" 56#include "emutables.h"
57#if !defined(ROCKBOX) 57#if !defined(ROCKBOX)
58 #define EMU2413_CALCUL_TABLES 58 #define EMU2413_CALCUL_TABLES
59#else 59#else
60 #define EMU2413_COMPACTION 60 #define EMU2413_COMPACTION
61 #include "emutables.h" 61 #include "emutables.h"
62#endif 62#endif
63 63
64#if defined(EMU2413_COMPACTION) && !defined(ROCKBOX) 64#if defined(EMU2413_COMPACTION) && !defined(ROCKBOX)
65#define OPLL_TONE_NUM 1 65#define OPLL_TONE_NUM 1
66static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 16] = { 66static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 16] = {
67 { 67 {
68#include "2413tone.h" 68#include "2413tone.h"
69 } 69 }
70}; 70};
71#else 71#else
72#define OPLL_TONE_NUM 3 72#define OPLL_TONE_NUM 3
73static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 16] = { 73static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 16] = {
74 { 74 {
75#include "2413tone.h" 75#include "2413tone.h"
76 }, 76 },
77 { 77 {
78#include "vrc7tone.h" 78#include "vrc7tone.h"
79 }, 79 },
80 { 80 {
81#include "281btone.h" 81#include "281btone.h"
82 } 82 }
83}; 83};
84#endif 84#endif
85 85
86/* Size of Sintable ( 8 -- 18 can be used. 9 recommended.) */ 86/* Size of Sintable ( 8 -- 18 can be used. 9 recommended.) */
87#define PG_BITS 9 87#define PG_BITS 9
88#define PG_WIDTH (1<<PG_BITS) 88#define PG_WIDTH (1<<PG_BITS)
89 89
90/* Phase increment counter */ 90/* Phase increment counter */
91#define DP_BITS 18 91#define DP_BITS 18
92#define DP_WIDTH (1<<DP_BITS) 92#define DP_WIDTH (1<<DP_BITS)
93#define DP_BASE_BITS (DP_BITS - PG_BITS) 93#define DP_BASE_BITS (DP_BITS - PG_BITS)
94 94
95/* Dynamic range (Accuracy of sin table) */ 95/* Dynamic range (Accuracy of sin table) */
96#define DB_PREC 48 96#define DB_PREC 48
97#define DB_BITS 8 97#define DB_BITS 8
98#define DB_STEP ((double)DB_PREC/(1<<DB_BITS)) 98#define DB_STEP ((double)DB_PREC/(1<<DB_BITS))
99#define DB_MUTE (1<<DB_BITS) 99#define DB_MUTE (1<<DB_BITS)
100 100
101/* Dynamic range of envelope */ 101/* Dynamic range of envelope */
102#define EG_STEP 0.375 102#define EG_STEP 0.375
103#define EG_BITS 7 103#define EG_BITS 7
104#define EG_MUTE (1<<EG_BITS) 104#define EG_MUTE (1<<EG_BITS)
105 105
106/* Dynamic range of total level */ 106/* Dynamic range of total level */
107#define TL_STEP 0.75 107#define TL_STEP 0.75
108#define TL_BITS 6 108#define TL_BITS 6
109#define TL_MUTE (1<<TL_BITS) 109#define TL_MUTE (1<<TL_BITS)
110 110
111/* Dynamic range of sustine level */ 111/* Dynamic range of sustine level */
112#define SL_STEP 3.0 112#define SL_STEP 3.0
113#define SL_BITS 4 113#define SL_BITS 4
114#define SL_MUTE (1<<SL_BITS) 114#define SL_MUTE (1<<SL_BITS)
115 115
116#define EG2DB(d) ((d)*(e_int32)(EG_STEP/DB_STEP)) 116#define EG2DB(d) ((d)*(e_int32)(EG_STEP/DB_STEP))
117#define TL2EG(d) ((d)*(e_int32)(TL_STEP/EG_STEP)) 117#define TL2EG(d) ((d)*(e_int32)(TL_STEP/EG_STEP))
118#define SL2EG(d) ((d)*(e_int32)(SL_STEP/EG_STEP)) 118#define SL2EG(d) ((d)*(e_int32)(SL_STEP/EG_STEP))
119 119
120#define DB_POS(x) (x*DB_MUTE/DB_PREC) 120#define DB_POS(x) (x*DB_MUTE/DB_PREC)
121#define DB_NEG(x) (DB_MUTE+DB_MUTE+x*DB_MUTE/DB_PREC) 121#define DB_NEG(x) (DB_MUTE+DB_MUTE+x*DB_MUTE/DB_PREC)
122 122
123/* Bits for liner value */ 123/* Bits for liner value */
124#define DB2LIN_AMP_BITS 8 124#define DB2LIN_AMP_BITS 8
125#define SLOT_AMP_BITS (DB2LIN_AMP_BITS) 125#define SLOT_AMP_BITS (DB2LIN_AMP_BITS)
126 126
127/* Bits for envelope phase incremental counter */ 127/* Bits for envelope phase incremental counter */
128#define EG_DP_BITS 22 128#define EG_DP_BITS 22
129#define EG_DP_WIDTH (1<<EG_DP_BITS) 129#define EG_DP_WIDTH (1<<EG_DP_BITS)
130 130
131/* Bits for Pitch and Amp modulator */ 131/* Bits for Pitch and Amp modulator */
132#define PM_PG_BITS 8 132#define PM_PG_BITS 8
133#define PM_PG_WIDTH (1<<PM_PG_BITS) 133#define PM_PG_WIDTH (1<<PM_PG_BITS)
134#define PM_DP_BITS 16 134#define PM_DP_BITS 16
135#define PM_DP_WIDTH (1<<PM_DP_BITS) 135#define PM_DP_WIDTH (1<<PM_DP_BITS)
136#define AM_PG_BITS 8 136#define AM_PG_BITS 8
137#define AM_PG_WIDTH (1<<AM_PG_BITS) 137#define AM_PG_WIDTH (1<<AM_PG_BITS)
138#define AM_DP_BITS 16 138#define AM_DP_BITS 16
139#define AM_DP_WIDTH (1<<AM_DP_BITS) 139#define AM_DP_WIDTH (1<<AM_DP_BITS)
140 140
141/* PM table is calcurated by PM_AMP * pow(2,PM_DEPTH*sin(x)/1200) */ 141/* PM table is calcurated by PM_AMP * pow(2,PM_DEPTH*sin(x)/1200) */
142#define PM_AMP_BITS 8 142#define PM_AMP_BITS 8
143#define PM_AMP (1<<PM_AMP_BITS) 143#define PM_AMP (1<<PM_AMP_BITS)
144 144
145/* PM speed(Hz) and depth(cent) */ 145/* PM speed(Hz) and depth(cent) */
146#define PM_SPEED 6.4 146#define PM_SPEED 6.4
147#define PM_DEPTH 13.75 147#define PM_DEPTH 13.75
148 148
149/* AM speed(Hz) and depth(dB) */ 149/* AM speed(Hz) and depth(dB) */
150#define AM_SPEED 3.6413 150#define AM_SPEED 3.6413
151#define AM_DEPTH 4.875 151#define AM_DEPTH 4.875
152 152
153/* Cut the lower b bit(s) off. */ 153/* Cut the lower b bit(s) off. */
154#define HIGHBITS(c,b) ((c)>>(b)) 154#define HIGHBITS(c,b) ((c)>>(b))
155 155
156/* Leave the lower b bit(s). */ 156/* Leave the lower b bit(s). */
157#define LOWBITS(c,b) ((c)&((1<<(b))-1)) 157#define LOWBITS(c,b) ((c)&((1<<(b))-1))
158 158
159/* Expand x which is s bits to d bits. */ 159/* Expand x which is s bits to d bits. */
160#define EXPAND_BITS(x,s,d) ((x)<<((d)-(s))) 160#define EXPAND_BITS(x,s,d) ((x)<<((d)-(s)))
161 161
162/* Expand x which is s bits to d bits and fill expanded bits '1' */ 162/* Expand x which is s bits to d bits and fill expanded bits '1' */
163#define EXPAND_BITS_X(x,s,d) (((x)<<((d)-(s)))|((1<<((d)-(s)))-1)) 163#define EXPAND_BITS_X(x,s,d) (((x)<<((d)-(s)))|((1<<((d)-(s)))-1))
164 164
165/* Adjust envelope speed which depends on sampling rate. */ 165/* Adjust envelope speed which depends on sampling rate. */
166#define RATE_ADJUST(x) (rate==49716?(e_uint32)x:(e_uint32)(((long long)(x)*clk/rate+36)/72)) 166#define RATE_ADJUST(x) (rate==49716?(e_uint32)x:(e_uint32)(((long long)(x)*clk/rate+36)/72))
167 167
168#define MOD(o,x) (&(o)->slot[(x)<<1]) 168#define MOD(o,x) (&(o)->slot[(x)<<1])
169#define CAR(o,x) (&(o)->slot[((x)<<1)|1]) 169#define CAR(o,x) (&(o)->slot[((x)<<1)|1])
170 170
171#define BIT(s,b) (((s)>>(b))&1) 171#define BIT(s,b) (((s)>>(b))&1)
172 172
173/* Input clock */ 173/* Input clock */
174static e_uint32 clk = 844451141; 174static e_uint32 clk = 844451141;
175/* Sampling rate */ 175/* Sampling rate */
176static e_uint32 rate = 3354932; 176static e_uint32 rate = 3354932;
177 177
178/* WaveTable for each envelope amp */ 178/* WaveTable for each envelope amp */
179static e_uint16 fullsintable[PG_WIDTH]; 179static e_uint16 fullsintable[PG_WIDTH];
180static e_uint16 halfsintable[PG_WIDTH]; 180static e_uint16 halfsintable[PG_WIDTH];
181 181
182static e_uint16 *waveform[2] = { fullsintable, halfsintable }; 182static e_uint16 *waveform[2] = { fullsintable, halfsintable };
183 183
184/* LFO Table */ 184/* LFO Table */
185#ifdef EMU2413_CALCUL_TABLES 185#ifdef EMU2413_CALCUL_TABLES
186 static e_int32 pmtable[PM_PG_WIDTH]; 186 static e_int32 pmtable[PM_PG_WIDTH];
187 static e_int32 amtable[AM_PG_WIDTH]; 187 static e_int32 amtable[AM_PG_WIDTH];
188 #define PMTABLE(x) pmtable[x] 188 #define PMTABLE(x) pmtable[x]
189 #define AMTABLE(x) amtable[x] 189 #define AMTABLE(x) amtable[x]
190#else 190#else
191 #define PMTABLE(x) (e_int32)pm_coeff[x] 191 #define PMTABLE(x) (e_int32)pm_coeff[x]
192 #if (PM_PG_WIDTH != 256) 192 #if (PM_PG_WIDTH != 256)
193 #error PM_PG_WIDTH must be set to 256 if EMU2413_CALCUL_TABLES is not defined 193 #error PM_PG_WIDTH must be set to 256 if EMU2413_CALCUL_TABLES is not defined
194 #endif 194 #endif
195 #define AMTABLE(x) (e_int32)am_coeff[x] 195 #define AMTABLE(x) (e_int32)am_coeff[x]
196 #if (AM_PG_WIDTH != 256) 196 #if (AM_PG_WIDTH != 256)
197 #error AM_PG_WIDTH must be set to 256 if EMU2413_CALCUL_TABLES is not defined 197 #error AM_PG_WIDTH must be set to 256 if EMU2413_CALCUL_TABLES is not defined
198 #endif 198 #endif
199#endif 199#endif
200 200
201/* Phase delta for LFO */ 201/* Phase delta for LFO */
202static e_uint32 pm_dphase; 202static e_uint32 pm_dphase;
203static e_uint32 am_dphase; 203static e_uint32 am_dphase;
204 204
205/* dB to Liner table */ 205/* dB to Liner table */
206static e_int16 DB2LIN_TABLE[(DB_MUTE + DB_MUTE) * 2]; 206static e_int16 DB2LIN_TABLE[(DB_MUTE + DB_MUTE) * 2];
207 207
208/* Liner to Log curve conversion table (for Attack rate). */ 208/* Liner to Log curve conversion table (for Attack rate). */
209#ifdef EMU2413_CALCUL_TABLES 209#ifdef EMU2413_CALCUL_TABLES
210 static e_uint16 ar_adjust_table[1 << EG_BITS]; 210 static e_uint16 ar_adjust_table[1 << EG_BITS];
211 #define AR_ADJUST_TABLE(x) ar_adjust_table[x] 211 #define AR_ADJUST_TABLE(x) ar_adjust_table[x]
212#else 212#else
213 #define AR_ADJUST_TABLE(x) ar_adjust_coeff[x] 213 #define AR_ADJUST_TABLE(x) ar_adjust_coeff[x]
214 #if (EG_BITS != 7) 214 #if (EG_BITS != 7)
215 #error EG_BITS must be set to 7 if EMU2413_CALCUL_TABLES is not defined 215 #error EG_BITS must be set to 7 if EMU2413_CALCUL_TABLES is not defined
216 #endif 216 #endif
217#endif 217#endif
218 218
219/* Empty voice data */ 219/* Empty voice data */
220static OPLL_PATCH null_patch = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; 220static OPLL_PATCH null_patch = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
221 221
222/* Basic voice Data */ 222/* Basic voice Data */
223static OPLL_PATCH default_patch[OPLL_TONE_NUM][(16 + 3) * 2]; 223static OPLL_PATCH default_patch[OPLL_TONE_NUM][(16 + 3) * 2];
224 224
225/* Definition of envelope mode */ 225/* Definition of envelope mode */
226enum OPLL_EG_STATE 226enum OPLL_EG_STATE
227{ READY, ATTACK, DECAY, SUSHOLD, SUSTINE, RELEASE, SETTLE, FINISH }; 227{ READY, ATTACK, DECAY, SUSHOLD, SUSTINE, RELEASE, SETTLE, FINISH };
228 228
229/* Phase incr table for Attack */ 229/* Phase incr table for Attack */
230static e_uint32 dphaseARTable[16][16]; 230static e_uint32 dphaseARTable[16][16];
231/* Phase incr table for Decay and Release */ 231/* Phase incr table for Decay and Release */
232static e_uint32 dphaseDRTable[16][16]; 232static e_uint32 dphaseDRTable[16][16];
233 233
234/* KSL + TL Table */ 234/* KSL + TL Table */
235e_uint8 tllTable[16][8][1 << TL_BITS][4]; 235e_uint8 tllTable[16][8][1 << TL_BITS][4];
236static e_int32 rksTable[2][8][2]; 236static e_int32 rksTable[2][8][2];
237 237
238/* We may not have too much SRAM in rockbox */ 238/* We may not have too much SRAM in rockbox */
239#if !defined(ROCKBOX) 239#if !defined(ROCKBOX)
240/* Phase incr table for PG */ 240/* Phase incr table for PG */
241static e_uint32 dphaseTable[512][8][16]; 241static e_uint32 dphaseTable[512][8][16];
242#endif 242#endif
243 243
244/*************************************************** 244/***************************************************
245 245
246 Create tables 246 Create tables
247 247
248****************************************************/ 248****************************************************/
249#ifdef EMU2413_CALCUL_TABLES 249#ifdef EMU2413_CALCUL_TABLES
250INLINE static e_int32 250INLINE static e_int32
251Min (e_int32 i, e_int32 j) 251Min (e_int32 i, e_int32 j)
252{ 252{
253 if (i < j) 253 if (i < j)
254 return i; 254 return i;
255 else 255 else
256 return j; 256 return j;
257} 257}
258 258
259/* Table for AR to LogCurve. */ 259/* Table for AR to LogCurve. */
260static void 260static void
261makeAdjustTable (void) 261makeAdjustTable (void)
262{ 262{
263 e_int32 i; 263 e_int32 i;
264 264
265 ar_adjust_table[0] = (1 << EG_BITS) - 1; 265 ar_adjust_table[0] = (1 << EG_BITS) - 1;
266 for (i = 1; i < (1<<EG_BITS); i++) 266 for (i = 1; i < (1<<EG_BITS); i++)
267 ar_adjust_table[i] = (e_uint16) ((double) (1<<EG_BITS)-1 - ((1<<EG_BITS)-1)*log(i)/log(127)); 267 ar_adjust_table[i] = (e_uint16) ((double) (1<<EG_BITS)-1 - ((1<<EG_BITS)-1)*log(i)/log(127));
268} 268}
269#endif 269#endif
270 270
271/* Table for dB(0 -- (1<<DB_BITS)-1) to Liner(0 -- DB2LIN_AMP_WIDTH) */ 271/* Table for dB(0 -- (1<<DB_BITS)-1) to Liner(0 -- DB2LIN_AMP_WIDTH) */
272static void 272static void
273makeDB2LinTable (void) 273makeDB2LinTable (void)
274{ 274{
275 e_int32 i; 275 e_int32 i;
276 for (i = 0; i < DB_MUTE + DB_MUTE; i++) 276 for (i = 0; i < DB_MUTE + DB_MUTE; i++)
277 { 277 {
278 #ifdef EMU2413_CALCUL_TABLES 278 #ifdef EMU2413_CALCUL_TABLES
279 DB2LIN_TABLE[i] = (e_int16) ((double) ((1 << DB2LIN_AMP_BITS) - 1) * pow (10, -(double) i * DB_STEP / 20)); 279 DB2LIN_TABLE[i] = (e_int16) ((double) ((1 << DB2LIN_AMP_BITS) - 1) * pow (10, -(double) i * DB_STEP / 20));
280 #else 280 #else
281 DB2LIN_TABLE[i] = db2lin_coeff[i]; 281 DB2LIN_TABLE[i] = db2lin_coeff[i];
282 #endif 282 #endif
283 if (i >= DB_MUTE) DB2LIN_TABLE[i] = 0; 283 if (i >= DB_MUTE) DB2LIN_TABLE[i] = 0;
284 DB2LIN_TABLE[i + DB_MUTE + DB_MUTE] = (e_int16) (-DB2LIN_TABLE[i]); 284 DB2LIN_TABLE[i + DB_MUTE + DB_MUTE] = (e_int16) (-DB2LIN_TABLE[i]);
285 } 285 }
286} 286}
287 287
288#ifdef EMU2413_CALCUL_TABLES 288#ifdef EMU2413_CALCUL_TABLES
289/* Liner(+0.0 - +1.0) to dB((1<<DB_BITS) - 1 -- 0) */ 289/* Liner(+0.0 - +1.0) to dB((1<<DB_BITS) - 1 -- 0) */
290static e_int32 290static e_int32
291lin2db (double d) 291lin2db (double d)
292{ 292{
293 if (d == 0) 293 if (d == 0)
294 return (DB_MUTE - 1); 294 return (DB_MUTE - 1);
295 else 295 else
296 return Min (-(e_int32) (20.0 * log10 (d) / DB_STEP), DB_MUTE-1); /* 0 -- 127 */ 296 return Min (-(e_int32) (20.0 * log10 (d) / DB_STEP), DB_MUTE-1); /* 0 -- 127 */
297} 297}
298#endif 298#endif
299 299
300/* Sin Table */ 300/* Sin Table */
301static void 301static void
302makeSinTable (void) 302makeSinTable (void)
303{ 303{
304 e_int32 i; 304 e_int32 i;
305 305
306 for (i = 0; i < PG_WIDTH / 4; i++) 306 for (i = 0; i < PG_WIDTH / 4; i++)
307 #ifdef EMU2413_CALCUL_TABLES 307 #ifdef EMU2413_CALCUL_TABLES
308 fullsintable[i] = (e_uint32) lin2db (sin (2.0 * PI * i / PG_WIDTH) ); 308 fullsintable[i] = (e_uint32) lin2db (sin (2.0 * PI * i / PG_WIDTH) );
309 #else 309 #else
310 fullsintable[i] = sin_coeff[i]; 310 fullsintable[i] = sin_coeff[i];
311 #endif 311 #endif
312 312
313 for (i = 0; i < PG_WIDTH / 4; i++) 313 for (i = 0; i < PG_WIDTH / 4; i++)
314 { 314 {
315 fullsintable[PG_WIDTH / 2 - 1 - i] = fullsintable[i]; 315 fullsintable[PG_WIDTH / 2 - 1 - i] = fullsintable[i];
316 } 316 }
317 317
318 for (i = 0; i < PG_WIDTH / 2; i++) 318 for (i = 0; i < PG_WIDTH / 2; i++)
319 { 319 {
320 fullsintable[PG_WIDTH / 2 + i] = (e_uint32) (DB_MUTE + DB_MUTE + fullsintable[i]); 320 fullsintable[PG_WIDTH / 2 + i] = (e_uint32) (DB_MUTE + DB_MUTE + fullsintable[i]);
321 } 321 }
322 322
323 for (i = 0; i < PG_WIDTH / 2; i++) 323 for (i = 0; i < PG_WIDTH / 2; i++)
324 halfsintable[i] = fullsintable[i]; 324 halfsintable[i] = fullsintable[i];
325 for (i = PG_WIDTH / 2; i < PG_WIDTH; i++) 325 for (i = PG_WIDTH / 2; i < PG_WIDTH; i++)
326 halfsintable[i] = fullsintable[0]; 326 halfsintable[i] = fullsintable[0];
327} 327}
328 328
329#ifdef EMU2413_CALCUL_TABLES 329#ifdef EMU2413_CALCUL_TABLES
330static double saw(double phase) 330static double saw(double phase)
331{ 331{
332 if(phase <= PI/2) 332 if(phase <= PI/2)
333 return phase * 2 / PI ; 333 return phase * 2 / PI ;
334 else if(phase <= PI*3/2) 334 else if(phase <= PI*3/2)
335 return 2.0 - ( phase * 2 / PI ); 335 return 2.0 - ( phase * 2 / PI );
336 else 336 else
337 return -4.0 + phase * 2 / PI; 337 return -4.0 + phase * 2 / PI;
338} 338}
339 339
340/* Table for Pitch Modulator */ 340/* Table for Pitch Modulator */
341static void 341static void
342makePmTable (void) 342makePmTable (void)
343{ 343{
344 e_int32 i; 344 e_int32 i;
345 345
346 for (i = 0; i < PM_PG_WIDTH; i++) 346 for (i = 0; i < PM_PG_WIDTH; i++)
347 /* pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * sin (2.0 * PI * i / PM_PG_WIDTH) / 1200)); */ 347 /* pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * sin (2.0 * PI * i / PM_PG_WIDTH) / 1200)); */
348 pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * saw (2.0 * PI * i / PM_PG_WIDTH) / 1200)); 348 pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * saw (2.0 * PI * i / PM_PG_WIDTH) / 1200));
349} 349}
350 350
351/* Table for Amp Modulator */ 351/* Table for Amp Modulator */
352static void 352static void
353makeAmTable (void) 353makeAmTable (void)
354{ 354{
355 e_int32 i; 355 e_int32 i;
356 356
357 for (i = 0; i < AM_PG_WIDTH; i++) 357 for (i = 0; i < AM_PG_WIDTH; i++)
358 /* amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + sin (2.0 * PI * i / PM_PG_WIDTH))); */ 358 /* amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + sin (2.0 * PI * i / PM_PG_WIDTH))); */
359 amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + saw (2.0 * PI * i / PM_PG_WIDTH))); 359 amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + saw (2.0 * PI * i / PM_PG_WIDTH)));
360} 360}
361#endif 361#endif
362 362
363#if !defined(ROCKBOX) 363#if !defined(ROCKBOX)
364/* Phase increment counter table */ 364/* Phase increment counter table */
365static void 365static void
366makeDphaseTable (void) 366makeDphaseTable (void)
367{ 367{
368 e_uint32 fnum, block, ML; 368 e_uint32 fnum, block, ML;
369 e_uint32 mltable[16] = 369 e_uint32 mltable[16] =
370 { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 }; 370 { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 };
371 371
372 for (fnum = 0; fnum < 512; fnum++) 372 for (fnum = 0; fnum < 512; fnum++)
373 for (block = 0; block < 8; block++) 373 for (block = 0; block < 8; block++)
374 for (ML = 0; ML < 16; ML++) 374 for (ML = 0; ML < 16; ML++)
375 dphaseTable[fnum][block][ML] = RATE_ADJUST (((fnum * mltable[ML]) << block) >> (20 - DP_BITS)); 375 dphaseTable[fnum][block][ML] = RATE_ADJUST (((fnum * mltable[ML]) << block) >> (20 - DP_BITS));
376} 376}
377#endif 377#endif
378 378
379static void 379static void
380makeTllTable (void) 380makeTllTable (void)
381{ 381{
382/* Multiplication owith 8 to have an integer result. This allows to remove floating point operation. */ 382/* Multiplication owith 8 to have an integer result. This allows to remove floating point operation. */
383#define dB2(x) (int)((x)*2*8) 383#define dB2(x) (int)((x)*2*8)
384 384
385 static int kltable[16] = { 385 static int kltable[16] = {
386 dB2 ( 0.000), dB2 ( 9.000), dB2 (12.000), dB2 (13.875), dB2 (15.000), dB2 (16.125), dB2 (16.875), dB2 (17.625), 386 dB2 ( 0.000), dB2 ( 9.000), dB2 (12.000), dB2 (13.875), dB2 (15.000), dB2 (16.125), dB2 (16.875), dB2 (17.625),
387 dB2 (18.000), dB2 (18.750), dB2 (19.125), dB2 (19.500), dB2 (19.875), dB2 (20.250), dB2 (20.625), dB2 (21.000) 387 dB2 (18.000), dB2 (18.750), dB2 (19.125), dB2 (19.500), dB2 (19.875), dB2 (20.250), dB2 (20.625), dB2 (21.000)
388 }; 388 };
389 389
390 e_int32 tmp; 390 e_int32 tmp;
391 e_int32 fnum, block, TL, KL; 391 e_int32 fnum, block, TL, KL;
392 392
393 for (fnum = 0; fnum < 16; fnum++) 393 for (fnum = 0; fnum < 16; fnum++)
394 for (block = 0; block < 8; block++) 394 for (block = 0; block < 8; block++)
395 for (TL = 0; TL < 64; TL++) 395 for (TL = 0; TL < 64; TL++)
396 for (KL = 0; KL < 4; KL++) 396 for (KL = 0; KL < 4; KL++)
397 { 397 {
398 if (KL == 0) 398 if (KL == 0)
399 { 399 {
400 tllTable[fnum][block][TL][KL] = TL2EG (TL); 400 tllTable[fnum][block][TL][KL] = TL2EG (TL);
401 } 401 }
402 else 402 else
403 { 403 {
404 tmp = (e_int32) ((kltable[fnum] - dB2 (3.000) * (7 - block))/8); 404 tmp = (e_int32) ((kltable[fnum] - dB2 (3.000) * (7 - block))/8);
405 if (tmp <= 0) 405 if (tmp <= 0)
406 tllTable[fnum][block][TL][KL] = TL2EG (TL); 406 tllTable[fnum][block][TL][KL] = TL2EG (TL);
407 else 407 else
408 /* tllTable[fnum][block][TL][KL] = (e_uint32) ((tmp >> (3 - KL)) / EG_STEP) + TL2EG (TL); */ 408 /* tllTable[fnum][block][TL][KL] = (e_uint32) ((tmp >> (3 - KL)) / EG_STEP) + TL2EG (TL); */
409 tllTable[fnum][block][TL][KL] = (e_uint32) ((tmp << KL) / (int)(EG_STEP*8)) + TL2EG (TL); 409 tllTable[fnum][block][TL][KL] = (e_uint32) ((tmp << KL) / (int)(EG_STEP*8)) + TL2EG (TL);
410 } 410 }
411 } 411 }
412} 412}
413 413
414#ifdef USE_SPEC_ENV_SPEED 414#ifdef USE_SPEC_ENV_SPEED
415static double attacktime[16][4] = { 415static double attacktime[16][4] = {
416 {0, 0, 0, 0}, 416 {0, 0, 0, 0},
417 {1730.15, 1400.60, 1153.43, 988.66}, 417 {1730.15, 1400.60, 1153.43, 988.66},
418 {865.08, 700.30, 576.72, 494.33}, 418 {865.08, 700.30, 576.72, 494.33},
419 {432.54, 350.15, 288.36, 247.16}, 419 {432.54, 350.15, 288.36, 247.16},
420 {216.27, 175.07, 144.18, 123.58}, 420 {216.27, 175.07, 144.18, 123.58},
421 {108.13, 87.54, 72.09, 61.79}, 421 {108.13, 87.54, 72.09, 61.79},
422 {54.07, 43.77, 36.04, 30.90}, 422 {54.07, 43.77, 36.04, 30.90},
423 {27.03, 21.88, 18.02, 15.45}, 423 {27.03, 21.88, 18.02, 15.45},
424 {13.52, 10.94, 9.01, 7.72}, 424 {13.52, 10.94, 9.01, 7.72},
425 {6.76, 5.47, 4.51, 3.86}, 425 {6.76, 5.47, 4.51, 3.86},
426 {3.38, 2.74, 2.25, 1.93}, 426 {3.38, 2.74, 2.25, 1.93},
427 {1.69, 1.37, 1.13, 0.97}, 427 {1.69, 1.37, 1.13, 0.97},
428 {0.84, 0.70, 0.60, 0.54}, 428 {0.84, 0.70, 0.60, 0.54},
429 {0.50, 0.42, 0.34, 0.30}, 429 {0.50, 0.42, 0.34, 0.30},
430 {0.28, 0.22, 0.18, 0.14}, 430 {0.28, 0.22, 0.18, 0.14},
431 {0.00, 0.00, 0.00, 0.00} 431 {0.00, 0.00, 0.00, 0.00}
432}; 432};
433 433
434static double decaytime[16][4] = { 434static double decaytime[16][4] = {
435 {0, 0, 0, 0}, 435 {0, 0, 0, 0},
436 {20926.60, 16807.20, 14006.00, 12028.60}, 436 {20926.60, 16807.20, 14006.00, 12028.60},
437 {10463.30, 8403.58, 7002.98, 6014.32}, 437 {10463.30, 8403.58, 7002.98, 6014.32},
438 {5231.64, 4201.79, 3501.49, 3007.16}, 438 {5231.64, 4201.79, 3501.49, 3007.16},
439 {2615.82, 2100.89, 1750.75, 1503.58}, 439 {2615.82, 2100.89, 1750.75, 1503.58},
440 {1307.91, 1050.45, 875.37, 751.79}, 440 {1307.91, 1050.45, 875.37, 751.79},
441 {653.95, 525.22, 437.69, 375.90}, 441 {653.95, 525.22, 437.69, 375.90},
442 {326.98, 262.61, 218.84, 187.95}, 442 {326.98, 262.61, 218.84, 187.95},
443 {163.49, 131.31, 109.42, 93.97}, 443 {163.49, 131.31, 109.42, 93.97},
444 {81.74, 65.65, 54.71, 46.99}, 444 {81.74, 65.65, 54.71, 46.99},
445 {40.87, 32.83, 27.36, 23.49}, 445 {40.87, 32.83, 27.36, 23.49},
446 {20.44, 16.41, 13.68, 11.75}, 446 {20.44, 16.41, 13.68, 11.75},
447 {10.22, 8.21, 6.84, 5.87}, 447 {10.22, 8.21, 6.84, 5.87},
448 {5.11, 4.10, 3.42, 2.94}, 448 {5.11, 4.10, 3.42, 2.94},
449 {2.55, 2.05, 1.71, 1.47}, 449 {2.55, 2.05, 1.71, 1.47},
450 {1.27, 1.27, 1.27, 1.27} 450 {1.27, 1.27, 1.27, 1.27}
451}; 451};
452#endif 452#endif
453 453
454/* Rate Table for Attack */ 454/* Rate Table for Attack */
455static void 455static void
456makeDphaseARTable (void) 456makeDphaseARTable (void)
457{ 457{
458 e_int32 AR, Rks, RM, RL; 458 e_int32 AR, Rks, RM, RL;
459 459
460#ifdef USE_SPEC_ENV_SPEED 460#ifdef USE_SPEC_ENV_SPEED
461 e_uint32 attacktable[16][4]; 461 e_uint32 attacktable[16][4];
462 462
463 for (RM = 0; RM < 16; RM++) 463 for (RM = 0; RM < 16; RM++)
464 for (RL = 0; RL < 4; RL++) 464 for (RL = 0; RL < 4; RL++)
465 { 465 {
466 if (RM == 0) 466 if (RM == 0)
467 attacktable[RM][RL] = 0; 467 attacktable[RM][RL] = 0;
468 else if (RM == 15) 468 else if (RM == 15)
469 attacktable[RM][RL] = EG_DP_WIDTH; 469 attacktable[RM][RL] = EG_DP_WIDTH;
470 else 470 else
471 attacktable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (attacktime[RM][RL] * 3579545 / 72000)); 471 attacktable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (attacktime[RM][RL] * 3579545 / 72000));
472 472
473 } 473 }
474#endif 474#endif
475 475
476 for (AR = 0; AR < 16; AR++) 476 for (AR = 0; AR < 16; AR++)
477 for (Rks = 0; Rks < 16; Rks++) 477 for (Rks = 0; Rks < 16; Rks++)
478 { 478 {
479 RM = AR + (Rks >> 2); 479 RM = AR + (Rks >> 2);
480 RL = Rks & 3; 480 RL = Rks & 3;
481 if (RM > 15) 481 if (RM > 15)
482 RM = 15; 482 RM = 15;
483 switch (AR) 483 switch (AR)
484 { 484 {
485 case 0: 485 case 0:
486 dphaseARTable[AR][Rks] = 0; 486 dphaseARTable[AR][Rks] = 0;
487 break; 487 break;
488 case 15: 488 case 15:
489 dphaseARTable[AR][Rks] = 0;/*EG_DP_WIDTH;*/ 489 dphaseARTable[AR][Rks] = 0;/*EG_DP_WIDTH;*/
490 break; 490 break;
491 default: 491 default:
492#ifdef USE_SPEC_ENV_SPEED 492#ifdef USE_SPEC_ENV_SPEED
493 dphaseARTable[AR][Rks] = RATE_ADJUST (attacktable[RM][RL]); 493 dphaseARTable[AR][Rks] = RATE_ADJUST (attacktable[RM][RL]);
494#else 494#else
495 dphaseARTable[AR][Rks] = RATE_ADJUST ((3 * (RL + 4) << (RM + 1))); 495 dphaseARTable[AR][Rks] = RATE_ADJUST ((3 * (RL + 4) << (RM + 1)));
496#endif 496#endif
497 break; 497 break;
498 } 498 }
499 } 499 }
500} 500}
501 501
502/* Rate Table for Decay and Release */ 502/* Rate Table for Decay and Release */
503static void 503static void
504makeDphaseDRTable (void) 504makeDphaseDRTable (void)
505{ 505{
506 e_int32 DR, Rks, RM, RL; 506 e_int32 DR, Rks, RM, RL;
507 507
508#ifdef USE_SPEC_ENV_SPEED 508#ifdef USE_SPEC_ENV_SPEED
509 e_uint32 decaytable[16][4]; 509 e_uint32 decaytable[16][4];
510 510
511 for (RM = 0; RM < 16; RM++) 511 for (RM = 0; RM < 16; RM++)
512 for (RL = 0; RL < 4; RL++) 512 for (RL = 0; RL < 4; RL++)
513 if (RM == 0) 513 if (RM == 0)
514 decaytable[RM][RL] = 0; 514 decaytable[RM][RL] = 0;
515 else 515 else
516 decaytable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (decaytime[RM][RL] * 3579545 / 72000)); 516 decaytable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (decaytime[RM][RL] * 3579545 / 72000));
517#endif 517#endif
518 518
519 for (DR = 0; DR < 16; DR++) 519 for (DR = 0; DR < 16; DR++)
520 for (Rks = 0; Rks < 16; Rks++) 520 for (Rks = 0; Rks < 16; Rks++)
521 { 521 {
522 RM = DR + (Rks >> 2); 522 RM = DR + (Rks >> 2);
523 RL = Rks & 3; 523 RL = Rks & 3;
524 if (RM > 15) 524 if (RM > 15)
525 RM = 15; 525 RM = 15;
526 switch (DR) 526 switch (DR)
527 { 527 {
528 case 0: 528 case 0:
529 dphaseDRTable[DR][Rks] = 0; 529 dphaseDRTable[DR][Rks] = 0;
530 break; 530 break;
531 default: 531 default:
532#ifdef USE_SPEC_ENV_SPEED 532#ifdef USE_SPEC_ENV_SPEED
533 dphaseDRTable[DR][Rks] = RATE_ADJUST (decaytable[RM][RL]); 533 dphaseDRTable[DR][Rks] = RATE_ADJUST (decaytable[RM][RL]);
534#else 534#else
535 dphaseDRTable[DR][Rks] = RATE_ADJUST ((RL + 4) << (RM - 1)); 535 dphaseDRTable[DR][Rks] = RATE_ADJUST ((RL + 4) << (RM - 1));
536#endif 536#endif
537 break; 537 break;
538 } 538 }
539 } 539 }
540} 540}
541 541
542static void 542static void
543makeRksTable (void) 543makeRksTable (void)
544{ 544{
545 545
546 e_int32 fnum8, block, KR; 546 e_int32 fnum8, block, KR;
547 547
548 for (fnum8 = 0; fnum8 < 2; fnum8++) 548 for (fnum8 = 0; fnum8 < 2; fnum8++)
549 for (block = 0; block < 8; block++) 549 for (block = 0; block < 8; block++)
550 for (KR = 0; KR < 2; KR++) 550 for (KR = 0; KR < 2; KR++)
551 { 551 {
552 if (KR != 0) 552 if (KR != 0)
553 rksTable[fnum8][block][KR] = (block << 1) + fnum8; 553 rksTable[fnum8][block][KR] = (block << 1) + fnum8;
554 else 554 else
555 rksTable[fnum8][block][KR] = block >> 1; 555 rksTable[fnum8][block][KR] = block >> 1;
556 } 556 }
557} 557}
558 558
559void 559void
560OPLL_dump2patch (const e_uint8 * dump, OPLL_PATCH * patch) 560OPLL_dump2patch (const e_uint8 * dump, OPLL_PATCH * patch)
561{ 561{
562 patch[0].AM = (dump[0] >> 7) & 1; 562 patch[0].AM = (dump[0] >> 7) & 1;
563 patch[1].AM = (dump[1] >> 7) & 1; 563 patch[1].AM = (dump[1] >> 7) & 1;
564 patch[0].PM = (dump[0] >> 6) & 1; 564 patch[0].PM = (dump[0] >> 6) & 1;
565 patch[1].PM = (dump[1] >> 6) & 1; 565 patch[1].PM = (dump[1] >> 6) & 1;
566 patch[0].EG = (dump[0] >> 5) & 1; 566 patch[0].EG = (dump[0] >> 5) & 1;
567 patch[1].EG = (dump[1] >> 5) & 1; 567 patch[1].EG = (dump[1] >> 5) & 1;
568 patch[0].KR = (dump[0] >> 4) & 1; 568 patch[0].KR = (dump[0] >> 4) & 1;
569 patch[1].KR = (dump[1] >> 4) & 1; 569 patch[1].KR = (dump[1] >> 4) & 1;
570 patch[0].ML = (dump[0]) & 15; 570 patch[0].ML = (dump[0]) & 15;
571 patch[1].ML = (dump[1]) & 15; 571 patch[1].ML = (dump[1]) & 15;
572 patch[0].KL = (dump[2] >> 6) & 3; 572 patch[0].KL = (dump[2] >> 6) & 3;
573 patch[1].KL = (dump[3] >> 6) & 3; 573 patch[1].KL = (dump[3] >> 6) & 3;
574 patch[0].TL = (dump[2]) & 63; 574 patch[0].TL = (dump[2]) & 63;
575 patch[0].FB = (dump[3]) & 7; 575 patch[0].FB = (dump[3]) & 7;
576 patch[0].WF = (dump[3] >> 3) & 1; 576 patch[0].WF = (dump[3] >> 3) & 1;
577 patch[1].WF = (dump[3] >> 4) & 1; 577 patch[1].WF = (dump[3] >> 4) & 1;
578 patch[0].AR = (dump[4] >> 4) & 15; 578 patch[0].AR = (dump[4] >> 4) & 15;
579 patch[1].AR = (dump[5] >> 4) & 15; 579 patch[1].AR = (dump[5] >> 4) & 15;
580 patch[0].DR = (dump[4]) & 15; 580 patch[0].DR = (dump[4]) & 15;
581 patch[1].DR = (dump[5]) & 15; 581 patch[1].DR = (dump[5]) & 15;
582 patch[0].SL = (dump[6] >> 4) & 15; 582 patch[0].SL = (dump[6] >> 4) & 15;
583 patch[1].SL = (dump[7] >> 4) & 15; 583 patch[1].SL = (dump[7] >> 4) & 15;
584 patch[0].RR = (dump[6]) & 15; 584 patch[0].RR = (dump[6]) & 15;
585 patch[1].RR = (dump[7]) & 15; 585 patch[1].RR = (dump[7]) & 15;
586} 586}
587 587
588void 588void
589OPLL_getDefaultPatch (e_int32 type, e_int32 num, OPLL_PATCH * patch) 589OPLL_getDefaultPatch (e_int32 type, e_int32 num, OPLL_PATCH * patch)
590{ 590{
591 OPLL_dump2patch (default_inst[type] + num * 16, patch); 591 OPLL_dump2patch (default_inst[type] + num * 16, patch);
592} 592}
593 593
594static void 594static void
595makeDefaultPatch ( void ) 595makeDefaultPatch ( void )
596{ 596{
597 e_int32 i, j; 597 e_int32 i, j;
598 598
599 for (i = 0; i < OPLL_TONE_NUM; i++) 599 for (i = 0; i < OPLL_TONE_NUM; i++)
600 for (j = 0; j < 19; j++) 600 for (j = 0; j < 19; j++)
601 OPLL_getDefaultPatch (i, j, &default_patch[i][j * 2]); 601 OPLL_getDefaultPatch (i, j, &default_patch[i][j * 2]);
602 602
603} 603}
604 604
605void 605void
606OPLL_setPatch (OPLL * opll, const e_uint8 * dump) 606OPLL_setPatch (OPLL * opll, const e_uint8 * dump)
607{ 607{
608 OPLL_PATCH patch[2]; 608 OPLL_PATCH patch[2];
609 int i; 609 int i;
610 610
611 for (i = 0; i < 19; i++) 611 for (i = 0; i < 19; i++)
612 { 612 {
613 OPLL_dump2patch (dump + i * 16, patch); 613 OPLL_dump2patch (dump + i * 16, patch);
614 memcpy (&opll->patch[i*2+0], &patch[0], sizeof (OPLL_PATCH)); 614 memcpy (&opll->patch[i*2+0], &patch[0], sizeof (OPLL_PATCH));
615 memcpy (&opll->patch[i*2+1], &patch[1], sizeof (OPLL_PATCH)); 615 memcpy (&opll->patch[i*2+1], &patch[1], sizeof (OPLL_PATCH));
616 } 616 }
617} 617}
618 618
619void 619void
620OPLL_patch2dump (const OPLL_PATCH * patch, e_uint8 * dump) 620OPLL_patch2dump (const OPLL_PATCH * patch, e_uint8 * dump)
621{ 621{
622 dump[0] = (e_uint8) ((patch[0].AM << 7) + (patch[0].PM << 6) + (patch[0].EG << 5) + (patch[0].KR << 4) + patch[0].ML); 622 dump[0] = (e_uint8) ((patch[0].AM << 7) + (patch[0].PM << 6) + (patch[0].EG << 5) + (patch[0].KR << 4) + patch[0].ML);
623 dump[1] = (e_uint8) ((patch[1].AM << 7) + (patch[1].PM << 6) + (patch[1].EG << 5) + (patch[1].KR << 4) + patch[1].ML); 623 dump[1] = (e_uint8) ((patch[1].AM << 7) + (patch[1].PM << 6) + (patch[1].EG << 5) + (patch[1].KR << 4) + patch[1].ML);
624 dump[2] = (e_uint8) ((patch[0].KL << 6) + patch[0].TL); 624 dump[2] = (e_uint8) ((patch[0].KL << 6) + patch[0].TL);
625 dump[3] = (e_uint8) ((patch[1].KL << 6) + (patch[1].WF << 4) + (patch[0].WF << 3) + patch[0].FB); 625 dump[3] = (e_uint8) ((patch[1].KL << 6) + (patch[1].WF << 4) + (patch[0].WF << 3) + patch[0].FB);
626 dump[4] = (e_uint8) ((patch[0].AR << 4) + patch[0].DR); 626 dump[4] = (e_uint8) ((patch[0].AR << 4) + patch[0].DR);
627 dump[5] = (e_uint8) ((patch[1].AR << 4) + patch[1].DR); 627 dump[5] = (e_uint8) ((patch[1].AR << 4) + patch[1].DR);
628 dump[6] = (e_uint8) ((patch[0].SL << 4) + patch[0].RR); 628 dump[6] = (e_uint8) ((patch[0].SL << 4) + patch[0].RR);
629 dump[7] = (e_uint8) ((patch[1].SL << 4) + patch[1].RR); 629 dump[7] = (e_uint8) ((patch[1].SL << 4) + patch[1].RR);
630 dump[8] = 0; 630 dump[8] = 0;
631 dump[9] = 0; 631 dump[9] = 0;
632 dump[10] = 0; 632 dump[10] = 0;
633 dump[11] = 0; 633 dump[11] = 0;
634 dump[12] = 0; 634 dump[12] = 0;
635 dump[13] = 0; 635 dump[13] = 0;
636 dump[14] = 0; 636 dump[14] = 0;
637 dump[15] = 0; 637 dump[15] = 0;
638} 638}
639 639
640/************************************************************ 640/************************************************************
641 641
642 Calc Parameters 642 Calc Parameters
643 643
644************************************************************/ 644************************************************************/
645 645
646INLINE static e_uint32 646INLINE static e_uint32
647calc_eg_dphase (OPLL_SLOT * slot) 647calc_eg_dphase (OPLL_SLOT * slot)
648{ 648{
649 649
650 switch (slot->eg_mode) 650 switch (slot->eg_mode)
651 { 651 {
652 case ATTACK: 652 case ATTACK:
653 return dphaseARTable[slot->patch->AR][slot->rks]; 653 return dphaseARTable[slot->patch->AR][slot->rks];
654 654
655 case DECAY: 655 case DECAY:
656 return dphaseDRTable[slot->patch->DR][slot->rks]; 656 return dphaseDRTable[slot->patch->DR][slot->rks];
657 657
658 case SUSHOLD: 658 case SUSHOLD:
659 return 0; 659 return 0;
660 660
661 case SUSTINE: 661 case SUSTINE:
662 return dphaseDRTable[slot->patch->RR][slot->rks]; 662 return dphaseDRTable[slot->patch->RR][slot->rks];
663 663
664 case RELEASE: 664 case RELEASE:
665 if (slot->sustine) 665 if (slot->sustine)
666 return dphaseDRTable[5][slot->rks]; 666 return dphaseDRTable[5][slot->rks];
667 else if (slot->patch->EG) 667 else if (slot->patch->EG)
668 return dphaseDRTable[slot->patch->RR][slot->rks]; 668 return dphaseDRTable[slot->patch->RR][slot->rks];
669 else 669 else
670 return dphaseDRTable[7][slot->rks]; 670 return dphaseDRTable[7][slot->rks];
671 671
672 case SETTLE: 672 case SETTLE:
673 return dphaseDRTable[15][0]; 673 return dphaseDRTable[15][0];
674 674
675 case FINISH: 675 case FINISH:
676 return 0; 676 return 0;
677 677
678 default: 678 default:
679 return 0; 679 return 0;
680 } 680 }
681} 681}
682 682
683/************************************************************* 683/*************************************************************
684 684
685 OPLL internal interfaces 685 OPLL internal interfaces
686 686
687*************************************************************/ 687*************************************************************/
688#define SLOT_BD1 12 688#define SLOT_BD1 12
689#define SLOT_BD2 13 689#define SLOT_BD2 13
690#define SLOT_HH 14 690#define SLOT_HH 14
691#define SLOT_SD 15 691#define SLOT_SD 15
692#define SLOT_TOM 16 692#define SLOT_TOM 16
693#define SLOT_CYM 17 693#define SLOT_CYM 17
694 694
695/* We will set this dinamically, but not sure if this affects playback */ 695/* We will set this dinamically, but not sure if this affects playback */
696#if defined(ROCKBOX) 696#if defined(ROCKBOX)
697INLINE static void 697INLINE static void
698UPDATE_PG(OPLL_SLOT * slot) 698UPDATE_PG(OPLL_SLOT * slot)
699{ 699{
700 static const e_uint32 mltable[16] = 700 static const e_uint32 mltable[16] =
701 { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 }; 701 { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 };
702 702
703 slot->dphase = RATE_ADJUST (((slot->fnum * mltable[slot->patch->ML]) << slot->block) >> (20 - DP_BITS)); 703 slot->dphase = RATE_ADJUST (((slot->fnum * mltable[slot->patch->ML]) << slot->block) >> (20 - DP_BITS));
704} 704}
705#else 705#else
706#define UPDATE_PG(S) (S)->dphase = dphaseTable[(S)->fnum][(S)->block][(S)->patch->ML] 706#define UPDATE_PG(S) (S)->dphase = dphaseTable[(S)->fnum][(S)->block][(S)->patch->ML]
707#endif 707#endif
708 708
709#define UPDATE_TLL(S)\ 709#define UPDATE_TLL(S)\
710(((S)->type==0)?\ 710(((S)->type==0)?\
711((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->patch->TL][(S)->patch->KL]):\ 711((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->patch->TL][(S)->patch->KL]):\
712((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->volume][(S)->patch->KL])) 712((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->volume][(S)->patch->KL]))
713#define UPDATE_RKS(S) (S)->rks = rksTable[((S)->fnum)>>8][(S)->block][(S)->patch->KR] 713#define UPDATE_RKS(S) (S)->rks = rksTable[((S)->fnum)>>8][(S)->block][(S)->patch->KR]
714#define UPDATE_WF(S) (S)->sintbl = waveform[(S)->patch->WF] 714#define UPDATE_WF(S) (S)->sintbl = waveform[(S)->patch->WF]
715#define UPDATE_EG(S) (S)->eg_dphase = calc_eg_dphase(S) 715#define UPDATE_EG(S) (S)->eg_dphase = calc_eg_dphase(S)
716#define UPDATE_ALL(S)\ 716#define UPDATE_ALL(S)\
717 UPDATE_PG(S);\ 717 UPDATE_PG(S);\
718 UPDATE_TLL(S);\ 718 UPDATE_TLL(S);\
719 UPDATE_RKS(S);\ 719 UPDATE_RKS(S);\
720 UPDATE_WF(S); \ 720 UPDATE_WF(S); \
721 UPDATE_EG(S) /* EG should be updated last. */ 721 UPDATE_EG(S) /* EG should be updated last. */
722 722
723 723
724/* Slot key on */ 724/* Slot key on */
725INLINE static void 725INLINE static void
726slotOn (OPLL_SLOT * slot) 726slotOn (OPLL_SLOT * slot)
727{ 727{
728 slot->eg_mode = ATTACK; 728 slot->eg_mode = ATTACK;
729 slot->eg_phase = 0; 729 slot->eg_phase = 0;
730 slot->phase = 0; 730 slot->phase = 0;
731 UPDATE_EG(slot); 731 UPDATE_EG(slot);
732} 732}
733 733
734/* Slot key on without reseting the phase */ 734/* Slot key on without reseting the phase */
735INLINE static void 735INLINE static void
736slotOn2 (OPLL_SLOT * slot) 736slotOn2 (OPLL_SLOT * slot)
737{ 737{
738 slot->eg_mode = ATTACK; 738 slot->eg_mode = ATTACK;
739 slot->eg_phase = 0; 739 slot->eg_phase = 0;
740 UPDATE_EG(slot); 740 UPDATE_EG(slot);
741} 741}
742 742
743/* Slot key off */ 743/* Slot key off */
744INLINE static void 744INLINE static void
745slotOff (OPLL_SLOT * slot) 745slotOff (OPLL_SLOT * slot)
746{ 746{
747 if (slot->eg_mode == ATTACK) 747 if (slot->eg_mode == ATTACK)
748 slot->eg_phase = EXPAND_BITS (AR_ADJUST_TABLE(HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)), EG_BITS, EG_DP_BITS); 748 slot->eg_phase = EXPAND_BITS (AR_ADJUST_TABLE(HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)), EG_BITS, EG_DP_BITS);
749 slot->eg_mode = RELEASE; 749 slot->eg_mode = RELEASE;
750 UPDATE_EG(slot); 750 UPDATE_EG(slot);
751} 751}
752 752
753/* Channel key on */ 753/* Channel key on */
754INLINE static void 754INLINE static void
755keyOn (OPLL * opll, e_int32 i) 755keyOn (OPLL * opll, e_int32 i)
756{ 756{
757 if (!opll->slot_on_flag[i * 2]) 757 if (!opll->slot_on_flag[i * 2])
758 slotOn (MOD(opll,i)); 758 slotOn (MOD(opll,i));
759 if (!opll->slot_on_flag[i * 2 + 1]) 759 if (!opll->slot_on_flag[i * 2 + 1])
760 slotOn (CAR(opll,i)); 760 slotOn (CAR(opll,i));
761 opll->key_status[i] = 1; 761 opll->key_status[i] = 1;
762} 762}
763 763
764/* Channel key off */ 764/* Channel key off */
765INLINE static void 765INLINE static void
766keyOff (OPLL * opll, e_int32 i) 766keyOff (OPLL * opll, e_int32 i)
767{ 767{
768 if (opll->slot_on_flag[i * 2 + 1]) 768 if (opll->slot_on_flag[i * 2 + 1])
769 slotOff (CAR(opll,i)); 769 slotOff (CAR(opll,i));
770 opll->key_status[i] = 0; 770 opll->key_status[i] = 0;
771} 771}
772 772
773INLINE static void 773INLINE static void
774keyOn_BD (OPLL * opll) 774keyOn_BD (OPLL * opll)
775{ 775{
776 keyOn (opll, 6); 776 keyOn (opll, 6);
777} 777}
778INLINE static void 778INLINE static void
779keyOn_SD (OPLL * opll) 779keyOn_SD (OPLL * opll)
780{ 780{
781 if (!opll->slot_on_flag[SLOT_SD]) 781 if (!opll->slot_on_flag[SLOT_SD])
782 slotOn (CAR(opll,7)); 782 slotOn (CAR(opll,7));
783} 783}
784INLINE static void 784INLINE static void
785keyOn_TOM (OPLL * opll) 785keyOn_TOM (OPLL * opll)
786{ 786{
787 if (!opll->slot_on_flag[SLOT_TOM]) 787 if (!opll->slot_on_flag[SLOT_TOM])
788 slotOn (MOD(opll,8)); 788 slotOn (MOD(opll,8));
789} 789}
790INLINE static void 790INLINE static void
791keyOn_HH (OPLL * opll) 791keyOn_HH (OPLL * opll)
792{ 792{
793 if (!opll->slot_on_flag[SLOT_HH]) 793 if (!opll->slot_on_flag[SLOT_HH])
794 slotOn2 (MOD(opll,7)); 794 slotOn2 (MOD(opll,7));
795} 795}
796INLINE static void 796INLINE static void
797keyOn_CYM (OPLL * opll) 797keyOn_CYM (OPLL * opll)
798{ 798{
799 if (!opll->slot_on_flag[SLOT_CYM]) 799 if (!opll->slot_on_flag[SLOT_CYM])
800 slotOn2 (CAR(opll,8)); 800 slotOn2 (CAR(opll,8));
801} 801}
802 802
803/* Drum key off */ 803/* Drum key off */
804INLINE static void 804INLINE static void
805keyOff_BD (OPLL * opll) 805keyOff_BD (OPLL * opll)
806{ 806{
807 keyOff (opll, 6); 807 keyOff (opll, 6);
808} 808}
809INLINE static void 809INLINE static void
810keyOff_SD (OPLL * opll) 810keyOff_SD (OPLL * opll)
811{ 811{
812 if (opll->slot_on_flag[SLOT_SD]) 812 if (opll->slot_on_flag[SLOT_SD])
813 slotOff (CAR(opll,7)); 813 slotOff (CAR(opll,7));
814} 814}
815INLINE static void 815INLINE static void
816keyOff_TOM (OPLL * opll) 816keyOff_TOM (OPLL * opll)
817{ 817{
818 if (opll->slot_on_flag[SLOT_TOM]) 818 if (opll->slot_on_flag[SLOT_TOM])
819 slotOff (MOD(opll,8)); 819 slotOff (MOD(opll,8));
820} 820}
821INLINE static void 821INLINE static void
822keyOff_HH (OPLL * opll) 822keyOff_HH (OPLL * opll)
823{ 823{
824 if (opll->slot_on_flag[SLOT_HH]) 824 if (opll->slot_on_flag[SLOT_HH])
825 slotOff (MOD(opll,7)); 825 slotOff (MOD(opll,7));
826} 826}
827INLINE static void 827INLINE static void
828keyOff_CYM (OPLL * opll) 828keyOff_CYM (OPLL * opll)
829{ 829{
830 if (opll->slot_on_flag[SLOT_CYM]) 830 if (opll->slot_on_flag[SLOT_CYM])
831 slotOff (CAR(opll,8)); 831 slotOff (CAR(opll,8));
832} 832}
833 833
834/* Change a voice */ 834/* Change a voice */
835INLINE static void 835INLINE static void
836setPatch (OPLL * opll, e_int32 i, e_int32 num) 836setPatch (OPLL * opll, e_int32 i, e_int32 num)
837{ 837{
838 opll->patch_number[i] = num; 838 opll->patch_number[i] = num;
839 MOD(opll,i)->patch = &opll->patch[num * 2 + 0]; 839 MOD(opll,i)->patch = &opll->patch[num * 2 + 0];
840 CAR(opll,i)->patch = &opll->patch[num * 2 + 1]; 840 CAR(opll,i)->patch = &opll->patch[num * 2 + 1];
841} 841}
842 842
843/* Change a rhythm voice */ 843/* Change a rhythm voice */
844INLINE static void 844INLINE static void
845setSlotPatch (OPLL_SLOT * slot, OPLL_PATCH * patch) 845setSlotPatch (OPLL_SLOT * slot, OPLL_PATCH * patch)
846{ 846{
847 slot->patch = patch; 847 slot->patch = patch;
848} 848}
849 849
850/* Set sustine parameter */ 850/* Set sustine parameter */
851INLINE static void 851INLINE static void
852setSustine (OPLL * opll, e_int32 c, e_int32 sustine) 852setSustine (OPLL * opll, e_int32 c, e_int32 sustine)
853{ 853{
854 CAR(opll,c)->sustine = sustine; 854 CAR(opll,c)->sustine = sustine;
855 if (MOD(opll,c)->type) 855 if (MOD(opll,c)->type)
856 MOD(opll,c)->sustine = sustine; 856 MOD(opll,c)->sustine = sustine;
857} 857}
858 858
859/* Volume : 6bit ( Volume register << 2 ) */ 859/* Volume : 6bit ( Volume register << 2 ) */
860INLINE static void 860INLINE static void
861setVolume (OPLL * opll, e_int32 c, e_int32 volume) 861setVolume (OPLL * opll, e_int32 c, e_int32 volume)
862{ 862{
863 CAR(opll,c)->volume = volume; 863 CAR(opll,c)->volume = volume;
864} 864}
865 865
866INLINE static void 866INLINE static void
867setSlotVolume (OPLL_SLOT * slot, e_int32 volume) 867setSlotVolume (OPLL_SLOT * slot, e_int32 volume)
868{ 868{
869 slot->volume = volume; 869 slot->volume = volume;
870} 870}
871 871
872/* Set F-Number ( fnum : 9bit ) */ 872/* Set F-Number ( fnum : 9bit ) */
873INLINE static void 873INLINE static void
874setFnumber (OPLL * opll, e_int32 c, e_int32 fnum) 874setFnumber (OPLL * opll, e_int32 c, e_int32 fnum)
875{ 875{
876 CAR(opll,c)->fnum = fnum; 876 CAR(opll,c)->fnum = fnum;
877 MOD(opll,c)->fnum = fnum; 877 MOD(opll,c)->fnum = fnum;
878} 878}
879 879
880/* Set Block data (block : 3bit ) */ 880/* Set Block data (block : 3bit ) */
881INLINE static void 881INLINE static void
882setBlock (OPLL * opll, e_int32 c, e_int32 block) 882setBlock (OPLL * opll, e_int32 c, e_int32 block)
883{ 883{
884 CAR(opll,c)->block = block; 884 CAR(opll,c)->block = block;
885 MOD(opll,c)->block = block; 885 MOD(opll,c)->block = block;
886} 886}
887 887
888/* Change Rhythm Mode */ 888/* Change Rhythm Mode */
889INLINE static void 889INLINE static void
890update_rhythm_mode (OPLL * opll) 890update_rhythm_mode (OPLL * opll)
891{ 891{
892 if (opll->patch_number[6] & 0x10) 892 if (opll->patch_number[6] & 0x10)
893 { 893 {
894 if (!(opll->slot_on_flag[SLOT_BD2] | (opll->reg[0x0e] & 32))) 894 if (!(opll->slot_on_flag[SLOT_BD2] | (opll->reg[0x0e] & 32)))
895 { 895 {
896 opll->slot[SLOT_BD1].eg_mode = FINISH; 896 opll->slot[SLOT_BD1].eg_mode = FINISH;
897 opll->slot[SLOT_BD2].eg_mode = FINISH; 897 opll->slot[SLOT_BD2].eg_mode = FINISH;
898 setPatch (opll, 6, opll->reg[0x36] >> 4); 898 setPatch (opll, 6, opll->reg[0x36] >> 4);
899 } 899 }
900 } 900 }
901 else if (opll->reg[0x0e] & 32) 901 else if (opll->reg[0x0e] & 32)
902 { 902 {
903 opll->patch_number[6] = 16; 903 opll->patch_number[6] = 16;
904 opll->slot[SLOT_BD1].eg_mode = FINISH; 904 opll->slot[SLOT_BD1].eg_mode = FINISH;
905 opll->slot[SLOT_BD2].eg_mode = FINISH; 905 opll->slot[SLOT_BD2].eg_mode = FINISH;
906 setSlotPatch (&opll->slot[SLOT_BD1], &opll->patch[16 * 2 + 0]); 906 setSlotPatch (&opll->slot[SLOT_BD1], &opll->patch[16 * 2 + 0]);
907 setSlotPatch (&opll->slot[SLOT_BD2], &opll->patch[16 * 2 + 1]); 907 setSlotPatch (&opll->slot[SLOT_BD2], &opll->patch[16 * 2 + 1]);
908 } 908 }
909 909
910 if (opll->patch_number[7] & 0x10) 910 if (opll->patch_number[7] & 0x10)
911 { 911 {
912 if (!((opll->slot_on_flag[SLOT_HH] && opll->slot_on_flag[SLOT_SD]) | (opll->reg[0x0e] & 32))) 912 if (!((opll->slot_on_flag[SLOT_HH] && opll->slot_on_flag[SLOT_SD]) | (opll->reg[0x0e] & 32)))
913 { 913 {
914 opll->slot[SLOT_HH].type = 0; 914 opll->slot[SLOT_HH].type = 0;
915 opll->slot[SLOT_HH].eg_mode = FINISH; 915 opll->slot[SLOT_HH].eg_mode = FINISH;
916 opll->slot[SLOT_SD].eg_mode = FINISH; 916 opll->slot[SLOT_SD].eg_mode = FINISH;
917 setPatch (opll, 7, opll->reg[0x37] >> 4); 917 setPatch (opll, 7, opll->reg[0x37] >> 4);
918 } 918 }
919 } 919 }
920 else if (opll->reg[0x0e] & 32) 920 else if (opll->reg[0x0e] & 32)
921 { 921 {
922 opll->patch_number[7] = 17; 922 opll->patch_number[7] = 17;
923 opll->slot[SLOT_HH].type = 1; 923 opll->slot[SLOT_HH].type = 1;
924 opll->slot[SLOT_HH].eg_mode = FINISH; 924 opll->slot[SLOT_HH].eg_mode = FINISH;
925 opll->slot[SLOT_SD].eg_mode = FINISH; 925 opll->slot[SLOT_SD].eg_mode = FINISH;
926 setSlotPatch (&opll->slot[SLOT_HH], &opll->patch[17 * 2 + 0]); 926 setSlotPatch (&opll->slot[SLOT_HH], &opll->patch[17 * 2 + 0]);
927 setSlotPatch (&opll->slot[SLOT_SD], &opll->patch[17 * 2 + 1]); 927 setSlotPatch (&opll->slot[SLOT_SD], &opll->patch[17 * 2 + 1]);
928 } 928 }
929 929
930 if (opll->patch_number[8] & 0x10) 930 if (opll->patch_number[8] & 0x10)
931 { 931 {
932 if (!((opll->slot_on_flag[SLOT_CYM] && opll->slot_on_flag[SLOT_TOM]) | (opll->reg[0x0e] & 32))) 932 if (!((opll->slot_on_flag[SLOT_CYM] && opll->slot_on_flag[SLOT_TOM]) | (opll->reg[0x0e] & 32)))
933 { 933 {
934 opll->slot[SLOT_TOM].type = 0; 934 opll->slot[SLOT_TOM].type = 0;
935 opll->slot[SLOT_TOM].eg_mode = FINISH; 935 opll->slot[SLOT_TOM].eg_mode = FINISH;
936 opll->slot[SLOT_CYM].eg_mode = FINISH; 936 opll->slot[SLOT_CYM].eg_mode = FINISH;
937 setPatch (opll, 8, opll->reg[0x38] >> 4); 937 setPatch (opll, 8, opll->reg[0x38] >> 4);
938 } 938 }
939 } 939 }
940 else if (opll->reg[0x0e] & 32) 940 else if (opll->reg[0x0e] & 32)
941 { 941 {
942 opll->patch_number[8] = 18; 942 opll->patch_number[8] = 18;
943 opll->slot[SLOT_TOM].type = 1; 943 opll->slot[SLOT_TOM].type = 1;
944 opll->slot[SLOT_TOM].eg_mode = FINISH; 944 opll->slot[SLOT_TOM].eg_mode = FINISH;
945 opll->slot[SLOT_CYM].eg_mode = FINISH; 945 opll->slot[SLOT_CYM].eg_mode = FINISH;
946 setSlotPatch (&opll->slot[SLOT_TOM], &opll->patch[18 * 2 + 0]); 946 setSlotPatch (&opll->slot[SLOT_TOM], &opll->patch[18 * 2 + 0]);
947 setSlotPatch (&opll->slot[SLOT_CYM], &opll->patch[18 * 2 + 1]); 947 setSlotPatch (&opll->slot[SLOT_CYM], &opll->patch[18 * 2 + 1]);
948 } 948 }
949} 949}
950 950
951INLINE static void 951INLINE static void
952update_key_status (OPLL * opll) 952update_key_status (OPLL * opll)
953{ 953{
954 int ch; 954 int ch;
955 955
956 for (ch = 0; ch < 9; ch++) 956 for (ch = 0; ch < 9; ch++)
957 opll->slot_on_flag[ch * 2] = opll->slot_on_flag[ch * 2 + 1] = (opll->reg[0x20 + ch]) & 0x10; 957 opll->slot_on_flag[ch * 2] = opll->slot_on_flag[ch * 2 + 1] = (opll->reg[0x20 + ch]) & 0x10;
958 958
959 if (opll->reg[0x0e] & 32) 959 if (opll->reg[0x0e] & 32)
960 { 960 {
961 opll->slot_on_flag[SLOT_BD1] |= (opll->reg[0x0e] & 0x10); 961 opll->slot_on_flag[SLOT_BD1] |= (opll->reg[0x0e] & 0x10);
962 opll->slot_on_flag[SLOT_BD2] |= (opll->reg[0x0e] & 0x10); 962 opll->slot_on_flag[SLOT_BD2] |= (opll->reg[0x0e] & 0x10);
963 opll->slot_on_flag[SLOT_SD] |= (opll->reg[0x0e] & 0x08); 963 opll->slot_on_flag[SLOT_SD] |= (opll->reg[0x0e] & 0x08);
964 opll->slot_on_flag[SLOT_HH] |= (opll->reg[0x0e] & 0x01); 964 opll->slot_on_flag[SLOT_HH] |= (opll->reg[0x0e] & 0x01);
965 opll->slot_on_flag[SLOT_TOM] |= (opll->reg[0x0e] & 0x04); 965 opll->slot_on_flag[SLOT_TOM] |= (opll->reg[0x0e] & 0x04);
966 opll->slot_on_flag[SLOT_CYM] |= (opll->reg[0x0e] & 0x02); 966 opll->slot_on_flag[SLOT_CYM] |= (opll->reg[0x0e] & 0x02);
967 } 967 }
968} 968}
969 969
970void 970void
971OPLL_copyPatch (OPLL * opll, e_int32 num, OPLL_PATCH * patch) 971OPLL_copyPatch (OPLL * opll, e_int32 num, OPLL_PATCH * patch)
972{ 972{
973 memcpy (&opll->patch[num], patch, sizeof (OPLL_PATCH)); 973 memcpy (&opll->patch[num], patch, sizeof (OPLL_PATCH));
974} 974}
975 975
976/*********************************************************** 976/***********************************************************
977 977
978 Initializing 978 Initializing
979 979
980***********************************************************/ 980***********************************************************/
981 981
982static void 982static void
983OPLL_SLOT_reset (OPLL_SLOT * slot, int type) 983OPLL_SLOT_reset (OPLL_SLOT * slot, int type)
984{ 984{
985 slot->type = type; 985 slot->type = type;
986 slot->sintbl = waveform[0]; 986 slot->sintbl = waveform[0];
987 slot->phase = 0; 987 slot->phase = 0;
988 slot->dphase = 0; 988 slot->dphase = 0;
989 slot->output[0] = 0; 989 slot->output[0] = 0;
990 slot->output[1] = 0; 990 slot->output[1] = 0;
991 slot->feedback = 0; 991 slot->feedback = 0;
992 slot->eg_mode = FINISH; 992 slot->eg_mode = FINISH;
993 slot->eg_phase = EG_DP_WIDTH; 993 slot->eg_phase = EG_DP_WIDTH;
994 slot->eg_dphase = 0; 994 slot->eg_dphase = 0;
995 slot->rks = 0; 995 slot->rks = 0;
996 slot->tll = 0; 996 slot->tll = 0;
997 slot->sustine = 0; 997 slot->sustine = 0;
998 slot->fnum = 0; 998 slot->fnum = 0;
999 slot->block = 0; 999 slot->block = 0;
1000 slot->volume = 0; 1000 slot->volume = 0;
1001 slot->pgout = 0; 1001 slot->pgout = 0;
1002 slot->egout = 0; 1002 slot->egout = 0;
1003 slot->patch = &null_patch; 1003 slot->patch = &null_patch;
1004} 1004}
1005 1005
1006static void 1006static void
1007internal_refresh (void) 1007internal_refresh (void)
1008{ 1008{
1009#if !defined(ROCKBOX) 1009#if !defined(ROCKBOX)
1010 makeDphaseTable (); 1010 makeDphaseTable ();
1011#endif 1011#endif
1012 makeDphaseARTable (); 1012 makeDphaseARTable ();
1013 makeDphaseDRTable (); 1013 makeDphaseDRTable ();
1014 pm_dphase = (e_uint32) RATE_ADJUST ((int)(PM_SPEED * PM_DP_WIDTH) / (clk / 72)); 1014 pm_dphase = (e_uint32) RATE_ADJUST ((int)(PM_SPEED * PM_DP_WIDTH) / (clk / 72));
1015 am_dphase = (e_uint32) RATE_ADJUST ((int)(AM_SPEED * AM_DP_WIDTH) / (clk / 72)); 1015 am_dphase = (e_uint32) RATE_ADJUST ((int)(AM_SPEED * AM_DP_WIDTH) / (clk / 72));
1016} 1016}
1017 1017
1018static void 1018static void
1019maketables (e_uint32 c, e_uint32 r) 1019maketables (e_uint32 c, e_uint32 r)
1020{ 1020{
1021 if (c != clk) 1021 if (c != clk)
1022 { 1022 {
1023 clk = c; 1023 clk = c;
1024#ifdef EMU2413_CALCUL_TABLES 1024#ifdef EMU2413_CALCUL_TABLES
1025 makePmTable (); 1025 makePmTable ();
1026 makeAmTable (); 1026 makeAmTable ();
1027 makeAdjustTable (); 1027 makeAdjustTable ();
1028#endif 1028#endif
1029 makeDB2LinTable (); 1029 makeDB2LinTable ();
1030 makeTllTable (); 1030 makeTllTable ();
1031 makeRksTable (); 1031 makeRksTable ();
1032 makeSinTable (); 1032 makeSinTable ();
1033 makeDefaultPatch (); 1033 makeDefaultPatch ();
1034 } 1034 }
1035 1035
1036 if (r != rate) 1036 if (r != rate)
1037 { 1037 {
1038 rate = r; 1038 rate = r;
1039 internal_refresh (); 1039 internal_refresh ();
1040 } 1040 }
1041} 1041}
1042 1042
1043void 1043void
1044OPLL_new (OPLL *opll, e_uint32 clk, e_uint32 rate) 1044OPLL_new (OPLL *opll, e_uint32 clk, e_uint32 rate)
1045{ 1045{
1046 e_int32 i; 1046 e_int32 i;
1047 1047
1048 maketables (clk, rate); 1048 maketables (clk, rate);
1049 1049
1050 memset(opll, 0, sizeof (OPLL)); 1050 memset(opll, 0, sizeof (OPLL));
1051 for (i = 0; i < 19 * 2; i++) 1051 for (i = 0; i < 19 * 2; i++)
1052 memcpy(&opll->patch[i],&null_patch,sizeof(OPLL_PATCH)); 1052 memcpy(&opll->patch[i],&null_patch,sizeof(OPLL_PATCH));
1053 1053
1054 opll->mask = 0; 1054 opll->mask = 0;
1055 1055
1056 OPLL_reset (opll); 1056 OPLL_reset (opll);
1057 OPLL_reset_patch (opll, 0); 1057 OPLL_reset_patch (opll, 0);
1058} 1058}
1059 1059
1060 1060
1061void 1061void
1062OPLL_delete (OPLL * opll) 1062OPLL_delete (OPLL * opll)
1063{ 1063{
1064 (void) opll; 1064 (void) opll;
1065} 1065}
1066 1066
1067 1067
1068/* Reset patch datas by system default. */ 1068/* Reset patch datas by system default. */
1069void 1069void
1070OPLL_reset_patch (OPLL * opll, e_int32 type) 1070OPLL_reset_patch (OPLL * opll, e_int32 type)
1071{ 1071{
1072 e_int32 i; 1072 e_int32 i;
1073 1073
1074 for (i = 0; i < 19 * 2; i++) 1074 for (i = 0; i < 19 * 2; i++)
1075 OPLL_copyPatch (opll, i, &default_patch[type % OPLL_TONE_NUM][i]); 1075 OPLL_copyPatch (opll, i, &default_patch[type % OPLL_TONE_NUM][i]);
1076} 1076}
1077 1077
1078/* Reset whole of OPLL except patch datas. */ 1078/* Reset whole of OPLL except patch datas. */
1079void 1079void
1080OPLL_reset (OPLL * opll) 1080OPLL_reset (OPLL * opll)
1081{ 1081{
1082 e_int32 i; 1082 e_int32 i;
1083 1083
1084 if (!opll) 1084 if (!opll)
1085 return; 1085 return;
1086 1086
1087 opll->adr = 0; 1087 opll->adr = 0;
1088 opll->out = 0; 1088 opll->out = 0;
1089 1089
1090 opll->pm_phase = 0; 1090 opll->pm_phase = 0;
1091 opll->am_phase = 0; 1091 opll->am_phase = 0;
1092 1092
1093 opll->noise_seed = 0xffff; 1093 opll->noise_seed = 0xffff;
1094 opll->mask = 0; 1094 opll->mask = 0;
1095 1095
1096 for (i = 0; i <18; i++) 1096 for (i = 0; i <18; i++)
1097 OPLL_SLOT_reset(&opll->slot[i], i%2); 1097 OPLL_SLOT_reset(&opll->slot[i], i%2);
1098 1098
1099 for (i = 0; i < 9; i++) 1099 for (i = 0; i < 9; i++)
1100 { 1100 {
1101 opll->key_status[i] = 0; 1101 opll->key_status[i] = 0;
1102 setPatch (opll, i, 0); 1102 setPatch (opll, i, 0);
1103 } 1103 }
1104 1104
1105 for (i = 0; i < 0x40; i++) 1105 for (i = 0; i < 0x40; i++)
1106 OPLL_writeReg (opll, i, 0); 1106 OPLL_writeReg (opll, i, 0);
1107 1107
1108#ifndef EMU2413_COMPACTION 1108#ifndef EMU2413_COMPACTION
1109 opll->realstep = (e_uint32) ((1 << 31) / rate); 1109 opll->realstep = (e_uint32) ((1 << 31) / rate);
1110 opll->opllstep = (e_uint32) ((1 << 31) / (clk / 72)); 1110 opll->opllstep = (e_uint32) ((1 << 31) / (clk / 72));
1111 opll->oplltime = 0; 1111 opll->oplltime = 0;
1112 for (i = 0; i < 14; i++) 1112 for (i = 0; i < 14; i++)
1113 opll->pan[i] = 2; 1113 opll->pan[i] = 2;
1114 opll->sprev[0] = opll->sprev[1] = 0; 1114 opll->sprev[0] = opll->sprev[1] = 0;
1115 opll->snext[0] = opll->snext[1] = 0; 1115 opll->snext[0] = opll->snext[1] = 0;
1116#endif 1116#endif
1117} 1117}
1118 1118
1119/* Force Refresh (When external program changes some parameters). */ 1119/* Force Refresh (When external program changes some parameters). */
1120void 1120void
1121OPLL_forceRefresh (OPLL * opll) 1121OPLL_forceRefresh (OPLL * opll)
1122{ 1122{
1123 e_int32 i; 1123 e_int32 i;
1124 1124
1125 if (opll == NULL) 1125 if (opll == NULL)
1126 return; 1126 return;
1127 1127
1128 for (i = 0; i < 9; i++) 1128 for (i = 0; i < 9; i++)
1129 setPatch(opll,i,opll->patch_number[i]); 1129 setPatch(opll,i,opll->patch_number[i]);
1130 1130
1131 for (i = 0; i < 18; i++) 1131 for (i = 0; i < 18; i++)
1132 { 1132 {
1133 UPDATE_PG (&opll->slot[i]); 1133 UPDATE_PG (&opll->slot[i]);
1134 UPDATE_RKS (&opll->slot[i]); 1134 UPDATE_RKS (&opll->slot[i]);
1135 UPDATE_TLL (&opll->slot[i]); 1135 UPDATE_TLL (&opll->slot[i]);
1136 UPDATE_WF (&opll->slot[i]); 1136 UPDATE_WF (&opll->slot[i]);
1137 UPDATE_EG (&opll->slot[i]); 1137 UPDATE_EG (&opll->slot[i]);
1138 } 1138 }
1139} 1139}
1140 1140
1141void 1141void
1142OPLL_set_rate (OPLL * opll, e_uint32 r) 1142OPLL_set_rate (OPLL * opll, e_uint32 r)
1143{ 1143{
1144 if (rate == r) return; 1144 if (rate == r) return;
1145 if (opll->quality) 1145 if (opll->quality)
1146 rate = 49716; 1146 rate = 49716;
1147 else 1147 else
1148 rate = r; 1148 rate = r;
1149 internal_refresh (); 1149 internal_refresh ();
1150 rate = r; 1150 rate = r;
1151} 1151}
1152 1152
1153void 1153void
1154OPLL_set_quality (OPLL * opll, e_uint32 q) 1154OPLL_set_quality (OPLL * opll, e_uint32 q)
1155{ 1155{
1156 opll->quality = q; 1156 opll->quality = q;
1157 OPLL_set_rate (opll, rate); 1157 OPLL_set_rate (opll, rate);
1158} 1158}
1159 1159
1160/********************************************************* 1160/*********************************************************
1161 1161
1162 Generate wave data 1162 Generate wave data
1163 1163
1164*********************************************************/ 1164*********************************************************/
1165/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 2PI). */ 1165/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 2PI). */
1166#if ( SLOT_AMP_BITS - PG_BITS ) > 0 1166#if ( SLOT_AMP_BITS - PG_BITS ) > 0
1167#define wave2_2pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS )) 1167#define wave2_2pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS ))
1168#else 1168#else
1169#define wave2_2pi(e) ( (e) << ( PG_BITS - SLOT_AMP_BITS )) 1169#define wave2_2pi(e) ( (e) << ( PG_BITS - SLOT_AMP_BITS ))
1170#endif 1170#endif
1171 1171
1172/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 4PI). */ 1172/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 4PI). */
1173#if ( SLOT_AMP_BITS - PG_BITS - 1 ) == 0 1173#if ( SLOT_AMP_BITS - PG_BITS - 1 ) == 0
1174#define wave2_4pi(e) (e) 1174#define wave2_4pi(e) (e)
1175#elif ( SLOT_AMP_BITS - PG_BITS - 1 ) > 0 1175#elif ( SLOT_AMP_BITS - PG_BITS - 1 ) > 0
1176#define wave2_4pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 1 )) 1176#define wave2_4pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 1 ))
1177#else 1177#else
1178#define wave2_4pi(e) ( (e) << ( 1 + PG_BITS - SLOT_AMP_BITS )) 1178#define wave2_4pi(e) ( (e) << ( 1 + PG_BITS - SLOT_AMP_BITS ))
1179#endif 1179#endif
1180 1180
1181/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 8PI). */ 1181/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 8PI). */
1182#if ( SLOT_AMP_BITS - PG_BITS - 2 ) == 0 1182#if ( SLOT_AMP_BITS - PG_BITS - 2 ) == 0
1183#define wave2_8pi(e) (e) 1183#define wave2_8pi(e) (e)
1184#elif ( SLOT_AMP_BITS - PG_BITS - 2 ) > 0 1184#elif ( SLOT_AMP_BITS - PG_BITS - 2 ) > 0
1185#define wave2_8pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 2 )) 1185#define wave2_8pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 2 ))
1186#else 1186#else
1187#define wave2_8pi(e) ( (e) << ( 2 + PG_BITS - SLOT_AMP_BITS )) 1187#define wave2_8pi(e) ( (e) << ( 2 + PG_BITS - SLOT_AMP_BITS ))
1188#endif 1188#endif
1189 1189
1190/* Update AM, PM unit */ 1190/* Update AM, PM unit */
1191INLINE static void 1191INLINE static void
1192update_ampm (OPLL * opll) 1192update_ampm (OPLL * opll)
1193{ 1193{
1194 opll->pm_phase = (opll->pm_phase + pm_dphase) & (PM_DP_WIDTH - 1); 1194 opll->pm_phase = (opll->pm_phase + pm_dphase) & (PM_DP_WIDTH - 1);
1195 opll->am_phase = (opll->am_phase + am_dphase) & (AM_DP_WIDTH - 1); 1195 opll->am_phase = (opll->am_phase + am_dphase) & (AM_DP_WIDTH - 1);
1196 opll->lfo_am = AMTABLE(HIGHBITS (opll->am_phase, AM_DP_BITS - AM_PG_BITS)); 1196 opll->lfo_am = AMTABLE(HIGHBITS (opll->am_phase, AM_DP_BITS - AM_PG_BITS));
1197 opll->lfo_pm = PMTABLE(HIGHBITS (opll->pm_phase, PM_DP_BITS - PM_PG_BITS)); 1197 opll->lfo_pm = PMTABLE(HIGHBITS (opll->pm_phase, PM_DP_BITS - PM_PG_BITS));
1198} 1198}
1199 1199
1200/* PG */ 1200/* PG */
1201INLINE static void 1201INLINE static void
1202calc_phase (OPLL_SLOT * slot, e_int32 lfo) 1202calc_phase (OPLL_SLOT * slot, e_int32 lfo)
1203{ 1203{
1204 if (slot->patch->PM) 1204 if (slot->patch->PM)
1205 slot->phase += (slot->dphase * lfo) >> PM_AMP_BITS; 1205 slot->phase += (slot->dphase * lfo) >> PM_AMP_BITS;
1206 else 1206 else
1207 slot->phase += slot->dphase; 1207 slot->phase += slot->dphase;
1208 1208
1209 slot->phase &= (DP_WIDTH - 1); 1209 slot->phase &= (DP_WIDTH - 1);
1210 1210
1211 slot->pgout = HIGHBITS (slot->phase, DP_BASE_BITS); 1211 slot->pgout = HIGHBITS (slot->phase, DP_BASE_BITS);
1212} 1212}
1213 1213
1214/* Update Noise unit */ 1214/* Update Noise unit */
1215INLINE static void 1215INLINE static void
1216update_noise (OPLL * opll) 1216update_noise (OPLL * opll)
1217{ 1217{
1218 if(opll->noise_seed&1) opll->noise_seed ^= 0x8003020; 1218 if(opll->noise_seed&1) opll->noise_seed ^= 0x8003020;
1219 opll->noise_seed >>= 1; 1219 opll->noise_seed >>= 1;
1220} 1220}
1221 1221
1222/* EG */ 1222/* EG */
1223INLINE static void 1223INLINE static void
1224calc_envelope (OPLL_SLOT * slot, e_int32 lfo) 1224calc_envelope (OPLL_SLOT * slot, e_int32 lfo)
1225{ 1225{
1226#define S2E(x) (SL2EG((e_int32)(x/SL_STEP))<<(EG_DP_BITS-EG_BITS)) 1226#define S2E(x) (SL2EG((e_int32)(x/SL_STEP))<<(EG_DP_BITS-EG_BITS))
1227 1227
1228 static e_uint32 SL[16] = { 1228 static e_uint32 SL[16] = {
1229 S2E (0.0), S2E (3.0), S2E (6.0), S2E (9.0), S2E (12.0), S2E (15.0), S2E (18.0), S2E (21.0), 1229 S2E (0.0), S2E (3.0), S2E (6.0), S2E (9.0), S2E (12.0), S2E (15.0), S2E (18.0), S2E (21.0),
1230 S2E (24.0), S2E (27.0), S2E (30.0), S2E (33.0), S2E (36.0), S2E (39.0), S2E (42.0), S2E (48.0) 1230 S2E (24.0), S2E (27.0), S2E (30.0), S2E (33.0), S2E (36.0), S2E (39.0), S2E (42.0), S2E (48.0)
1231 }; 1231 };
1232 1232
1233 e_uint32 egout; 1233 e_uint32 egout;
1234 1234
1235 switch (slot->eg_mode) 1235 switch (slot->eg_mode)
1236 { 1236 {
1237 case ATTACK: 1237 case ATTACK:
1238 egout = AR_ADJUST_TABLE(HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)); 1238 egout = AR_ADJUST_TABLE(HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS));
1239 slot->eg_phase += slot->eg_dphase; 1239 slot->eg_phase += slot->eg_dphase;
1240 if((EG_DP_WIDTH & slot->eg_phase)||(slot->patch->AR==15)) 1240 if((EG_DP_WIDTH & slot->eg_phase)||(slot->patch->AR==15))
1241 { 1241 {
1242 egout = 0; 1242 egout = 0;
1243 slot->eg_phase = 0; 1243 slot->eg_phase = 0;
1244 slot->eg_mode = DECAY; 1244 slot->eg_mode = DECAY;
1245 UPDATE_EG (slot); 1245 UPDATE_EG (slot);
1246 } 1246 }
1247 break; 1247 break;
1248 1248
1249 case DECAY: 1249 case DECAY:
1250 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS); 1250 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1251 slot->eg_phase += slot->eg_dphase; 1251 slot->eg_phase += slot->eg_dphase;
1252 if (slot->eg_phase >= SL[slot->patch->SL]) 1252 if (slot->eg_phase >= SL[slot->patch->SL])
1253 { 1253 {
1254 if (slot->patch->EG) 1254 if (slot->patch->EG)
1255 { 1255 {
1256 slot->eg_phase = SL[slot->patch->SL]; 1256 slot->eg_phase = SL[slot->patch->SL];
1257 slot->eg_mode = SUSHOLD; 1257 slot->eg_mode = SUSHOLD;
1258 UPDATE_EG (slot); 1258 UPDATE_EG (slot);
1259 } 1259 }
1260 else 1260 else
1261 { 1261 {
1262 slot->eg_phase = SL[slot->patch->SL]; 1262 slot->eg_phase = SL[slot->patch->SL];
1263 slot->eg_mode = SUSTINE; 1263 slot->eg_mode = SUSTINE;
1264 UPDATE_EG (slot); 1264 UPDATE_EG (slot);
1265 } 1265 }
1266 } 1266 }
1267 break; 1267 break;
1268 1268
1269 case SUSHOLD: 1269 case SUSHOLD:
1270 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS); 1270 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1271 if (slot->patch->EG == 0) 1271 if (slot->patch->EG == 0)
1272 { 1272 {
1273 slot->eg_mode = SUSTINE; 1273 slot->eg_mode = SUSTINE;
1274 UPDATE_EG (slot); 1274 UPDATE_EG (slot);
1275 } 1275 }
1276 break; 1276 break;
1277 1277
1278 case SUSTINE: 1278 case SUSTINE:
1279 case RELEASE: 1279 case RELEASE:
1280 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS); 1280 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1281 slot->eg_phase += slot->eg_dphase; 1281 slot->eg_phase += slot->eg_dphase;
1282 if (egout >= (1 << EG_BITS)) 1282 if (egout >= (1 << EG_BITS))
1283 { 1283 {
1284 slot->eg_mode = FINISH; 1284 slot->eg_mode = FINISH;
1285 egout = (1 << EG_BITS) - 1; 1285 egout = (1 << EG_BITS) - 1;
1286 } 1286 }
1287 break; 1287 break;
1288 1288
1289 case SETTLE: 1289 case SETTLE:
1290 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS); 1290 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1291 slot->eg_phase += slot->eg_dphase; 1291 slot->eg_phase += slot->eg_dphase;
1292 if (egout >= (1 << EG_BITS)) 1292 if (egout >= (1 << EG_BITS))
1293 { 1293 {
1294 slot->eg_mode = ATTACK; 1294 slot->eg_mode = ATTACK;
1295 egout = (1 << EG_BITS) - 1; 1295 egout = (1 << EG_BITS) - 1;
1296 UPDATE_EG(slot); 1296 UPDATE_EG(slot);
1297 } 1297 }
1298 break; 1298 break;
1299 1299
1300 case FINISH: 1300 case FINISH:
1301 egout = (1 << EG_BITS) - 1; 1301 egout = (1 << EG_BITS) - 1;
1302 break; 1302 break;
1303 1303
1304 default: 1304 default:
1305 egout = (1 << EG_BITS) - 1; 1305 egout = (1 << EG_BITS) - 1;
1306 break; 1306 break;
1307 } 1307 }
1308 1308
1309 if (slot->patch->AM) 1309 if (slot->patch->AM)
1310 egout = EG2DB (egout + slot->tll) + lfo; 1310 egout = EG2DB (egout + slot->tll) + lfo;
1311 else 1311 else
1312 egout = EG2DB (egout + slot->tll); 1312 egout = EG2DB (egout + slot->tll);
1313 1313
1314 if (egout >= DB_MUTE) 1314 if (egout >= DB_MUTE)
1315 egout = DB_MUTE - 1; 1315 egout = DB_MUTE - 1;
1316 1316
1317 slot->egout = egout | 3; 1317 slot->egout = egout | 3;
1318} 1318}
1319 1319
1320/* CARRIOR */ 1320/* CARRIOR */
1321INLINE static e_int32 1321INLINE static e_int32
1322calc_slot_car (OPLL_SLOT * slot, e_int32 fm) 1322calc_slot_car (OPLL_SLOT * slot, e_int32 fm)
1323{ 1323{
1324 if (slot->egout >= (DB_MUTE - 1)) 1324 if (slot->egout >= (DB_MUTE - 1))
1325 { 1325 {
1326 slot->output[0] = 0; 1326 slot->output[0] = 0;
1327 } 1327 }
1328 else 1328 else
1329 { 1329 {
1330 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+wave2_8pi(fm))&(PG_WIDTH-1)] + slot->egout]; 1330 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+wave2_8pi(fm))&(PG_WIDTH-1)] + slot->egout];
1331 } 1331 }
1332 1332
1333 slot->output[1] = (slot->output[1] + slot->output[0]) >> 1; 1333 slot->output[1] = (slot->output[1] + slot->output[0]) >> 1;
1334 return slot->output[1]; 1334 return slot->output[1];
1335} 1335}
1336 1336
1337/* MODULATOR */ 1337/* MODULATOR */
1338INLINE static e_int32 1338INLINE static e_int32
1339calc_slot_mod (OPLL_SLOT * slot) 1339calc_slot_mod (OPLL_SLOT * slot)
1340{ 1340{
1341 e_int32 fm; 1341 e_int32 fm;
1342 1342
1343 slot->output[1] = slot->output[0]; 1343 slot->output[1] = slot->output[0];
1344 1344
1345 if (slot->egout >= (DB_MUTE - 1)) 1345 if (slot->egout >= (DB_MUTE - 1))
1346 { 1346 {
1347 slot->output[0] = 0; 1347 slot->output[0] = 0;
1348 } 1348 }
1349 else if (slot->patch->FB != 0) 1349 else if (slot->patch->FB != 0)
1350 { 1350 {
1351 fm = wave2_4pi (slot->feedback) >> (7 - slot->patch->FB); 1351 fm = wave2_4pi (slot->feedback) >> (7 - slot->patch->FB);
1352 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+fm)&(PG_WIDTH-1)] + slot->egout]; 1352 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+fm)&(PG_WIDTH-1)] + slot->egout];
1353 } 1353 }
1354 else 1354 else
1355 { 1355 {
1356 slot->output[0] = DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout]; 1356 slot->output[0] = DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
1357 } 1357 }
1358 1358
1359 slot->feedback = (slot->output[1] + slot->output[0]) >> 1; 1359 slot->feedback = (slot->output[1] + slot->output[0]) >> 1;
1360 1360
1361 return slot->feedback; 1361 return slot->feedback;
1362 1362
1363} 1363}
1364 1364
1365/* TOM */ 1365/* TOM */
1366INLINE static e_int32 1366INLINE static e_int32
1367calc_slot_tom (OPLL_SLOT * slot) 1367calc_slot_tom (OPLL_SLOT * slot)
1368{ 1368{
1369 if (slot->egout >= (DB_MUTE - 1)) 1369 if (slot->egout >= (DB_MUTE - 1))
1370 return 0; 1370 return 0;
1371 1371
1372 return DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout]; 1372 return DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
1373 1373
1374} 1374}
1375 1375
1376/* SNARE */ 1376/* SNARE */
1377INLINE static e_int32 1377INLINE static e_int32
1378calc_slot_snare (OPLL_SLOT * slot, e_uint32 noise) 1378calc_slot_snare (OPLL_SLOT * slot, e_uint32 noise)
1379{ 1379{
1380 if(slot->egout>=(DB_MUTE-1)) 1380 if(slot->egout>=(DB_MUTE-1))
1381 return 0; 1381 return 0;
1382 1382
1383 if(BIT(slot->pgout,7)) 1383 if(BIT(slot->pgout,7))
1384 return DB2LIN_TABLE[(noise?DB_POS(0):DB_POS(15))+slot->egout]; 1384 return DB2LIN_TABLE[(noise?DB_POS(0):DB_POS(15))+slot->egout];
1385 else 1385 else
1386 return DB2LIN_TABLE[(noise?DB_NEG(0):DB_NEG(15))+slot->egout]; 1386 return DB2LIN_TABLE[(noise?DB_NEG(0):DB_NEG(15))+slot->egout];
1387} 1387}
1388 1388
1389/* 1389/*
1390 TOP-CYM 1390 TOP-CYM
1391 */ 1391 */
1392INLINE static e_int32 1392INLINE static e_int32
1393calc_slot_cym (OPLL_SLOT * slot, e_uint32 pgout_hh) 1393calc_slot_cym (OPLL_SLOT * slot, e_uint32 pgout_hh)
1394{ 1394{
1395 e_uint32 dbout; 1395 e_uint32 dbout;
1396 1396
1397 if (slot->egout >= (DB_MUTE - 1)) 1397 if (slot->egout >= (DB_MUTE - 1))
1398 return 0; 1398 return 0;
1399 else if( 1399 else if(
1400 /* the same as fmopl.c */ 1400 /* the same as fmopl.c */
1401 ((BIT(pgout_hh,PG_BITS-8)^BIT(pgout_hh,PG_BITS-1))|BIT(pgout_hh,PG_BITS-7)) ^ 1401 ((BIT(pgout_hh,PG_BITS-8)^BIT(pgout_hh,PG_BITS-1))|BIT(pgout_hh,PG_BITS-7)) ^
1402 /* different from fmopl.c */ 1402 /* different from fmopl.c */
1403 (BIT(slot->pgout,PG_BITS-7)&!BIT(slot->pgout,PG_BITS-5)) 1403 (BIT(slot->pgout,PG_BITS-7)&!BIT(slot->pgout,PG_BITS-5))
1404 ) 1404 )
1405 dbout = DB_NEG(3); 1405 dbout = DB_NEG(3);
1406 else 1406 else
1407 dbout = DB_POS(3); 1407 dbout = DB_POS(3);
1408 1408
1409 return DB2LIN_TABLE[dbout + slot->egout]; 1409 return DB2LIN_TABLE[dbout + slot->egout];
1410} 1410}
1411 1411
1412/* 1412/*
1413 HI-HAT 1413 HI-HAT
1414*/ 1414*/
1415INLINE static e_int32 1415INLINE static e_int32
1416calc_slot_hat (OPLL_SLOT *slot, e_int32 pgout_cym, e_uint32 noise) 1416calc_slot_hat (OPLL_SLOT *slot, e_int32 pgout_cym, e_uint32 noise)
1417{ 1417{
1418 e_uint32 dbout; 1418 e_uint32 dbout;
1419 1419
1420 if (slot->egout >= (DB_MUTE - 1)) 1420 if (slot->egout >= (DB_MUTE - 1))
1421 return 0; 1421 return 0;
1422 else if( 1422 else if(
1423 /* the same as fmopl.c */ 1423 /* the same as fmopl.c */
1424 ((BIT(slot->pgout,PG_BITS-8)^BIT(slot->pgout,PG_BITS-1))|BIT(slot->pgout,PG_BITS-7)) ^ 1424 ((BIT(slot->pgout,PG_BITS-8)^BIT(slot->pgout,PG_BITS-1))|BIT(slot->pgout,PG_BITS-7)) ^
1425 /* different from fmopl.c */ 1425 /* different from fmopl.c */
1426 (BIT(pgout_cym,PG_BITS-7)&!BIT(pgout_cym,PG_BITS-5)) 1426 (BIT(pgout_cym,PG_BITS-7)&!BIT(pgout_cym,PG_BITS-5))
1427 ) 1427 )
1428 { 1428 {
1429 if(noise) 1429 if(noise)
1430 dbout = DB_NEG(12); 1430 dbout = DB_NEG(12);
1431 else 1431 else
1432 dbout = DB_NEG(24); 1432 dbout = DB_NEG(24);
1433 } 1433 }
1434 else 1434 else
1435 { 1435 {
1436 if(noise) 1436 if(noise)
1437 dbout = DB_POS(12); 1437 dbout = DB_POS(12);
1438 else 1438 else
1439 dbout = DB_POS(24); 1439 dbout = DB_POS(24);
1440 } 1440 }
1441 1441
1442 return DB2LIN_TABLE[dbout + slot->egout]; 1442 return DB2LIN_TABLE[dbout + slot->egout];
1443} 1443}
1444 1444
1445static e_int16 1445static e_int16
1446calc (OPLL * opll) EMU2413_CALC_ICODE; 1446calc (OPLL * opll) EMU2413_CALC_ICODE;
1447static e_int16 1447static e_int16
1448calc (OPLL * opll) 1448calc (OPLL * opll)
1449{ 1449{
1450 e_int32 i; 1450 e_int32 i;
1451 1451
1452 update_ampm (opll); 1452 update_ampm (opll);
1453 update_noise (opll); 1453 update_noise (opll);
1454 1454
1455 for (i = 0; i < 18; i++) 1455 for (i = 0; i < 18; i++)
1456 { 1456 {
1457 calc_phase(&opll->slot[i],opll->lfo_pm); 1457 calc_phase(&opll->slot[i],opll->lfo_pm);
1458 calc_envelope(&opll->slot[i],opll->lfo_am); 1458 calc_envelope(&opll->slot[i],opll->lfo_am);
1459 } 1459 }
1460 1460
1461 e_uint32 channel_mask = opll->mask; 1461 e_uint32 channel_mask = opll->mask;
1462 for (i = 0; i < 9; i++) { 1462 for (i = 0; i < 9; i++) {
1463 if (CAR(opll,i)->eg_mode != FINISH) 1463 if (CAR(opll,i)->eg_mode != FINISH)
1464 channel_mask |= (1 << i); 1464 channel_mask |= (1 << i);
1465 } 1465 }
1466 1466
1467 e_int32 mix = 0; 1467 e_int32 mix = 0;
1468 1468
1469 /* CH6 */ 1469 /* CH6 */
1470 if (opll->patch_number[6] & 0x10) { 1470 if (opll->patch_number[6] & 0x10) {
1471 if (channel_mask & OPLL_MASK_CH (6)) { 1471 if (channel_mask & OPLL_MASK_CH (6)) {
1472 mix += calc_slot_car (CAR(opll,6), calc_slot_mod(MOD(opll,6))); 1472 mix += calc_slot_car (CAR(opll,6), calc_slot_mod(MOD(opll,6)));
1473 channel_mask &= ~(1 << 6); 1473 channel_mask &= ~(1 << 6);
1474 } 1474 }
1475 } 1475 }
1476 1476
1477 /* CH7 */ 1477 /* CH7 */
1478 if (opll->patch_number[7] & 0x10) { 1478 if (opll->patch_number[7] & 0x10) {
1479 if (MOD(opll,7)->eg_mode != FINISH) 1479 if (MOD(opll,7)->eg_mode != FINISH)
1480 mix += calc_slot_hat (MOD(opll,7), CAR(opll,8)->pgout, opll->noise_seed&1); 1480 mix += calc_slot_hat (MOD(opll,7), CAR(opll,8)->pgout, opll->noise_seed&1);
1481 if (channel_mask & OPLL_MASK_SD) { 1481 if (channel_mask & OPLL_MASK_SD) {
1482 mix -= calc_slot_snare (CAR(opll,7), opll->noise_seed&1); 1482 mix -= calc_slot_snare (CAR(opll,7), opll->noise_seed&1);
1483 channel_mask &= ~OPLL_MASK_SD; 1483 channel_mask &= ~OPLL_MASK_SD;
1484 } 1484 }
1485 } 1485 }
1486 1486
1487 /* CH8 */ 1487 /* CH8 */
1488 if (opll->patch_number[8] & 0x10) { 1488 if (opll->patch_number[8] & 0x10) {
1489 if (MOD(opll,8)->eg_mode != FINISH) 1489 if (MOD(opll,8)->eg_mode != FINISH)
1490 mix += calc_slot_tom (MOD(opll,8)); 1490 mix += calc_slot_tom (MOD(opll,8));
1491 if (channel_mask & OPLL_MASK_CYM) { 1491 if (channel_mask & OPLL_MASK_CYM) {
1492 mix -= calc_slot_cym (CAR(opll,8), MOD(opll,7)->pgout); 1492 mix -= calc_slot_cym (CAR(opll,8), MOD(opll,7)->pgout);
1493 channel_mask &= ~OPLL_MASK_CYM; 1493 channel_mask &= ~OPLL_MASK_CYM;
1494 } 1494 }
1495 } 1495 }
1496 1496
1497 mix <<= 1; 1497 mix <<= 1;
1498 1498
1499 opll->current_mask = channel_mask; 1499 opll->current_mask = channel_mask;
1500 for (i = 0; channel_mask; channel_mask >>= 1, ++i) { 1500 for (i = 0; channel_mask; channel_mask >>= 1, ++i) {
1501 if (channel_mask & 1) { 1501 if (channel_mask & 1) {
1502 mix += calc_slot_car (CAR(opll,i), calc_slot_mod(MOD(opll,i))); 1502 mix += calc_slot_car (CAR(opll,i), calc_slot_mod(MOD(opll,i)));
1503 } 1503 }
1504 } 1504 }
1505 1505
1506 return (e_int16) mix << 3; 1506 return (e_int16) mix << 3;
1507} 1507}
1508 1508
1509void 1509void
1510OPLL_set_internal_mute(OPLL * opll, e_uint32 mute) 1510OPLL_set_internal_mute(OPLL * opll, e_uint32 mute)
1511{ 1511{
1512 opll->internal_mute = mute; 1512 opll->internal_mute = mute;
1513} 1513}
1514 1514
1515e_uint32 1515e_uint32
1516OPLL_is_internal_muted(OPLL * opll) 1516OPLL_is_internal_muted(OPLL * opll)
1517{ 1517{
1518 return opll->internal_mute; 1518 return opll->internal_mute;
1519} 1519}
1520 1520
1521static e_uint32 1521static e_uint32
1522check_mute_helper(OPLL * opll) 1522check_mute_helper(OPLL * opll)
1523{ 1523{
1524 for (int i = 0; i < 6; i++) { 1524 for (int i = 0; i < 6; i++) {
1525 /* if (ch[i].car.eg_mode != FINISH) return 0; */ 1525 /* if (ch[i].car.eg_mode != FINISH) return 0; */
1526 if (!(opll->current_mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH)) return 0; 1526 if (!(opll->current_mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH)) return 0;
1527 } 1527 }
1528 1528
1529 if (!(opll->reg[0x0e] & 0x20)) { 1529 if (!(opll->reg[0x0e] & 0x20)) {
1530 for(int i = 6; i < 9; i++) { 1530 for(int i = 6; i < 9; i++) {
1531 /* if (ch[i].car.eg_mode != FINISH) return 0; */ 1531 /* if (ch[i].car.eg_mode != FINISH) return 0; */
1532 if (!(opll->current_mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH)) return 0; 1532 if (!(opll->current_mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH)) return 0;
1533 } 1533 }
1534 } else { 1534 } else {
1535 /* if (ch[6].car.eg_mode != FINISH) return false; 1535 /* if (ch[6].car.eg_mode != FINISH) return false;
1536 if (ch[7].mod.eg_mode != FINISH) return false; 1536 if (ch[7].mod.eg_mode != FINISH) return false;
1537 if (ch[7].car.eg_mode != FINISH) return false; 1537 if (ch[7].car.eg_mode != FINISH) return false;
1538 if (ch[8].mod.eg_mode != FINISH) return false; 1538 if (ch[8].mod.eg_mode != FINISH) return false;
1539 if (ch[8].car.eg_mode != FINISH) return false; */ 1539 if (ch[8].car.eg_mode != FINISH) return false; */
1540 if (!(opll->current_mask & OPLL_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH)) return 0; 1540 if (!(opll->current_mask & OPLL_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH)) return 0;
1541 if (!(opll->current_mask & OPLL_MASK_CH (7)) && (MOD(opll,7)->eg_mode != FINISH)) return 0; 1541 if (!(opll->current_mask & OPLL_MASK_CH (7)) && (MOD(opll,7)->eg_mode != FINISH)) return 0;
1542 if (!(opll->current_mask & OPLL_MASK_CH (7)) && (CAR(opll,7)->eg_mode != FINISH)) return 0; 1542 if (!(opll->current_mask & OPLL_MASK_CH (7)) && (CAR(opll,7)->eg_mode != FINISH)) return 0;
1543 if (!(opll->current_mask & OPLL_MASK_CH (8)) && (MOD(opll,8)->eg_mode != FINISH)) return 0; 1543 if (!(opll->current_mask & OPLL_MASK_CH (8)) && (MOD(opll,8)->eg_mode != FINISH)) return 0;
1544 if (!(opll->current_mask & OPLL_MASK_CH (8)) && (CAR(opll,8)->eg_mode != FINISH)) return 0; 1544 if (!(opll->current_mask & OPLL_MASK_CH (8)) && (CAR(opll,8)->eg_mode != FINISH)) return 0;
1545 } 1545 }
1546 1546
1547 return 1; /* nothing is playing, then mute */ 1547 return 1; /* nothing is playing, then mute */
1548} 1548}
1549 1549
1550static void 1550static void
1551check_mute(OPLL * opll) 1551check_mute(OPLL * opll)
1552{ 1552{
1553 OPLL_set_internal_mute (opll, check_mute_helper (opll)); 1553 OPLL_set_internal_mute (opll, check_mute_helper (opll));
1554} 1554}
1555 1555
1556EMU2413_API e_int16 *OPLL_update_buffer(OPLL * opll, e_uint32 length) 1556EMU2413_API e_int16 *OPLL_update_buffer(OPLL * opll, e_uint32 length)
1557{ 1557{
1558 e_int16* buf = opll->buffer; 1558 e_int16* buf = opll->buffer;
1559 while (length--) { 1559 while (length--) {
1560 *(buf++) = calc (opll); 1560 *(buf++) = calc (opll);
1561 } 1561 }
1562 check_mute (opll); 1562 check_mute (opll);
1563 1563
1564 return opll->buffer; 1564 return opll->buffer;
1565} 1565}
1566 1566
1567#ifdef EMU2413_COMPACTION 1567#ifdef EMU2413_COMPACTION
1568e_int16 1568e_int16
1569OPLL_calc (OPLL * opll) 1569OPLL_calc (OPLL * opll)
1570{ 1570{
1571 return calc (opll); 1571 return calc (opll);
1572} 1572}
1573#else 1573#else
1574e_int16 1574e_int16
1575OPLL_calc (OPLL * opll) 1575OPLL_calc (OPLL * opll)
1576{ 1576{
1577 if (!opll->quality) 1577 if (!opll->quality)
1578 return calc (opll); 1578 return calc (opll);
1579 1579
1580 while (opll->realstep > opll->oplltime) 1580 while (opll->realstep > opll->oplltime)
1581 { 1581 {
1582 opll->oplltime += opll->opllstep; 1582 opll->oplltime += opll->opllstep;
1583 opll->prev = opll->next; 1583 opll->prev = opll->next;
1584 opll->next = calc (opll); 1584 opll->next = calc (opll);
1585 } 1585 }
1586 1586
1587 opll->oplltime -= opll->realstep; 1587 opll->oplltime -= opll->realstep;
1588 opll->out = (e_int16) (((double) opll->next * (opll->opllstep - opll->oplltime) 1588 opll->out = (e_int16) (((double) opll->next * (opll->opllstep - opll->oplltime)
1589 + (double) opll->prev * opll->oplltime) / opll->opllstep); 1589 + (double) opll->prev * opll->oplltime) / opll->opllstep);
1590 1590
1591 return (e_int16) opll->out; 1591 return (e_int16) opll->out;
1592} 1592}
1593#endif 1593#endif
1594 1594
1595e_uint32 1595e_uint32
1596OPLL_setMask (OPLL * opll, e_uint32 mask) 1596OPLL_setMask (OPLL * opll, e_uint32 mask)
1597{ 1597{
1598 e_uint32 ret; 1598 e_uint32 ret;
1599 1599
1600 if (opll) 1600 if (opll)
1601 { 1601 {
1602 ret = opll->mask; 1602 ret = opll->mask;
1603 opll->mask = mask; 1603 opll->mask = mask;
1604 return ret; 1604 return ret;
1605 } 1605 }
1606 else 1606 else
1607 return 0; 1607 return 0;
1608} 1608}
1609 1609
1610e_uint32 1610e_uint32
1611OPLL_toggleMask (OPLL * opll, e_uint32 mask) 1611OPLL_toggleMask (OPLL * opll, e_uint32 mask)
1612{ 1612{
1613 e_uint32 ret; 1613 e_uint32 ret;
1614 1614
1615 if (opll) 1615 if (opll)
1616 { 1616 {
1617 ret = opll->mask; 1617 ret = opll->mask;
1618 opll->mask ^= mask; 1618 opll->mask ^= mask;
1619 return ret; 1619 return ret;
1620 } 1620 }
1621 else 1621 else
1622 return 0; 1622 return 0;
1623} 1623}
1624 1624
1625/**************************************************** 1625/****************************************************
1626 1626
1627 I/O Ctrl 1627 I/O Ctrl
1628 1628
1629*****************************************************/ 1629*****************************************************/
1630 1630
1631void 1631void
1632OPLL_writeReg (OPLL * opll, e_uint32 reg, e_uint32 data) 1632OPLL_writeReg (OPLL * opll, e_uint32 reg, e_uint32 data)
1633{ 1633{
1634 e_int32 i, v, ch; 1634 e_int32 i, v, ch;
1635 1635
1636 data = data & 0xff; 1636 data = data & 0xff;
1637 reg = reg & 0x3f; 1637 reg = reg & 0x3f;
1638 opll->reg[reg] = (e_uint8) data; 1638 opll->reg[reg] = (e_uint8) data;
1639 1639
1640 switch (reg) 1640 switch (reg)
1641 { 1641 {
1642 case 0x00: 1642 case 0x00:
1643 opll->patch[0].AM = (data >> 7) & 1; 1643 opll->patch[0].AM = (data >> 7) & 1;
1644 opll->patch[0].PM = (data >> 6) & 1; 1644 opll->patch[0].PM = (data >> 6) & 1;
1645 opll->patch[0].EG = (data >> 5) & 1; 1645 opll->patch[0].EG = (data >> 5) & 1;
1646 opll->patch[0].KR = (data >> 4) & 1; 1646 opll->patch[0].KR = (data >> 4) & 1;
1647 opll->patch[0].ML = (data) & 15; 1647 opll->patch[0].ML = (data) & 15;
1648 for (i = 0; i < 9; i++) 1648 for (i = 0; i < 9; i++)
1649 { 1649 {
1650 if (opll->patch_number[i] == 0) 1650 if (opll->patch_number[i] == 0)
1651 { 1651 {
1652 UPDATE_PG (MOD(opll,i)); 1652 UPDATE_PG (MOD(opll,i));
1653 UPDATE_RKS (MOD(opll,i)); 1653 UPDATE_RKS (MOD(opll,i));
1654 UPDATE_EG (MOD(opll,i)); 1654 UPDATE_EG (MOD(opll,i));
1655 } 1655 }
1656 } 1656 }
1657 break; 1657 break;
1658 1658
1659 case 0x01: 1659 case 0x01:
1660 opll->patch[1].AM = (data >> 7) & 1; 1660 opll->patch[1].AM = (data >> 7) & 1;
1661 opll->patch[1].PM = (data >> 6) & 1; 1661 opll->patch[1].PM = (data >> 6) & 1;
1662 opll->patch[1].EG = (data >> 5) & 1; 1662 opll->patch[1].EG = (data >> 5) & 1;
1663 opll->patch[1].KR = (data >> 4) & 1; 1663 opll->patch[1].KR = (data >> 4) & 1;
1664 opll->patch[1].ML = (data) & 15; 1664 opll->patch[1].ML = (data) & 15;
1665 for (i = 0; i < 9; i++) 1665 for (i = 0; i < 9; i++)
1666 { 1666 {
1667 if (opll->patch_number[i] == 0) 1667 if (opll->patch_number[i] == 0)
1668 { 1668 {
1669 UPDATE_PG (CAR(opll,i)); 1669 UPDATE_PG (CAR(opll,i));
1670 UPDATE_RKS (CAR(opll,i)); 1670 UPDATE_RKS (CAR(opll,i));
1671 UPDATE_EG (CAR(opll,i)); 1671 UPDATE_EG (CAR(opll,i));
1672 } 1672 }
1673 } 1673 }
1674 break; 1674 break;
1675 1675
1676 case 0x02: 1676 case 0x02:
1677 opll->patch[0].KL = (data >> 6) & 3; 1677 opll->patch[0].KL = (data >> 6) & 3;
1678 opll->patch[0].TL = (data) & 63; 1678 opll->patch[0].TL = (data) & 63;
1679 for (i = 0; i < 9; i++) 1679 for (i = 0; i < 9; i++)
1680 { 1680 {
1681 if (opll->patch_number[i] == 0) 1681 if (opll->patch_number[i] == 0)
1682 { 1682 {
1683 UPDATE_TLL(MOD(opll,i)); 1683 UPDATE_TLL(MOD(opll,i));
1684 } 1684 }
1685 } 1685 }
1686 break; 1686 break;
1687 1687
1688 case 0x03: 1688 case 0x03:
1689 opll->patch[1].KL = (data >> 6) & 3; 1689 opll->patch[1].KL = (data >> 6) & 3;
1690 opll->patch[1].WF = (data >> 4) & 1; 1690 opll->patch[1].WF = (data >> 4) & 1;
1691 opll->patch[0].WF = (data >> 3) & 1; 1691 opll->patch[0].WF = (data >> 3) & 1;
1692 opll->patch[0].FB = (data) & 7; 1692 opll->patch[0].FB = (data) & 7;
1693 for (i = 0; i < 9; i++) 1693 for (i = 0; i < 9; i++)
1694 { 1694 {
1695 if (opll->patch_number[i] == 0) 1695 if (opll->patch_number[i] == 0)
1696 { 1696 {
1697 UPDATE_WF(MOD(opll,i)); 1697 UPDATE_WF(MOD(opll,i));
1698 UPDATE_WF(CAR(opll,i)); 1698 UPDATE_WF(CAR(opll,i));
1699 } 1699 }
1700 } 1700 }
1701 break; 1701 break;
1702 1702
1703 case 0x04: 1703 case 0x04:
1704 opll->patch[0].AR = (data >> 4) & 15; 1704 opll->patch[0].AR = (data >> 4) & 15;
1705 opll->patch[0].DR = (data) & 15; 1705 opll->patch[0].DR = (data) & 15;
1706 for (i = 0; i < 9; i++) 1706 for (i = 0; i < 9; i++)
1707 { 1707 {
1708 if (opll->patch_number[i] == 0) 1708 if (opll->patch_number[i] == 0)
1709 { 1709 {
1710 UPDATE_EG (MOD(opll,i)); 1710 UPDATE_EG (MOD(opll,i));
1711 } 1711 }
1712 } 1712 }
1713 break; 1713 break;
1714 1714
1715 case 0x05: 1715 case 0x05:
1716 opll->patch[1].AR = (data >> 4) & 15; 1716 opll->patch[1].AR = (data >> 4) & 15;
1717 opll->patch[1].DR = (data) & 15; 1717 opll->patch[1].DR = (data) & 15;
1718 for (i = 0; i < 9; i++) 1718 for (i = 0; i < 9; i++)
1719 { 1719 {
1720 if (opll->patch_number[i] == 0) 1720 if (opll->patch_number[i] == 0)
1721 { 1721 {
1722 UPDATE_EG(CAR(opll,i)); 1722 UPDATE_EG(CAR(opll,i));
1723 } 1723 }
1724 } 1724 }
1725 break; 1725 break;
1726 1726
1727 case 0x06: 1727 case 0x06:
1728 opll->patch[0].SL = (data >> 4) & 15; 1728 opll->patch[0].SL = (data >> 4) & 15;
1729 opll->patch[0].RR = (data) & 15; 1729 opll->patch[0].RR = (data) & 15;
1730 for (i = 0; i < 9; i++) 1730 for (i = 0; i < 9; i++)
1731 { 1731 {
1732 if (opll->patch_number[i] == 0) 1732 if (opll->patch_number[i] == 0)
1733 { 1733 {
1734 UPDATE_EG (MOD(opll,i)); 1734 UPDATE_EG (MOD(opll,i));
1735 } 1735 }
1736 } 1736 }
1737 break; 1737 break;
1738 1738
1739 case 0x07: 1739 case 0x07:
1740 opll->patch[1].SL = (data >> 4) & 15; 1740 opll->patch[1].SL = (data >> 4) & 15;
1741 opll->patch[1].RR = (data) & 15; 1741 opll->patch[1].RR = (data) & 15;
1742 for (i = 0; i < 9; i++) 1742 for (i = 0; i < 9; i++)
1743 { 1743 {
1744 if (opll->patch_number[i] == 0) 1744 if (opll->patch_number[i] == 0)
1745 { 1745 {
1746 UPDATE_EG (CAR(opll,i)); 1746 UPDATE_EG (CAR(opll,i));
1747 } 1747 }
1748 } 1748 }
1749 break; 1749 break;
1750 1750
1751 case 0x0e: 1751 case 0x0e:
1752 update_rhythm_mode (opll); 1752 update_rhythm_mode (opll);
1753 if (data & 32) 1753 if (data & 32)
1754 { 1754 {
1755 if (data & 0x10) 1755 if (data & 0x10)
1756 keyOn_BD (opll); 1756 keyOn_BD (opll);
1757 else 1757 else
1758 keyOff_BD (opll); 1758 keyOff_BD (opll);
1759 if (data & 0x8) 1759 if (data & 0x8)
1760 keyOn_SD (opll); 1760 keyOn_SD (opll);
1761 else 1761 else
1762 keyOff_SD (opll); 1762 keyOff_SD (opll);
1763 if (data & 0x4) 1763 if (data & 0x4)
1764 keyOn_TOM (opll); 1764 keyOn_TOM (opll);
1765 else 1765 else
1766 keyOff_TOM (opll); 1766 keyOff_TOM (opll);
1767 if (data & 0x2) 1767 if (data & 0x2)
1768 keyOn_CYM (opll); 1768 keyOn_CYM (opll);
1769 else 1769 else
1770 keyOff_CYM (opll); 1770 keyOff_CYM (opll);
1771 if (data & 0x1) 1771 if (data & 0x1)
1772 keyOn_HH (opll); 1772 keyOn_HH (opll);
1773 else 1773 else
1774 keyOff_HH (opll); 1774 keyOff_HH (opll);
1775 } 1775 }
1776 update_key_status (opll); 1776 update_key_status (opll);
1777 1777
1778 UPDATE_ALL (MOD(opll,6)); 1778 UPDATE_ALL (MOD(opll,6));
1779 UPDATE_ALL (CAR(opll,6)); 1779 UPDATE_ALL (CAR(opll,6));
1780 UPDATE_ALL (MOD(opll,7)); 1780 UPDATE_ALL (MOD(opll,7));
1781 UPDATE_ALL (CAR(opll,7)); 1781 UPDATE_ALL (CAR(opll,7));
1782 UPDATE_ALL (MOD(opll,8)); 1782 UPDATE_ALL (MOD(opll,8));
1783 UPDATE_ALL (CAR(opll,8)); 1783 UPDATE_ALL (CAR(opll,8));
1784 1784
1785 break; 1785 break;
1786 1786
1787 case 0x0f: 1787 case 0x0f:
1788 break; 1788 break;
1789 1789
1790 case 0x10: 1790 case 0x10:
1791 case 0x11: 1791 case 0x11:
1792 case 0x12: 1792 case 0x12:
1793 case 0x13: 1793 case 0x13:
1794 case 0x14: 1794 case 0x14:
1795 case 0x15: 1795 case 0x15:
1796 case 0x16: 1796 case 0x16:
1797 case 0x17: 1797 case 0x17:
1798 case 0x18: 1798 case 0x18:
1799 ch = reg - 0x10; 1799 ch = reg - 0x10;
1800 setFnumber (opll, ch, data + ((opll->reg[0x20 + ch] & 1) << 8)); 1800 setFnumber (opll, ch, data + ((opll->reg[0x20 + ch] & 1) << 8));
1801 UPDATE_ALL (MOD(opll,ch)); 1801 UPDATE_ALL (MOD(opll,ch));
1802 UPDATE_ALL (CAR(opll,ch)); 1802 UPDATE_ALL (CAR(opll,ch));
1803 break; 1803 break;
1804 1804
1805 case 0x20: 1805 case 0x20:
1806 case 0x21: 1806 case 0x21:
1807 case 0x22: 1807 case 0x22:
1808 case 0x23: 1808 case 0x23:
1809 case 0x24: 1809 case 0x24:
1810 case 0x25: 1810 case 0x25:
1811 case 0x26: 1811 case 0x26:
1812 case 0x27: 1812 case 0x27:
1813 case 0x28: 1813 case 0x28:
1814 ch = reg - 0x20; 1814 ch = reg - 0x20;
1815 setFnumber (opll, ch, ((data & 1) << 8) + opll->reg[0x10 + ch]); 1815 setFnumber (opll, ch, ((data & 1) << 8) + opll->reg[0x10 + ch]);
1816 setBlock (opll, ch, (data >> 1) & 7); 1816 setBlock (opll, ch, (data >> 1) & 7);
1817 setSustine (opll, ch, (data >> 5) & 1); 1817 setSustine (opll, ch, (data >> 5) & 1);
1818 if (data & 0x10) 1818 if (data & 0x10)
1819 keyOn (opll, ch); 1819 keyOn (opll, ch);
1820 else 1820 else
1821 keyOff (opll, ch); 1821 keyOff (opll, ch);
1822 UPDATE_ALL (MOD(opll,ch)); 1822 UPDATE_ALL (MOD(opll,ch));
1823 UPDATE_ALL (CAR(opll,ch)); 1823 UPDATE_ALL (CAR(opll,ch));
1824 update_key_status (opll); 1824 update_key_status (opll);
1825 update_rhythm_mode (opll); 1825 update_rhythm_mode (opll);
1826 break; 1826 break;
1827 1827
1828 case 0x30: 1828 case 0x30:
1829 case 0x31: 1829 case 0x31:
1830 case 0x32: 1830 case 0x32:
1831 case 0x33: 1831 case 0x33:
1832 case 0x34: 1832 case 0x34:
1833 case 0x35: 1833 case 0x35:
1834 case 0x36: 1834 case 0x36:
1835 case 0x37: 1835 case 0x37:
1836 case 0x38: 1836 case 0x38:
1837 i = (data >> 4) & 15; 1837 i = (data >> 4) & 15;
1838 v = data & 15; 1838 v = data & 15;
1839 if ((opll->reg[0x0e] & 32) && (reg >= 0x36)) 1839 if ((opll->reg[0x0e] & 32) && (reg >= 0x36))
1840 { 1840 {
1841 switch (reg) 1841 switch (reg)
1842 { 1842 {
1843 case 0x37: 1843 case 0x37:
1844 setSlotVolume (MOD(opll,7), i << 2); 1844 setSlotVolume (MOD(opll,7), i << 2);
1845 break; 1845 break;
1846 case 0x38: 1846 case 0x38:
1847 setSlotVolume (MOD(opll,8), i << 2); 1847 setSlotVolume (MOD(opll,8), i << 2);
1848 break; 1848 break;
1849 default: 1849 default:
1850 break; 1850 break;
1851 } 1851 }
1852 } 1852 }
1853 else 1853 else
1854 { 1854 {
1855 setPatch (opll, reg - 0x30, i); 1855 setPatch (opll, reg - 0x30, i);
1856 } 1856 }
1857 setVolume (opll, reg - 0x30, v << 2); 1857 setVolume (opll, reg - 0x30, v << 2);
1858 UPDATE_ALL (MOD(opll,reg - 0x30)); 1858 UPDATE_ALL (MOD(opll,reg - 0x30));
1859 UPDATE_ALL (CAR(opll,reg - 0x30)); 1859 UPDATE_ALL (CAR(opll,reg - 0x30));
1860 break; 1860 break;
1861 1861
1862 default: 1862 default:
1863 break; 1863 break;
1864 1864
1865 } 1865 }
1866} 1866}
1867 1867
1868void 1868void
1869OPLL_writeIO (OPLL * opll, e_uint32 adr, e_uint32 val) 1869OPLL_writeIO (OPLL * opll, e_uint32 adr, e_uint32 val)
1870{ 1870{
1871 if (adr & 1) 1871 if (adr & 1)
1872 OPLL_writeReg (opll, opll->adr, val); 1872 OPLL_writeReg (opll, opll->adr, val);
1873 else 1873 else
1874 opll->adr = val; 1874 opll->adr = val;
1875} 1875}
1876 1876
1877e_uint32 1877e_uint32
1878OPLL_read(OPLL * opll, e_uint32 a) 1878OPLL_read(OPLL * opll, e_uint32 a)
1879{ 1879{
1880 if( !(a&1) ) 1880 if( !(a&1) )
1881 { 1881 {
1882 /* status port */ 1882 /* status port */
1883 return opll->status; 1883 return opll->status;
1884 } 1884 }
1885 return 0xff; 1885 return 0xff;
1886} 1886}
1887 1887
1888#ifndef EMU2413_COMPACTION 1888#ifndef EMU2413_COMPACTION
1889/* STEREO MODE (OPT) */ 1889/* STEREO MODE (OPT) */
1890void 1890void
1891OPLL_set_pan (OPLL * opll, e_uint32 ch, e_uint32 pan) 1891OPLL_set_pan (OPLL * opll, e_uint32 ch, e_uint32 pan)
1892{ 1892{
1893 opll->pan[ch & 15] = pan & 3; 1893 opll->pan[ch & 15] = pan & 3;
1894} 1894}
1895 1895
1896static void 1896static void
1897calc_stereo (OPLL * opll, e_int32 out[2]) 1897calc_stereo (OPLL * opll, e_int32 out[2])
1898{ 1898{
1899 e_int32 b[4] = { 0, 0, 0, 0 }; /* Ignore, Right, Left, Center */ 1899 e_int32 b[4] = { 0, 0, 0, 0 }; /* Ignore, Right, Left, Center */
1900 e_int32 r[4] = { 0, 0, 0, 0 }; /* Ignore, Right, Left, Center */ 1900 e_int32 r[4] = { 0, 0, 0, 0 }; /* Ignore, Right, Left, Center */
1901 e_int32 i; 1901 e_int32 i;
1902 1902
1903 update_ampm (opll); 1903 update_ampm (opll);
1904 update_noise (opll); 1904 update_noise (opll);
1905 1905
1906 for(i=0;i<18;i++) 1906 for(i=0;i<18;i++)
1907 { 1907 {
1908 calc_phase(&opll->slot[i],opll->lfo_pm); 1908 calc_phase(&opll->slot[i],opll->lfo_pm);
1909 calc_envelope(&opll->slot[i],opll->lfo_am); 1909 calc_envelope(&opll->slot[i],opll->lfo_am);
1910 } 1910 }
1911 1911
1912 for (i = 0; i < 6; i++) 1912 for (i = 0; i < 6; i++)
1913 if (!(opll->mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH)) 1913 if (!(opll->mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH))
1914 b[opll->pan[i]] += calc_slot_car (CAR(opll,i), calc_slot_mod (MOD(opll,i))); 1914 b[opll->pan[i]] += calc_slot_car (CAR(opll,i), calc_slot_mod (MOD(opll,i)));
1915 1915
1916 1916
1917 if (opll->patch_number[6] <= 15) 1917 if (opll->patch_number[6] <= 15)
1918 { 1918 {
1919 if (!(opll->mask & OPLL_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH)) 1919 if (!(opll->mask & OPLL_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH))
1920 b[opll->pan[6]] += calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6))); 1920 b[opll->pan[6]] += calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6)));
1921 } 1921 }
1922 else 1922 else
1923 { 1923 {
1924 if (!(opll->mask & OPLL_MASK_BD) && (CAR(opll,6)->eg_mode != FINISH)) 1924 if (!(opll->mask & OPLL_MASK_BD) && (CAR(opll,6)->eg_mode != FINISH))
1925 r[opll->pan[9]] += calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6))); 1925 r[opll->pan[9]] += calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6)));
1926 } 1926 }
1927 1927
1928 if (opll->patch_number[7] <= 15) 1928 if (opll->patch_number[7] <= 15)
1929 { 1929 {
1930 if (!(opll->mask & OPLL_MASK_CH (7)) && (CAR (opll,7)->eg_mode != FINISH)) 1930 if (!(opll->mask & OPLL_MASK_CH (7)) && (CAR (opll,7)->eg_mode != FINISH))
1931 b[opll->pan[7]] += calc_slot_car (CAR (opll,7), calc_slot_mod (MOD (opll,7))); 1931 b[opll->pan[7]] += calc_slot_car (CAR (opll,7), calc_slot_mod (MOD (opll,7)));
1932 } 1932 }
1933 else 1933 else
1934 { 1934 {
1935 if (!(opll->mask & OPLL_MASK_HH) && (MOD (opll,7)->eg_mode != FINISH)) 1935 if (!(opll->mask & OPLL_MASK_HH) && (MOD (opll,7)->eg_mode != FINISH))
1936 r[opll->pan[10]] += calc_slot_hat (MOD (opll,7), CAR(opll,8)->pgout, opll->noise_seed&1); 1936 r[opll->pan[10]] += calc_slot_hat (MOD (opll,7), CAR(opll,8)->pgout, opll->noise_seed&1);
1937 if (!(opll->mask & OPLL_MASK_SD) && (CAR (opll,7)->eg_mode != FINISH)) 1937 if (!(opll->mask & OPLL_MASK_SD) && (CAR (opll,7)->eg_mode != FINISH))
1938 r[opll->pan[11]] -= calc_slot_snare (CAR (opll,7), opll->noise_seed&1); 1938 r[opll->pan[11]] -= calc_slot_snare (CAR (opll,7), opll->noise_seed&1);
1939 } 1939 }
1940 1940
1941 if (opll->patch_number[8] <= 15) 1941 if (opll->patch_number[8] <= 15)
1942 { 1942 {
1943 if (!(opll->mask & OPLL_MASK_CH (8)) && (CAR (opll,8)->eg_mode != FINISH)) 1943 if (!(opll->mask & OPLL_MASK_CH (8)) && (CAR (opll,8)->eg_mode != FINISH))
1944 b[opll->pan[8]] += calc_slot_car (CAR (opll,8), calc_slot_mod (MOD (opll,8))); 1944 b[opll->pan[8]] += calc_slot_car (CAR (opll,8), calc_slot_mod (MOD (opll,8)));
1945 } 1945 }
1946 else 1946 else
1947 { 1947 {
1948 if (!(opll->mask & OPLL_MASK_TOM) && (MOD (opll,8)->eg_mode != FINISH)) 1948 if (!(opll->mask & OPLL_MASK_TOM) && (MOD (opll,8)->eg_mode != FINISH))
1949 r[opll->pan[12]] += calc_slot_tom (MOD (opll,8)); 1949 r[opll->pan[12]] += calc_slot_tom (MOD (opll,8));
1950 if (!(opll->mask & OPLL_MASK_CYM) && (CAR (opll,8)->eg_mode != FINISH)) 1950 if (!(opll->mask & OPLL_MASK_CYM) && (CAR (opll,8)->eg_mode != FINISH))
1951 r[opll->pan[13]] -= calc_slot_cym (CAR (opll,8), MOD(opll,7)->pgout); 1951 r[opll->pan[13]] -= calc_slot_cym (CAR (opll,8), MOD(opll,7)->pgout);
1952 } 1952 }
1953 1953
1954 out[1] = (b[1] + b[3] + ((r[1] + r[3]) << 1)) <<3; 1954 out[1] = (b[1] + b[3] + ((r[1] + r[3]) << 1)) <<3;
1955 out[0] = (b[2] + b[3] + ((r[2] + r[3]) << 1)) <<3; 1955 out[0] = (b[2] + b[3] + ((r[2] + r[3]) << 1)) <<3;
1956} 1956}
1957 1957
1958void 1958void
1959OPLL_calc_stereo (OPLL * opll, e_int32 out[2]) 1959OPLL_calc_stereo (OPLL * opll, e_int32 out[2])
1960{ 1960{
1961 if (!opll->quality) 1961 if (!opll->quality)
1962 { 1962 {
1963 calc_stereo (opll, out); 1963 calc_stereo (opll, out);
1964 return; 1964 return;
1965 } 1965 }
1966 1966
1967 while (opll->realstep > opll->oplltime) 1967 while (opll->realstep > opll->oplltime)
1968 { 1968 {
1969 opll->oplltime += opll->opllstep; 1969 opll->oplltime += opll->opllstep;
1970 opll->sprev[0] = opll->snext[0]; 1970 opll->sprev[0] = opll->snext[0];
1971 opll->sprev[1] = opll->snext[1]; 1971 opll->sprev[1] = opll->snext[1];
1972 calc_stereo (opll, opll->snext); 1972 calc_stereo (opll, opll->snext);
1973 } 1973 }
1974 1974
1975 opll->oplltime -= opll->realstep; 1975 opll->oplltime -= opll->realstep;
1976 out[0] = (e_int16) (((double) opll->snext[0] * (opll->opllstep - opll->oplltime) 1976 out[0] = (e_int16) (((double) opll->snext[0] * (opll->opllstep - opll->oplltime)
1977 + (double) opll->sprev[0] * opll->oplltime) / opll->opllstep); 1977 + (double) opll->sprev[0] * opll->oplltime) / opll->opllstep);
1978 out[1] = (e_int16) (((double) opll->snext[1] * (opll->opllstep - opll->oplltime) 1978 out[1] = (e_int16) (((double) opll->snext[1] * (opll->opllstep - opll->oplltime)
1979 + (double) opll->sprev[1] * opll->oplltime) / opll->opllstep); 1979 + (double) opll->sprev[1] * opll->oplltime) / opll->opllstep);
1980} 1980}
1981#endif /* EMU2413_COMPACTION */ 1981#endif /* EMU2413_COMPACTION */
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-05 15:10:57 +0000