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-rw-r--r--apps/codecs/libasap/acpu.c2270
1 files changed, 1135 insertions, 1135 deletions
diff --git a/apps/codecs/libasap/acpu.c b/apps/codecs/libasap/acpu.c
index 7c3c8f6f28..c5bff47a5d 100644
--- a/apps/codecs/libasap/acpu.c
+++ b/apps/codecs/libasap/acpu.c
@@ -52,105 +52,105 @@
52#include "asap_internal.h" 52#include "asap_internal.h"
53 53
54CONST_ARRAY(int, opcode_cycles) 54CONST_ARRAY(int, opcode_cycles)
55/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ 55/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
56 7, 6, 2, 8, 3, 3, 5, 5, 3, 2, 2, 2, 4, 4, 6, 6, /* 0x */ 56 7, 6, 2, 8, 3, 3, 5, 5, 3, 2, 2, 2, 4, 4, 6, 6, /* 0x */
57 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, /* 1x */ 57 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, /* 1x */
58 6, 6, 2, 8, 3, 3, 5, 5, 4, 2, 2, 2, 4, 4, 6, 6, /* 2x */ 58 6, 6, 2, 8, 3, 3, 5, 5, 4, 2, 2, 2, 4, 4, 6, 6, /* 2x */
59 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, /* 3x */ 59 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, /* 3x */
60 6, 6, 2, 8, 3, 3, 5, 5, 3, 2, 2, 2, 3, 4, 6, 6, /* 4x */ 60 6, 6, 2, 8, 3, 3, 5, 5, 3, 2, 2, 2, 3, 4, 6, 6, /* 4x */
61 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, /* 5x */ 61 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, /* 5x */
62 6, 6, 2, 8, 3, 3, 5, 5, 4, 2, 2, 2, 5, 4, 6, 6, /* 6x */ 62 6, 6, 2, 8, 3, 3, 5, 5, 4, 2, 2, 2, 5, 4, 6, 6, /* 6x */
63 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, /* 7x */ 63 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, /* 7x */
64 2, 6, 2, 6, 3, 3, 3, 3, 2, 2, 2, 2, 4, 4, 4, 4, /* 8x */ 64 2, 6, 2, 6, 3, 3, 3, 3, 2, 2, 2, 2, 4, 4, 4, 4, /* 8x */
65 2, 6, 2, 6, 4, 4, 4, 4, 2, 5, 2, 5, 5, 5, 5, 5, /* 9x */ 65 2, 6, 2, 6, 4, 4, 4, 4, 2, 5, 2, 5, 5, 5, 5, 5, /* 9x */
66 2, 6, 2, 6, 3, 3, 3, 3, 2, 2, 2, 2, 4, 4, 4, 4, /* Ax */ 66 2, 6, 2, 6, 3, 3, 3, 3, 2, 2, 2, 2, 4, 4, 4, 4, /* Ax */
67 2, 5, 2, 5, 4, 4, 4, 4, 2, 4, 2, 4, 4, 4, 4, 4, /* Bx */ 67 2, 5, 2, 5, 4, 4, 4, 4, 2, 4, 2, 4, 4, 4, 4, 4, /* Bx */
68 2, 6, 2, 8, 3, 3, 5, 5, 2, 2, 2, 2, 4, 4, 6, 6, /* Cx */ 68 2, 6, 2, 8, 3, 3, 5, 5, 2, 2, 2, 2, 4, 4, 6, 6, /* Cx */
69 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, /* Dx */ 69 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, /* Dx */
70 2, 6, 2, 8, 3, 3, 5, 5, 2, 2, 2, 2, 4, 4, 6, 6, /* Ex */ 70 2, 6, 2, 8, 3, 3, 5, 5, 2, 2, 2, 2, 4, 4, 6, 6, /* Ex */
71 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7 /* Fx */ 71 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7 /* Fx */
72END_CONST_ARRAY; 72END_CONST_ARRAY;
73 73
74#ifdef ACPU_NO_DECIMAL 74#ifdef ACPU_NO_DECIMAL
75 75
76#define DO_ADC \ 76#define DO_ADC \
77 { \ 77 { \
78 /* binary mode */ \ 78 /* binary mode */ \
79 V(int, tmp) = a + data + c; \ 79 V(int, tmp) = a + data + c; \
80 c = tmp >> 8; \ 80 c = tmp >> 8; \
81 vdi &= D_FLAG | I_FLAG; \ 81 vdi &= D_FLAG | I_FLAG; \
82 if (((a ^ data) & 0x80) == 0 && ((data ^ tmp) & 0x80) != 0) \ 82 if (((a ^ data) & 0x80) == 0 && ((data ^ tmp) & 0x80) != 0) \
83 vdi += V_FLAG; \ 83 vdi += V_FLAG; \
84 nz = a = tmp & 0xff; \ 84 nz = a = tmp & 0xff; \
85 } 85 }
86 86
87#define DO_SBC \ 87#define DO_SBC \
88 { \ 88 { \
89 /* binary mode */ \ 89 /* binary mode */ \
90 V(int, tmp) = a - data - 1 + c; \ 90 V(int, tmp) = a - data - 1 + c; \
91 c = (tmp >= 0) ? 1 : 0; \ 91 c = (tmp >= 0) ? 1 : 0; \
92 vdi &= D_FLAG | I_FLAG; \ 92 vdi &= D_FLAG | I_FLAG; \
93 if (((a ^ tmp) & 0x80) != 0 && ((a ^ data) & 0x80) != 0) \ 93 if (((a ^ tmp) & 0x80) != 0 && ((a ^ data) & 0x80) != 0) \
94 vdi += V_FLAG; \ 94 vdi += V_FLAG; \
95 nz = a = tmp & 0xff; \ 95 nz = a = tmp & 0xff; \
96 } 96 }
97 97
98#else /* ACPU_NO_DECIMAL */ 98#else /* ACPU_NO_DECIMAL */
99 99
100#define DO_ADC \ 100#define DO_ADC \
101 if ((vdi & D_FLAG) == 0) { \ 101 if ((vdi & D_FLAG) == 0) { \
102 /* binary mode */ \ 102 /* binary mode */ \
103 V(int, tmp) = a + data + c; \ 103 V(int, tmp) = a + data + c; \
104 c = tmp >> 8; \ 104 c = tmp >> 8; \
105 vdi &= D_FLAG | I_FLAG; \ 105 vdi &= D_FLAG | I_FLAG; \
106 if (((a ^ data) & 0x80) == 0 && ((data ^ tmp) & 0x80) != 0) \ 106 if (((a ^ data) & 0x80) == 0 && ((data ^ tmp) & 0x80) != 0) \
107 vdi += V_FLAG; \ 107 vdi += V_FLAG; \
108 nz = a = tmp & 0xff; \ 108 nz = a = tmp & 0xff; \
109 } \ 109 } \
110 else { \ 110 else { \
111 /* decimal mode */ \ 111 /* decimal mode */ \
112 V(int, tmp) = (a & 0x0f) + (data & 0x0f) + c; \ 112 V(int, tmp) = (a & 0x0f) + (data & 0x0f) + c; \
113 if (tmp >= 10) \ 113 if (tmp >= 10) \
114 tmp = (tmp - 10) | 0x10; \ 114 tmp = (tmp - 10) | 0x10; \
115 tmp += (a & 0xf0) + (data & 0xf0); \ 115 tmp += (a & 0xf0) + (data & 0xf0); \
116 nz = ((tmp & 0x80) << 1) + ((a + data + c) & 0xff); \ 116 nz = ((tmp & 0x80) << 1) + ((a + data + c) & 0xff); \
117 vdi &= D_FLAG | I_FLAG; \ 117 vdi &= D_FLAG | I_FLAG; \
118 if (((a ^ data) & 0x80) == 0 && ((data ^ tmp) & 0x80) != 0) \ 118 if (((a ^ data) & 0x80) == 0 && ((data ^ tmp) & 0x80) != 0) \
119 vdi += V_FLAG; \ 119 vdi += V_FLAG; \
120 if (tmp > 0x9f) \ 120 if (tmp > 0x9f) \
121 tmp += 0x60; \ 121 tmp += 0x60; \
122 c = (tmp > 0xff) ? 1 : 0; \ 122 c = (tmp > 0xff) ? 1 : 0; \
123 a = tmp & 0xff; \ 123 a = tmp & 0xff; \
124 } 124 }
125 125
126#define DO_SBC \ 126#define DO_SBC \
127 if ((vdi & D_FLAG) == 0) { \ 127 if ((vdi & D_FLAG) == 0) { \
128 /* binary mode */ \ 128 /* binary mode */ \
129 V(int, tmp) = a - data - 1 + c; \ 129 V(int, tmp) = a - data - 1 + c; \
130 c = (tmp >= 0) ? 1 : 0; \ 130 c = (tmp >= 0) ? 1 : 0; \
131 vdi &= D_FLAG | I_FLAG; \ 131 vdi &= D_FLAG | I_FLAG; \
132 if (((a ^ tmp) & 0x80) != 0 && ((a ^ data) & 0x80) != 0) \ 132 if (((a ^ tmp) & 0x80) != 0 && ((a ^ data) & 0x80) != 0) \
133 vdi += V_FLAG; \ 133 vdi += V_FLAG; \
134 nz = a = tmp & 0xff; \ 134 nz = a = tmp & 0xff; \
135 } \ 135 } \
136 else { \ 136 else { \
137 /* decimal mode */ \ 137 /* decimal mode */ \
138 V(int, tmp) = a - data - 1 + c; \ 138 V(int, tmp) = a - data - 1 + c; \
139 V(int, al) = (a & 0x0f) - (data & 0x0f) - 1 + c; \ 139 V(int, al) = (a & 0x0f) - (data & 0x0f) - 1 + c; \
140 V(int, ah) = (a >> 4) - (data >> 4); \ 140 V(int, ah) = (a >> 4) - (data >> 4); \
141 if ((al & 0x10) != 0) { \ 141 if ((al & 0x10) != 0) { \
142 al -= 6; \ 142 al -= 6; \
143 ah--; \ 143 ah--; \
144 } \ 144 } \
145 if ((ah & 0x10) != 0) \ 145 if ((ah & 0x10) != 0) \
146 ah -= 6; \ 146 ah -= 6; \
147 c = tmp >= 0 ? 1 : 0; \ 147 c = tmp >= 0 ? 1 : 0; \
148 vdi &= D_FLAG | I_FLAG; \ 148 vdi &= D_FLAG | I_FLAG; \
149 if (((a ^ tmp) & 0x80) != 0 && ((a ^ data) & 0x80) != 0) \ 149 if (((a ^ tmp) & 0x80) != 0 && ((a ^ data) & 0x80) != 0) \
150 vdi += V_FLAG; \ 150 vdi += V_FLAG; \
151 nz = tmp & 0xff; \ 151 nz = tmp & 0xff; \
152 a = ((ah & 0xf) << 4) + (al & 0x0f); \ 152 a = ((ah & 0xf) << 4) + (al & 0x0f); \
153 } 153 }
154 154
155#endif /* ACPU_NO_DECIMAL */ 155#endif /* ACPU_NO_DECIMAL */
156 156
@@ -239,1068 +239,1068 @@ END_CONST_ARRAY;
239#define INS_ZP INC_ZP; data = nz; DO_SBC 239#define INS_ZP INC_ZP; data = nz; DO_SBC
240 240
241#define BRANCH(cond) \ 241#define BRANCH(cond) \
242 if (cond) { \ 242 if (cond) { \
243 addr = SBYTE(PEEK); \ 243 addr = SBYTE(PEEK); \
244 pc++; \ 244 pc++; \
245 addr += pc; \ 245 addr += pc; \
246 if ((addr ^ pc) >> 8 != 0) \ 246 if ((addr ^ pc) >> 8 != 0) \
247 ast _ cycle++; \ 247 ast _ cycle++; \
248 ast _ cycle++; \ 248 ast _ cycle++; \
249 pc = addr; \ 249 pc = addr; \
250 break; \ 250 break; \
251 } \ 251 } \
252 pc++; \ 252 pc++; \
253 break 253 break
254 254
255#define CHECK_IRQ \ 255#define CHECK_IRQ \
256 if ((vdi & I_FLAG) == 0 && ast _ irqst != 0xff) { \ 256 if ((vdi & I_FLAG) == 0 && ast _ irqst != 0xff) { \
257 PHPC; \ 257 PHPC; \
258 PHPB0; \ 258 PHPB0; \
259 vdi |= I_FLAG; \ 259 vdi |= I_FLAG; \
260 pc = dGetWord(0xfffe); \ 260 pc = dGetWord(0xfffe); \
261 ast _ cycle += 7; \ 261 ast _ cycle += 7; \
262 } 262 }
263 263
264/* Runs 6502 emulation for the specified number of Atari scanlines. 264/* Runs 6502 emulation for the specified number of Atari scanlines.
265 Each scanline is 114 cycles of which 9 is taken by ANTIC for memory refresh. */ 265 Each scanline is 114 cycles of which 9 is taken by ANTIC for memory refresh. */
266FUNC(void, Cpu_RunScanlines, (P(ASAP_State PTR, ast), P(int, scanlines))) 266FUNC(void, Cpu_RunScanlines, (P(ASAP_State PTR, ast), P(int, scanlines)))
267{ 267{
268 /* copy registers from ASAP_State to local variables for improved performance */ 268 /* copy registers from ASAP_State to local variables for improved performance */
269 V(int, pc); 269 V(int, pc);
270 V(int, nz); 270 V(int, nz);
271 V(int, a); 271 V(int, a);
272 V(int, x); 272 V(int, x);
273 V(int, y); 273 V(int, y);
274 V(int, c); 274 V(int, c);
275 V(int, s); 275 V(int, s);
276 V(int, vdi); 276 V(int, vdi);
277 V(int, next_event_cycle); 277 V(int, next_event_cycle);
278 V(int, cycle_limit); 278 V(int, cycle_limit);
279 pc = ast _ cpu_pc; 279 pc = ast _ cpu_pc;
280 nz = ast _ cpu_nz; 280 nz = ast _ cpu_nz;
281 a = ast _ cpu_a; 281 a = ast _ cpu_a;
282 x = ast _ cpu_x; 282 x = ast _ cpu_x;
283 y = ast _ cpu_y; 283 y = ast _ cpu_y;
284 c = ast _ cpu_c; 284 c = ast _ cpu_c;
285 s = ast _ cpu_s; 285 s = ast _ cpu_s;
286 vdi = ast _ cpu_vdi; 286 vdi = ast _ cpu_vdi;
287 ast _ next_scanline_cycle = 114; 287 ast _ next_scanline_cycle = 114;
288 next_event_cycle = 114; 288 next_event_cycle = 114;
289 cycle_limit = 114 * scanlines; 289 cycle_limit = 114 * scanlines;
290 if (next_event_cycle > ast _ timer1_cycle) 290 if (next_event_cycle > ast _ timer1_cycle)
291 next_event_cycle = ast _ timer1_cycle; 291 next_event_cycle = ast _ timer1_cycle;
292 if (next_event_cycle > ast _ timer2_cycle) 292 if (next_event_cycle > ast _ timer2_cycle)
293 next_event_cycle = ast _ timer2_cycle; 293 next_event_cycle = ast _ timer2_cycle;
294 if (next_event_cycle > ast _ timer4_cycle) 294 if (next_event_cycle > ast _ timer4_cycle)
295 next_event_cycle = ast _ timer4_cycle; 295 next_event_cycle = ast _ timer4_cycle;
296 ast _ nearest_event_cycle = next_event_cycle; 296 ast _ nearest_event_cycle = next_event_cycle;
297 for (;;) { 297 for (;;) {
298 V(int, cycle); 298 V(int, cycle);
299 V(int, addr); 299 V(int, addr);
300 V(int, data); 300 V(int, data);
301 cycle = ast _ cycle; 301 cycle = ast _ cycle;
302 if (cycle >= ast _ nearest_event_cycle) { 302 if (cycle >= ast _ nearest_event_cycle) {
303 if (cycle >= ast _ next_scanline_cycle) { 303 if (cycle >= ast _ next_scanline_cycle) {
304 if (++ast _ scanline_number == 312) 304 if (++ast _ scanline_number == 312)
305 ast _ scanline_number = 0; 305 ast _ scanline_number = 0;
306 ast _ cycle = cycle += 9; 306 ast _ cycle = cycle += 9;
307 ast _ next_scanline_cycle += 114; 307 ast _ next_scanline_cycle += 114;
308 if (--scanlines <= 0) 308 if (--scanlines <= 0)
309 break; 309 break;
310 } 310 }
311 next_event_cycle = ast _ next_scanline_cycle; 311 next_event_cycle = ast _ next_scanline_cycle;
312#define CHECK_TIMER_IRQ(ch) \ 312#define CHECK_TIMER_IRQ(ch) \
313 if (cycle >= ast _ timer##ch##_cycle) { \ 313 if (cycle >= ast _ timer##ch##_cycle) { \
314 ast _ irqst &= ~ch; \ 314 ast _ irqst &= ~ch; \
315 ast _ timer##ch##_cycle = NEVER; \ 315 ast _ timer##ch##_cycle = NEVER; \
316 } \ 316 } \
317 else if (next_event_cycle > ast _ timer##ch##_cycle) \ 317 else if (next_event_cycle > ast _ timer##ch##_cycle) \
318 next_event_cycle = ast _ timer##ch##_cycle; 318 next_event_cycle = ast _ timer##ch##_cycle;
319 CHECK_TIMER_IRQ(1); 319 CHECK_TIMER_IRQ(1);
320 CHECK_TIMER_IRQ(2); 320 CHECK_TIMER_IRQ(2);
321 CHECK_TIMER_IRQ(4); 321 CHECK_TIMER_IRQ(4);
322 ast _ nearest_event_cycle = next_event_cycle; 322 ast _ nearest_event_cycle = next_event_cycle;
323 CHECK_IRQ; 323 CHECK_IRQ;
324 } 324 }
325#ifdef ASAPSCAN 325#ifdef ASAPSCAN
326 if (cpu_trace != 0) 326 if (cpu_trace != 0)
327 trace_cpu(ast, pc, a, x, y, s, nz, vdi, c); 327 trace_cpu(ast, pc, a, x, y, s, nz, vdi, c);
328#endif 328#endif
329 data = FETCH; 329 data = FETCH;
330 ast _ cycle += opcode_cycles[data]; 330 ast _ cycle += opcode_cycles[data];
331 switch (data) { 331 switch (data) {
332 case 0x00: /* BRK */ 332 case 0x00: /* BRK */
333 pc++; 333 pc++;
334 PHPC; 334 PHPC;
335 PHPB1; 335 PHPB1;
336 vdi |= I_FLAG; 336 vdi |= I_FLAG;
337 pc = dGetWord(0xfffe); 337 pc = dGetWord(0xfffe);
338 break; 338 break;
339 case 0x01: /* ORA (ab,x) */ 339 case 0x01: /* ORA (ab,x) */
340 INDIRECT_X; 340 INDIRECT_X;
341 ORA; 341 ORA;
342 break; 342 break;
343 case 0x02: /* CIM [unofficial] */ 343 case 0x02: /* CIM [unofficial] */
344 case 0x12: 344 case 0x12:
345 case 0x22: 345 case 0x22:
346 case 0x32: 346 case 0x32:
347 case 0x42: 347 case 0x42:
348 case 0x52: 348 case 0x52:
349 case 0x62: 349 case 0x62:
350 case 0x72: 350 case 0x72:
351 case 0x92: 351 case 0x92:
352 case 0xb2: 352 case 0xb2:
353 case 0xd2: 353 case 0xd2:
354 case 0xf2: 354 case 0xf2:
355 ast _ scanline_number = (ast _ scanline_number + scanlines - 1) % 312; 355 ast _ scanline_number = (ast _ scanline_number + scanlines - 1) % 312;
356 scanlines = 1; 356 scanlines = 1;
357 ast _ cycle = cycle_limit; 357 ast _ cycle = cycle_limit;
358 break; 358 break;
359#ifndef ACPU_NO_UNOFFICIAL 359#ifndef ACPU_NO_UNOFFICIAL
360 case 0x03: /* ASO (ab,x) [unofficial] */ 360 case 0x03: /* ASO (ab,x) [unofficial] */
361 INDIRECT_X; 361 INDIRECT_X;
362 ASO; 362 ASO;
363 break; 363 break;
364 case 0x04: /* NOP ab [unofficial] */ 364 case 0x04: /* NOP ab [unofficial] */
365 case 0x44: 365 case 0x44:
366 case 0x64: 366 case 0x64:
367 case 0x14: /* NOP ab,x [unofficial] */ 367 case 0x14: /* NOP ab,x [unofficial] */
368 case 0x34: 368 case 0x34:
369 case 0x54: 369 case 0x54:
370 case 0x74: 370 case 0x74:
371 case 0xd4: 371 case 0xd4:
372 case 0xf4: 372 case 0xf4:
373 case 0x80: /* NOP #ab [unofficial] */ 373 case 0x80: /* NOP #ab [unofficial] */
374 case 0x82: 374 case 0x82:
375 case 0x89: 375 case 0x89:
376 case 0xc2: 376 case 0xc2:
377 case 0xe2: 377 case 0xe2:
378 pc++; 378 pc++;
379 break; 379 break;
380 case 0x07: /* ASO ab [unofficial] */ 380 case 0x07: /* ASO ab [unofficial] */
381 ZPAGE; 381 ZPAGE;
382 ASO_ZP; 382 ASO_ZP;
383 break; 383 break;
384 case 0x0b: /* ANC #ab [unofficial] */ 384 case 0x0b: /* ANC #ab [unofficial] */
385 case 0x2b: 385 case 0x2b:
386 nz = a &= FETCH; 386 nz = a &= FETCH;
387 c = nz >> 7; 387 c = nz >> 7;
388 break; 388 break;
389 case 0x0c: /* NOP abcd [unofficial] */ 389 case 0x0c: /* NOP abcd [unofficial] */
390 pc += 2; 390 pc += 2;
391 break; 391 break;
392 case 0x0f: /* ASO abcd [unofficial] */ 392 case 0x0f: /* ASO abcd [unofficial] */
393 ABSOLUTE; 393 ABSOLUTE;
394 ASO; 394 ASO;
395 break; 395 break;
396 case 0x13: /* ASO (ab),y [unofficial] */ 396 case 0x13: /* ASO (ab),y [unofficial] */
397 INDIRECT_Y; 397 INDIRECT_Y;
398 ASO; 398 ASO;
399 break; 399 break;
400 case 0x17: /* ASO ab,x [unofficial] */ 400 case 0x17: /* ASO ab,x [unofficial] */
401 ZPAGE_X; 401 ZPAGE_X;
402 ASO_ZP; 402 ASO_ZP;
403 break; 403 break;
404 case 0x1b: /* ASO abcd,y [unofficial] */ 404 case 0x1b: /* ASO abcd,y [unofficial] */
405 ABSOLUTE_Y; 405 ABSOLUTE_Y;
406 ASO; 406 ASO;
407 break; 407 break;
408 case 0x1c: /* NOP abcd,x [unofficial] */ 408 case 0x1c: /* NOP abcd,x [unofficial] */
409 case 0x3c: 409 case 0x3c:
410 case 0x5c: 410 case 0x5c:
411 case 0x7c: 411 case 0x7c:
412 case 0xdc: 412 case 0xdc:
413 case 0xfc: 413 case 0xfc:
414 if (FETCH + x >= 0x100) 414 if (FETCH + x >= 0x100)
415 ast _ cycle++; 415 ast _ cycle++;
416 pc++; 416 pc++;
417 break; 417 break;
418 case 0x1f: /* ASO abcd,x [unofficial] */ 418 case 0x1f: /* ASO abcd,x [unofficial] */
419 ABSOLUTE_X; 419 ABSOLUTE_X;
420 ASO; 420 ASO;
421 break; 421 break;
422 case 0x23: /* RLA (ab,x) [unofficial] */ 422 case 0x23: /* RLA (ab,x) [unofficial] */
423 INDIRECT_X; 423 INDIRECT_X;
424 RLA; 424 RLA;
425 break; 425 break;
426 case 0x27: /* RLA ab [unofficial] */ 426 case 0x27: /* RLA ab [unofficial] */
427 ZPAGE; 427 ZPAGE;
428 RLA_ZP; 428 RLA_ZP;
429 break; 429 break;
430 case 0x2f: /* RLA abcd [unofficial] */ 430 case 0x2f: /* RLA abcd [unofficial] */
431 ABSOLUTE; 431 ABSOLUTE;
432 RLA; 432 RLA;
433 break; 433 break;
434 case 0x33: /* RLA (ab),y [unofficial] */ 434 case 0x33: /* RLA (ab),y [unofficial] */
435 INDIRECT_Y; 435 INDIRECT_Y;
436 RLA; 436 RLA;
437 break; 437 break;
438 case 0x37: /* RLA ab,x [unofficial] */ 438 case 0x37: /* RLA ab,x [unofficial] */
439 ZPAGE_X; 439 ZPAGE_X;
440 RLA_ZP; 440 RLA_ZP;
441 break; 441 break;
442 case 0x3b: /* RLA abcd,y [unofficial] */ 442 case 0x3b: /* RLA abcd,y [unofficial] */
443 ABSOLUTE_Y; 443 ABSOLUTE_Y;
444 RLA; 444 RLA;
445 break; 445 break;
446 case 0x3f: /* RLA abcd,x [unofficial] */ 446 case 0x3f: /* RLA abcd,x [unofficial] */
447 ABSOLUTE_X; 447 ABSOLUTE_X;
448 RLA; 448 RLA;
449 break; 449 break;
450 case 0x43: /* LSE (ab,x) [unofficial] */ 450 case 0x43: /* LSE (ab,x) [unofficial] */
451 INDIRECT_X; 451 INDIRECT_X;
452 LSE; 452 LSE;
453 break; 453 break;
454 case 0x47: /* LSE ab [unofficial] */ 454 case 0x47: /* LSE ab [unofficial] */
455 ZPAGE; 455 ZPAGE;
456 LSE_ZP; 456 LSE_ZP;
457 break; 457 break;
458 case 0x4b: /* ALR #ab [unofficial] */ 458 case 0x4b: /* ALR #ab [unofficial] */
459 a &= FETCH; 459 a &= FETCH;
460 c = a & 1; 460 c = a & 1;
461 nz = a >>= 1; 461 nz = a >>= 1;
462 break; 462 break;
463 case 0x4f: /* LSE abcd [unofficial] */ 463 case 0x4f: /* LSE abcd [unofficial] */
464 ABSOLUTE; 464 ABSOLUTE;
465 LSE; 465 LSE;
466 break; 466 break;
467 case 0x53: /* LSE (ab),y [unofficial] */ 467 case 0x53: /* LSE (ab),y [unofficial] */
468 INDIRECT_Y; 468 INDIRECT_Y;
469 LSE; 469 LSE;
470 break; 470 break;
471 case 0x57: /* LSE ab,x [unofficial] */ 471 case 0x57: /* LSE ab,x [unofficial] */
472 ZPAGE_X; 472 ZPAGE_X;
473 LSE_ZP; 473 LSE_ZP;
474 break; 474 break;
475 case 0x5b: /* LSE abcd,y [unofficial] */ 475 case 0x5b: /* LSE abcd,y [unofficial] */
476 ABSOLUTE_Y; 476 ABSOLUTE_Y;
477 LSE; 477 LSE;
478 break; 478 break;
479 case 0x5f: /* LSE abcd,x [unofficial] */ 479 case 0x5f: /* LSE abcd,x [unofficial] */
480 ABSOLUTE_X; 480 ABSOLUTE_X;
481 LSE; 481 LSE;
482 break; 482 break;
483 case 0x63: /* RRA (ab,x) [unofficial] */ 483 case 0x63: /* RRA (ab,x) [unofficial] */
484 INDIRECT_X; 484 INDIRECT_X;
485 RRA; 485 RRA;
486 break; 486 break;
487 case 0x67: /* RRA ab [unofficial] */ 487 case 0x67: /* RRA ab [unofficial] */
488 ZPAGE; 488 ZPAGE;
489 RRA_ZP; 489 RRA_ZP;
490 break; 490 break;
491 case 0x6b: /* ARR #ab [unofficial] */ 491 case 0x6b: /* ARR #ab [unofficial] */
492 data = a & FETCH; 492 data = a & FETCH;
493 nz = a = (data >> 1) + (c << 7); 493 nz = a = (data >> 1) + (c << 7);
494 vdi = (vdi & (D_FLAG | I_FLAG)) + ((a ^ data) & V_FLAG); 494 vdi = (vdi & (D_FLAG | I_FLAG)) + ((a ^ data) & V_FLAG);
495#ifdef ACPU_NO_DECIMAL 495#ifdef ACPU_NO_DECIMAL
496 c = data >> 7; 496 c = data >> 7;
497#else 497#else
498 if ((vdi & D_FLAG) == 0) 498 if ((vdi & D_FLAG) == 0)
499 c = data >> 7; 499 c = data >> 7;
500 else { 500 else {
501 if ((data & 0xf) >= 5) 501 if ((data & 0xf) >= 5)
502 a = (a & 0xf0) + ((a + 6) & 0xf); 502 a = (a & 0xf0) + ((a + 6) & 0xf);
503 if (data >= 0x50) { 503 if (data >= 0x50) {
504 a = (a + 0x60) & 0xff; 504 a = (a + 0x60) & 0xff;
505 c = 1; 505 c = 1;
506 } 506 }
507 else 507 else
508 c = 0; 508 c = 0;
509 } 509 }
510#endif 510#endif
511 break; 511 break;
512 case 0x6f: /* RRA abcd [unofficial] */ 512 case 0x6f: /* RRA abcd [unofficial] */
513 ABSOLUTE; 513 ABSOLUTE;
514 RRA; 514 RRA;
515 break; 515 break;
516 case 0x73: /* RRA (ab),y [unofficial] */ 516 case 0x73: /* RRA (ab),y [unofficial] */
517 INDIRECT_Y; 517 INDIRECT_Y;
518 RRA; 518 RRA;
519 break; 519 break;
520 case 0x77: /* RRA ab,x [unofficial] */ 520 case 0x77: /* RRA ab,x [unofficial] */
521 ZPAGE_X; 521 ZPAGE_X;
522 RRA_ZP; 522 RRA_ZP;
523 break; 523 break;
524 case 0x7b: /* RRA abcd,y [unofficial] */ 524 case 0x7b: /* RRA abcd,y [unofficial] */
525 ABSOLUTE_Y; 525 ABSOLUTE_Y;
526 RRA; 526 RRA;
527 break; 527 break;
528 case 0x7f: /* RRA abcd,x [unofficial] */ 528 case 0x7f: /* RRA abcd,x [unofficial] */
529 ABSOLUTE_X; 529 ABSOLUTE_X;
530 RRA; 530 RRA;
531 break; 531 break;
532 case 0x83: /* SAX (ab,x) [unofficial] */ 532 case 0x83: /* SAX (ab,x) [unofficial] */
533 INDIRECT_X; 533 INDIRECT_X;
534 SAX; 534 SAX;
535 break; 535 break;
536 case 0x87: /* SAX ab [unofficial] */ 536 case 0x87: /* SAX ab [unofficial] */
537 ZPAGE; 537 ZPAGE;
538 SAX_ZP; 538 SAX_ZP;
539 break; 539 break;
540 case 0x8b: /* ANE #ab [unofficial] */ 540 case 0x8b: /* ANE #ab [unofficial] */
541 data = FETCH; 541 data = FETCH;
542 a &= x; 542 a &= x;
543 nz = a & data; 543 nz = a & data;
544 a &= data | 0xef; 544 a &= data | 0xef;
545 break; 545 break;
546 case 0x8f: /* SAX abcd [unofficial] */ 546 case 0x8f: /* SAX abcd [unofficial] */
547 ABSOLUTE; 547 ABSOLUTE;
548 SAX; 548 SAX;
549 break; 549 break;
550 case 0x93: /* SHA (ab),y [unofficial, unstable] */ 550 case 0x93: /* SHA (ab),y [unofficial, unstable] */
551 ZPAGE; 551 ZPAGE;
552 data = zGetByte(addr + 1); 552 data = zGetByte(addr + 1);
553 addr = (dGetByte(addr) + (data << 8) + y) & 0xffff; 553 addr = (dGetByte(addr) + (data << 8) + y) & 0xffff;
554 data = a & x & (data + 1); 554 data = a & x & (data + 1);
555 PutByte(addr, data); 555 PutByte(addr, data);
556 break; 556 break;
557 case 0x97: /* SAX ab,y [unofficial] */ 557 case 0x97: /* SAX ab,y [unofficial] */
558 ZPAGE_Y; 558 ZPAGE_Y;
559 SAX_ZP; 559 SAX_ZP;
560 break; 560 break;
561 case 0x9b: /* SHS abcd,y [unofficial, unstable] */ 561 case 0x9b: /* SHS abcd,y [unofficial, unstable] */
562 /* S seems to be stable, only memory values vary */ 562 /* S seems to be stable, only memory values vary */
563 addr = FETCH; 563 addr = FETCH;
564 data = FETCH; 564 data = FETCH;
565 addr = (addr + (data << 8) + y) & 0xffff; 565 addr = (addr + (data << 8) + y) & 0xffff;
566 s = a & x; 566 s = a & x;
567 data = s & (data + 1); 567 data = s & (data + 1);
568 PutByte(addr, data); 568 PutByte(addr, data);
569 break; 569 break;
570 case 0x9c: /* SHY abcd,x [unofficial] */ 570 case 0x9c: /* SHY abcd,x [unofficial] */
571 addr = FETCH; 571 addr = FETCH;
572 data = FETCH; 572 data = FETCH;
573 addr = (addr + (data << 8) + x) & 0xffff; 573 addr = (addr + (data << 8) + x) & 0xffff;
574 data = y & (data + 1); 574 data = y & (data + 1);
575 PutByte(addr, data); 575 PutByte(addr, data);
576 break; 576 break;
577 case 0x9e: /* SHX abcd,y [unofficial] */ 577 case 0x9e: /* SHX abcd,y [unofficial] */
578 addr = FETCH; 578 addr = FETCH;
579 data = FETCH; 579 data = FETCH;
580 addr = (addr + (data << 8) + y) & 0xffff; 580 addr = (addr + (data << 8) + y) & 0xffff;
581 data = x & (data + 1); 581 data = x & (data + 1);
582 PutByte(addr, data); 582 PutByte(addr, data);
583 break; 583 break;
584 case 0x9f: /* SHA abcd,y [unofficial, unstable] */ 584 case 0x9f: /* SHA abcd,y [unofficial, unstable] */
585 addr = FETCH; 585 addr = FETCH;
586 data = FETCH; 586 data = FETCH;
587 addr = (addr + (data << 8) + y) & 0xffff; 587 addr = (addr + (data << 8) + y) & 0xffff;
588 data = a & x & (data + 1); 588 data = a & x & (data + 1);
589 PutByte(addr, data); 589 PutByte(addr, data);
590 break; 590 break;
591 case 0xa3: /* LAX (ab,x) [unofficial] */ 591 case 0xa3: /* LAX (ab,x) [unofficial] */
592 INDIRECT_X; 592 INDIRECT_X;
593 LAX; 593 LAX;
594 break; 594 break;
595 case 0xa7: /* LAX ab [unofficial] */ 595 case 0xa7: /* LAX ab [unofficial] */
596 ZPAGE; 596 ZPAGE;
597 LAX_ZP; 597 LAX_ZP;
598 break; 598 break;
599 case 0xab: /* ANX #ab [unofficial] */ 599 case 0xab: /* ANX #ab [unofficial] */
600 nz = x = a &= FETCH; 600 nz = x = a &= FETCH;
601 break; 601 break;
602 case 0xaf: /* LAX abcd [unofficial] */ 602 case 0xaf: /* LAX abcd [unofficial] */
603 ABSOLUTE; 603 ABSOLUTE;
604 LAX; 604 LAX;
605 break; 605 break;
606 case 0xb3: /* LAX (ab),y [unofficial] */ 606 case 0xb3: /* LAX (ab),y [unofficial] */
607 INDIRECT_Y; 607 INDIRECT_Y;
608 NCYCLES_Y; 608 NCYCLES_Y;
609 LAX; 609 LAX;
610 break; 610 break;
611 case 0xb7: /* LAX ab,y [unofficial] */ 611 case 0xb7: /* LAX ab,y [unofficial] */
612 ZPAGE_Y; 612 ZPAGE_Y;
613 LAX_ZP; 613 LAX_ZP;
614 break; 614 break;
615 case 0xbb: /* LAS abcd,y [unofficial] */ 615 case 0xbb: /* LAS abcd,y [unofficial] */
616 ABSOLUTE_Y; 616 ABSOLUTE_Y;
617 NCYCLES_Y; 617 NCYCLES_Y;
618 nz = x = a = s &= GetByte(addr); 618 nz = x = a = s &= GetByte(addr);
619 break; 619 break;
620 case 0xbf: /* LAX abcd,y [unofficial] */ 620 case 0xbf: /* LAX abcd,y [unofficial] */
621 ABSOLUTE_Y; 621 ABSOLUTE_Y;
622 NCYCLES_Y; 622 NCYCLES_Y;
623 LAX; 623 LAX;
624 break; 624 break;
625 case 0xc3: /* DCM (ab,x) [unofficial] */ 625 case 0xc3: /* DCM (ab,x) [unofficial] */
626 INDIRECT_X; 626 INDIRECT_X;
627 DCM; 627 DCM;
628 break; 628 break;
629 case 0xc7: /* DCM ab [unofficial] */ 629 case 0xc7: /* DCM ab [unofficial] */
630 ZPAGE; 630 ZPAGE;
631 DCM_ZP; 631 DCM_ZP;
632 break; 632 break;
633 case 0xcb: /* SBX #ab [unofficial] */ 633 case 0xcb: /* SBX #ab [unofficial] */
634 nz = FETCH; 634 nz = FETCH;
635 x &= a; 635 x &= a;
636 c = (x >= nz) ? 1 : 0; 636 c = (x >= nz) ? 1 : 0;
637 nz = x = (x - nz) & 0xff; 637 nz = x = (x - nz) & 0xff;
638 break; 638 break;
639 case 0xcf: /* DCM abcd [unofficial] */ 639 case 0xcf: /* DCM abcd [unofficial] */
640 ABSOLUTE; 640 ABSOLUTE;
641 DCM; 641 DCM;
642 break; 642 break;
643 case 0xd3: /* DCM (ab),y [unofficial] */ 643 case 0xd3: /* DCM (ab),y [unofficial] */
644 INDIRECT_Y; 644 INDIRECT_Y;
645 DCM; 645 DCM;
646 break; 646 break;
647 case 0xd7: /* DCM ab,x [unofficial] */ 647 case 0xd7: /* DCM ab,x [unofficial] */
648 ZPAGE_X; 648 ZPAGE_X;
649 DCM_ZP; 649 DCM_ZP;
650 break; 650 break;
651 case 0xdb: /* DCM abcd,y [unofficial] */ 651 case 0xdb: /* DCM abcd,y [unofficial] */
652 ABSOLUTE_Y; 652 ABSOLUTE_Y;
653 DCM; 653 DCM;
654 break; 654 break;
655 case 0xdf: /* DCM abcd,x [unofficial] */ 655 case 0xdf: /* DCM abcd,x [unofficial] */
656 ABSOLUTE_X; 656 ABSOLUTE_X;
657 DCM; 657 DCM;
658 break; 658 break;
659 case 0xe3: /* INS (ab,x) [unofficial] */ 659 case 0xe3: /* INS (ab,x) [unofficial] */
660 INDIRECT_X; 660 INDIRECT_X;
661 INS; 661 INS;
662 break; 662 break;
663 case 0xe7: /* INS ab [unofficial] */ 663 case 0xe7: /* INS ab [unofficial] */
664 ZPAGE; 664 ZPAGE;
665 INS_ZP; 665 INS_ZP;
666 break; 666 break;
667 case 0xef: /* INS abcd [unofficial] */ 667 case 0xef: /* INS abcd [unofficial] */
668 ABSOLUTE; 668 ABSOLUTE;
669 INS; 669 INS;
670 break; 670 break;
671 case 0xf3: /* INS (ab),y [unofficial] */ 671 case 0xf3: /* INS (ab),y [unofficial] */
672 INDIRECT_Y; 672 INDIRECT_Y;
673 INS; 673 INS;
674 break; 674 break;
675 case 0xf7: /* INS ab,x [unofficial] */ 675 case 0xf7: /* INS ab,x [unofficial] */
676 ZPAGE_X; 676 ZPAGE_X;
677 INS_ZP; 677 INS_ZP;
678 break; 678 break;
679 case 0xfb: /* INS abcd,y [unofficial] */ 679 case 0xfb: /* INS abcd,y [unofficial] */
680 ABSOLUTE_Y; 680 ABSOLUTE_Y;
681 INS; 681 INS;
682 break; 682 break;
683 case 0xff: /* INS abcd,x [unofficial] */ 683 case 0xff: /* INS abcd,x [unofficial] */
684 ABSOLUTE_X; 684 ABSOLUTE_X;
685 INS; 685 INS;
686 break; 686 break;
687#endif /* ACPU_NO_UNOFFICIAL */ 687#endif /* ACPU_NO_UNOFFICIAL */
688 case 0x05: /* ORA ab */ 688 case 0x05: /* ORA ab */
689 ZPAGE; 689 ZPAGE;
690 ORA_ZP; 690 ORA_ZP;
691 break; 691 break;
692 case 0x06: /* ASL ab */ 692 case 0x06: /* ASL ab */
693 ZPAGE; 693 ZPAGE;
694 ASL_ZP; 694 ASL_ZP;
695 break; 695 break;
696 case 0x08: /* PHP */ 696 case 0x08: /* PHP */
697 PHPB1; 697 PHPB1;
698 break; 698 break;
699 case 0x09: /* ORA #ab */ 699 case 0x09: /* ORA #ab */
700 nz = a |= FETCH; 700 nz = a |= FETCH;
701 break; 701 break;
702 case 0x0a: /* ASL */ 702 case 0x0a: /* ASL */
703 c = a >> 7; 703 c = a >> 7;
704 nz = a = (a << 1) & 0xff; 704 nz = a = (a << 1) & 0xff;
705 break; 705 break;
706 case 0x0d: /* ORA abcd */ 706 case 0x0d: /* ORA abcd */
707 ABSOLUTE; 707 ABSOLUTE;
708 ORA; 708 ORA;
709 break; 709 break;
710 case 0x0e: /* ASL abcd */ 710 case 0x0e: /* ASL abcd */
711 ABSOLUTE; 711 ABSOLUTE;
712 ASL; 712 ASL;
713 break; 713 break;
714 case 0x10: /* BPL */ 714 case 0x10: /* BPL */
715 BRANCH(nz < 0x80); 715 BRANCH(nz < 0x80);
716 case 0x11: /* ORA (ab),y */ 716 case 0x11: /* ORA (ab),y */
717 INDIRECT_Y; 717 INDIRECT_Y;
718 NCYCLES_Y; 718 NCYCLES_Y;
719 ORA; 719 ORA;
720 break; 720 break;
721 case 0x15: /* ORA ab,x */ 721 case 0x15: /* ORA ab,x */
722 ZPAGE_X; 722 ZPAGE_X;
723 ORA_ZP; 723 ORA_ZP;
724 break; 724 break;
725 case 0x16: /* ASL ab,x */ 725 case 0x16: /* ASL ab,x */
726 ZPAGE_X; 726 ZPAGE_X;
727 ASL_ZP; 727 ASL_ZP;
728 break; 728 break;
729 case 0x18: /* CLC */ 729 case 0x18: /* CLC */
730 c = 0; 730 c = 0;
731 break; 731 break;
732 case 0x19: /* ORA abcd,y */ 732 case 0x19: /* ORA abcd,y */
733 ABSOLUTE_Y; 733 ABSOLUTE_Y;
734 NCYCLES_Y; 734 NCYCLES_Y;
735 ORA; 735 ORA;
736 break; 736 break;
737 case 0x1d: /* ORA abcd,x */ 737 case 0x1d: /* ORA abcd,x */
738 ABSOLUTE_X; 738 ABSOLUTE_X;
739 NCYCLES_X; 739 NCYCLES_X;
740 ORA; 740 ORA;
741 break; 741 break;
742 case 0x1e: /* ASL abcd,x */ 742 case 0x1e: /* ASL abcd,x */
743 ABSOLUTE_X; 743 ABSOLUTE_X;
744 ASL; 744 ASL;
745 break; 745 break;
746 case 0x20: /* JSR abcd */ 746 case 0x20: /* JSR abcd */
747 addr = FETCH; 747 addr = FETCH;
748 PHPC; 748 PHPC;
749 pc = addr + (PEEK << 8); 749 pc = addr + (PEEK << 8);
750 break; 750 break;
751 case 0x21: /* AND (ab,x) */ 751 case 0x21: /* AND (ab,x) */
752 INDIRECT_X; 752 INDIRECT_X;
753 AND; 753 AND;
754 break; 754 break;
755 case 0x24: /* BIT ab */ 755 case 0x24: /* BIT ab */
756 ZPAGE; 756 ZPAGE;
757 nz = dGetByte(addr); 757 nz = dGetByte(addr);
758 vdi = (vdi & (D_FLAG | I_FLAG)) + (nz & V_FLAG); 758 vdi = (vdi & (D_FLAG | I_FLAG)) + (nz & V_FLAG);
759 nz = ((nz & 0x80) << 1) + (nz & a); 759 nz = ((nz & 0x80) << 1) + (nz & a);
760 break; 760 break;
761 case 0x25: /* AND ab */ 761 case 0x25: /* AND ab */
762 ZPAGE; 762 ZPAGE;
763 AND_ZP; 763 AND_ZP;
764 break; 764 break;
765 case 0x26: /* ROL ab */ 765 case 0x26: /* ROL ab */
766 ZPAGE; 766 ZPAGE;
767 ROL_ZP; 767 ROL_ZP;
768 break; 768 break;
769 case 0x28: /* PLP */ 769 case 0x28: /* PLP */
770 PLP; 770 PLP;
771 CHECK_IRQ; 771 CHECK_IRQ;
772 break; 772 break;
773 case 0x29: /* AND #ab */ 773 case 0x29: /* AND #ab */
774 nz = a &= FETCH; 774 nz = a &= FETCH;
775 break; 775 break;
776 case 0x2a: /* ROL */ 776 case 0x2a: /* ROL */
777 a = (a << 1) + c; 777 a = (a << 1) + c;
778 c = a >> 8; 778 c = a >> 8;
779 nz = a &= 0xff; 779 nz = a &= 0xff;
780 break; 780 break;
781 case 0x2c: /* BIT abcd */ 781 case 0x2c: /* BIT abcd */
782 ABSOLUTE; 782 ABSOLUTE;
783 nz = GetByte(addr); 783 nz = GetByte(addr);
784 vdi = (vdi & (D_FLAG | I_FLAG)) + (nz & V_FLAG); 784 vdi = (vdi & (D_FLAG | I_FLAG)) + (nz & V_FLAG);
785 nz = ((nz & 0x80) << 1) + (nz & a); 785 nz = ((nz & 0x80) << 1) + (nz & a);
786 break; 786 break;
787 case 0x2d: /* AND abcd */ 787 case 0x2d: /* AND abcd */
788 ABSOLUTE; 788 ABSOLUTE;
789 AND; 789 AND;
790 break; 790 break;
791 case 0x2e: /* ROL abcd */ 791 case 0x2e: /* ROL abcd */
792 ABSOLUTE; 792 ABSOLUTE;
793 ROL; 793 ROL;
794 break; 794 break;
795 case 0x30: /* BMI */ 795 case 0x30: /* BMI */
796 BRANCH(nz >= 0x80); 796 BRANCH(nz >= 0x80);
797 case 0x31: /* AND (ab),y */ 797 case 0x31: /* AND (ab),y */
798 INDIRECT_Y; 798 INDIRECT_Y;
799 NCYCLES_Y; 799 NCYCLES_Y;
800 AND; 800 AND;
801 break; 801 break;
802 case 0x35: /* AND ab,x */ 802 case 0x35: /* AND ab,x */
803 ZPAGE_X; 803 ZPAGE_X;
804 AND_ZP; 804 AND_ZP;
805 break; 805 break;
806 case 0x36: /* ROL ab,x */ 806 case 0x36: /* ROL ab,x */
807 ZPAGE_X; 807 ZPAGE_X;
808 ROL_ZP; 808 ROL_ZP;
809 break; 809 break;
810 case 0x38: /* SEC */ 810 case 0x38: /* SEC */
811 c = 1; 811 c = 1;
812 break; 812 break;
813 case 0x39: /* AND abcd,y */ 813 case 0x39: /* AND abcd,y */
814 ABSOLUTE_Y; 814 ABSOLUTE_Y;
815 NCYCLES_Y; 815 NCYCLES_Y;
816 AND; 816 AND;
817 break; 817 break;
818 case 0x3d: /* AND abcd,x */ 818 case 0x3d: /* AND abcd,x */
819 ABSOLUTE_X; 819 ABSOLUTE_X;
820 NCYCLES_X; 820 NCYCLES_X;
821 AND; 821 AND;
822 break; 822 break;
823 case 0x3e: /* ROL abcd,x */ 823 case 0x3e: /* ROL abcd,x */
824 ABSOLUTE_X; 824 ABSOLUTE_X;
825 ROL; 825 ROL;
826 break; 826 break;
827 case 0x40: /* RTI */ 827 case 0x40: /* RTI */
828 PLP; 828 PLP;
829 PL(pc); 829 PL(pc);
830 PL(addr); 830 PL(addr);
831 pc += addr << 8; 831 pc += addr << 8;
832 CHECK_IRQ; 832 CHECK_IRQ;
833 break; 833 break;
834 case 0x41: /* EOR (ab,x) */ 834 case 0x41: /* EOR (ab,x) */
835 INDIRECT_X; 835 INDIRECT_X;
836 EOR; 836 EOR;
837 break; 837 break;
838 case 0x45: /* EOR ab */ 838 case 0x45: /* EOR ab */
839 ZPAGE; 839 ZPAGE;
840 EOR_ZP; 840 EOR_ZP;
841 break; 841 break;
842 case 0x46: /* LSR ab */ 842 case 0x46: /* LSR ab */
843 ZPAGE; 843 ZPAGE;
844 LSR_ZP; 844 LSR_ZP;
845 break; 845 break;
846 case 0x48: /* PHA */ 846 case 0x48: /* PHA */
847 PH(a); 847 PH(a);
848 break; 848 break;
849 case 0x49: /* EOR #ab */ 849 case 0x49: /* EOR #ab */
850 nz = a ^= FETCH; 850 nz = a ^= FETCH;
851 break; 851 break;
852 case 0x4a: /* LSR */ 852 case 0x4a: /* LSR */
853 c = a & 1; 853 c = a & 1;
854 nz = a >>= 1; 854 nz = a >>= 1;
855 break; 855 break;
856 case 0x4c: /* JMP abcd */ 856 case 0x4c: /* JMP abcd */
857 addr = FETCH; 857 addr = FETCH;
858 pc = addr + (PEEK << 8); 858 pc = addr + (PEEK << 8);
859 break; 859 break;
860 case 0x4d: /* EOR abcd */ 860 case 0x4d: /* EOR abcd */
861 ABSOLUTE; 861 ABSOLUTE;
862 EOR; 862 EOR;
863 break; 863 break;
864 case 0x4e: /* LSR abcd */ 864 case 0x4e: /* LSR abcd */
865 ABSOLUTE; 865 ABSOLUTE;
866 LSR; 866 LSR;
867 break; 867 break;
868 case 0x50: /* BVC */ 868 case 0x50: /* BVC */
869 BRANCH((vdi & V_FLAG) == 0); 869 BRANCH((vdi & V_FLAG) == 0);
870 case 0x51: /* EOR (ab),y */ 870 case 0x51: /* EOR (ab),y */
871 INDIRECT_Y; 871 INDIRECT_Y;
872 NCYCLES_Y; 872 NCYCLES_Y;
873 EOR; 873 EOR;
874 break; 874 break;
875 case 0x55: /* EOR ab,x */ 875 case 0x55: /* EOR ab,x */
876 ZPAGE_X; 876 ZPAGE_X;
877 EOR_ZP; 877 EOR_ZP;
878 break; 878 break;
879 case 0x56: /* LSR ab,x */ 879 case 0x56: /* LSR ab,x */
880 ZPAGE_X; 880 ZPAGE_X;
881 LSR_ZP; 881 LSR_ZP;
882 break; 882 break;
883 case 0x58: /* CLI */ 883 case 0x58: /* CLI */
884 vdi &= V_FLAG | D_FLAG; 884 vdi &= V_FLAG | D_FLAG;
885 CHECK_IRQ; 885 CHECK_IRQ;
886 break; 886 break;
887 case 0x59: /* EOR abcd,y */ 887 case 0x59: /* EOR abcd,y */
888 ABSOLUTE_Y; 888 ABSOLUTE_Y;
889 NCYCLES_Y; 889 NCYCLES_Y;
890 EOR; 890 EOR;
891 break; 891 break;
892 case 0x5d: /* EOR abcd,x */ 892 case 0x5d: /* EOR abcd,x */
893 ABSOLUTE_X; 893 ABSOLUTE_X;
894 NCYCLES_X; 894 NCYCLES_X;
895 EOR; 895 EOR;
896 break; 896 break;
897 case 0x5e: /* LSR abcd,x */ 897 case 0x5e: /* LSR abcd,x */
898 ABSOLUTE_X; 898 ABSOLUTE_X;
899 LSR; 899 LSR;
900 break; 900 break;
901 case 0x60: /* RTS */ 901 case 0x60: /* RTS */
902 PL(pc); 902 PL(pc);
903 PL(addr); 903 PL(addr);
904 pc += (addr << 8) + 1; 904 pc += (addr << 8) + 1;
905 break; 905 break;
906 case 0x61: /* ADC (ab,x) */ 906 case 0x61: /* ADC (ab,x) */
907 INDIRECT_X; 907 INDIRECT_X;
908 ADC; 908 ADC;
909 break; 909 break;
910 case 0x65: /* ADC ab */ 910 case 0x65: /* ADC ab */
911 ZPAGE; 911 ZPAGE;
912 ADC_ZP; 912 ADC_ZP;
913 break; 913 break;
914 case 0x66: /* ROR ab */ 914 case 0x66: /* ROR ab */
915 ZPAGE; 915 ZPAGE;
916 ROR_ZP; 916 ROR_ZP;
917 break; 917 break;
918 case 0x68: /* PLA */ 918 case 0x68: /* PLA */
919 PL(a); 919 PL(a);
920 nz = a; 920 nz = a;
921 break; 921 break;
922 case 0x69: /* ADC #ab */ 922 case 0x69: /* ADC #ab */
923 data = FETCH; 923 data = FETCH;
924 DO_ADC; 924 DO_ADC;
925 break; 925 break;
926 case 0x6a: /* ROR */ 926 case 0x6a: /* ROR */
927 nz = (c << 7) + (a >> 1); 927 nz = (c << 7) + (a >> 1);
928 c = a & 1; 928 c = a & 1;
929 a = nz; 929 a = nz;
930 break; 930 break;
931 case 0x6c: /* JMP (abcd) */ 931 case 0x6c: /* JMP (abcd) */
932 ABSOLUTE; 932 ABSOLUTE;
933 if ((addr & 0xff) == 0xff) 933 if ((addr & 0xff) == 0xff)
934 pc = (dGetByte(addr - 0xff) << 8) + dGetByte(addr); 934 pc = (dGetByte(addr - 0xff) << 8) + dGetByte(addr);
935 else 935 else
936 pc = dGetWord(addr); 936 pc = dGetWord(addr);
937 break; 937 break;
938 case 0x6d: /* ADC abcd */ 938 case 0x6d: /* ADC abcd */
939 ABSOLUTE; 939 ABSOLUTE;
940 ADC; 940 ADC;
941 break; 941 break;
942 case 0x6e: /* ROR abcd */ 942 case 0x6e: /* ROR abcd */
943 ABSOLUTE; 943 ABSOLUTE;
944 ROR; 944 ROR;
945 break; 945 break;
946 case 0x70: /* BVS */ 946 case 0x70: /* BVS */
947 BRANCH((vdi & V_FLAG) != 0); 947 BRANCH((vdi & V_FLAG) != 0);
948 case 0x71: /* ADC (ab),y */ 948 case 0x71: /* ADC (ab),y */
949 INDIRECT_Y; 949 INDIRECT_Y;
950 NCYCLES_Y; 950 NCYCLES_Y;
951 ADC; 951 ADC;
952 break; 952 break;
953 case 0x75: /* ADC ab,x */ 953 case 0x75: /* ADC ab,x */
954 ZPAGE_X; 954 ZPAGE_X;
955 ADC_ZP; 955 ADC_ZP;
956 break; 956 break;
957 case 0x76: /* ROR ab,x */ 957 case 0x76: /* ROR ab,x */
958 ZPAGE_X; 958 ZPAGE_X;
959 ROR_ZP; 959 ROR_ZP;
960 break; 960 break;
961 case 0x78: /* SEI */ 961 case 0x78: /* SEI */
962 vdi |= I_FLAG; 962 vdi |= I_FLAG;
963 break; 963 break;
964 case 0x79: /* ADC abcd,y */ 964 case 0x79: /* ADC abcd,y */
965 ABSOLUTE_Y; 965 ABSOLUTE_Y;
966 NCYCLES_Y; 966 NCYCLES_Y;
967 ADC; 967 ADC;
968 break; 968 break;
969 case 0x7d: /* ADC abcd,x */ 969 case 0x7d: /* ADC abcd,x */
970 ABSOLUTE_X; 970 ABSOLUTE_X;
971 NCYCLES_X; 971 NCYCLES_X;
972 ADC; 972 ADC;
973 break; 973 break;
974 case 0x7e: /* ROR abcd,x */ 974 case 0x7e: /* ROR abcd,x */
975 ABSOLUTE_X; 975 ABSOLUTE_X;
976 ROR; 976 ROR;
977 break; 977 break;
978 case 0x81: /* STA (ab,x) */ 978 case 0x81: /* STA (ab,x) */
979 INDIRECT_X; 979 INDIRECT_X;
980 STA; 980 STA;
981 break; 981 break;
982 case 0x84: /* STY ab */ 982 case 0x84: /* STY ab */
983 ZPAGE; 983 ZPAGE;
984 STY_ZP; 984 STY_ZP;
985 break; 985 break;
986 case 0x85: /* STA ab */ 986 case 0x85: /* STA ab */
987 ZPAGE; 987 ZPAGE;
988 STA_ZP; 988 STA_ZP;
989 break; 989 break;
990 case 0x86: /* STX ab */ 990 case 0x86: /* STX ab */
991 ZPAGE; 991 ZPAGE;
992 STX_ZP; 992 STX_ZP;
993 break; 993 break;
994 case 0x88: /* DEY */ 994 case 0x88: /* DEY */
995 nz = y = (y - 1) & 0xff; 995 nz = y = (y - 1) & 0xff;
996 break; 996 break;
997 case 0x8a: /* TXA */ 997 case 0x8a: /* TXA */
998 nz = a = x; 998 nz = a = x;
999 break; 999 break;
1000 case 0x8c: /* STY abcd */ 1000 case 0x8c: /* STY abcd */
1001 ABSOLUTE; 1001 ABSOLUTE;
1002 STY; 1002 STY;
1003 break; 1003 break;
1004 case 0x8d: /* STA abcd */ 1004 case 0x8d: /* STA abcd */
1005 ABSOLUTE; 1005 ABSOLUTE;
1006 STA; 1006 STA;
1007 break; 1007 break;
1008 case 0x8e: /* STX abcd */ 1008 case 0x8e: /* STX abcd */
1009 ABSOLUTE; 1009 ABSOLUTE;
1010 STX; 1010 STX;
1011 break; 1011 break;
1012 case 0x90: /* BCC */ 1012 case 0x90: /* BCC */
1013 BRANCH(c == 0); 1013 BRANCH(c == 0);
1014 case 0x91: /* STA (ab),y */ 1014 case 0x91: /* STA (ab),y */
1015 INDIRECT_Y; 1015 INDIRECT_Y;
1016 STA; 1016 STA;
1017 break; 1017 break;
1018 case 0x94: /* STY ab,x */ 1018 case 0x94: /* STY ab,x */
1019 ZPAGE_X; 1019 ZPAGE_X;
1020 STY_ZP; 1020 STY_ZP;
1021 break; 1021 break;
1022 case 0x95: /* STA ab,x */ 1022 case 0x95: /* STA ab,x */
1023 ZPAGE_X; 1023 ZPAGE_X;
1024 STA_ZP; 1024 STA_ZP;
1025 break; 1025 break;
1026 case 0x96: /* STX ab,y */ 1026 case 0x96: /* STX ab,y */
1027 ZPAGE_Y; 1027 ZPAGE_Y;
1028 STX_ZP; 1028 STX_ZP;
1029 break; 1029 break;
1030 case 0x98: /* TYA */ 1030 case 0x98: /* TYA */
1031 nz = a = y; 1031 nz = a = y;
1032 break; 1032 break;
1033 case 0x99: /* STA abcd,y */ 1033 case 0x99: /* STA abcd,y */
1034 ABSOLUTE_Y; 1034 ABSOLUTE_Y;
1035 STA; 1035 STA;
1036 break; 1036 break;
1037 case 0x9a: /* TXS */ 1037 case 0x9a: /* TXS */
1038 s = x; 1038 s = x;
1039 break; 1039 break;
1040 case 0x9d: /* STA abcd,x */ 1040 case 0x9d: /* STA abcd,x */
1041 ABSOLUTE_X; 1041 ABSOLUTE_X;
1042 STA; 1042 STA;
1043 break; 1043 break;
1044 case 0xa0: /* LDY #ab */ 1044 case 0xa0: /* LDY #ab */
1045 nz = y = FETCH; 1045 nz = y = FETCH;
1046 break; 1046 break;
1047 case 0xa1: /* LDA (ab,x) */ 1047 case 0xa1: /* LDA (ab,x) */
1048 INDIRECT_X; 1048 INDIRECT_X;
1049 LDA; 1049 LDA;
1050 break; 1050 break;
1051 case 0xa2: /* LDX #ab */ 1051 case 0xa2: /* LDX #ab */
1052 nz = x = FETCH; 1052 nz = x = FETCH;
1053 break; 1053 break;
1054 case 0xa4: /* LDY ab */ 1054 case 0xa4: /* LDY ab */
1055 ZPAGE; 1055 ZPAGE;
1056 LDY_ZP; 1056 LDY_ZP;
1057 break; 1057 break;
1058 case 0xa5: /* LDA ab */ 1058 case 0xa5: /* LDA ab */
1059 ZPAGE; 1059 ZPAGE;
1060 LDA_ZP; 1060 LDA_ZP;
1061 break; 1061 break;
1062 case 0xa6: /* LDX ab */ 1062 case 0xa6: /* LDX ab */
1063 ZPAGE; 1063 ZPAGE;
1064 LDX_ZP; 1064 LDX_ZP;
1065 break; 1065 break;
1066 case 0xa8: /* TAY */ 1066 case 0xa8: /* TAY */
1067 nz = y = a; 1067 nz = y = a;
1068 break; 1068 break;
1069 case 0xa9: /* LDA #ab */ 1069 case 0xa9: /* LDA #ab */
1070 nz = a = FETCH; 1070 nz = a = FETCH;
1071 break; 1071 break;
1072 case 0xaa: /* TAX */ 1072 case 0xaa: /* TAX */
1073 nz = x = a; 1073 nz = x = a;
1074 break; 1074 break;
1075 case 0xac: /* LDY abcd */ 1075 case 0xac: /* LDY abcd */
1076 ABSOLUTE; 1076 ABSOLUTE;
1077 LDY; 1077 LDY;
1078 break; 1078 break;
1079 case 0xad: /* LDA abcd */ 1079 case 0xad: /* LDA abcd */
1080 ABSOLUTE; 1080 ABSOLUTE;
1081 LDA; 1081 LDA;
1082 break; 1082 break;
1083 case 0xae: /* LDX abcd */ 1083 case 0xae: /* LDX abcd */
1084 ABSOLUTE; 1084 ABSOLUTE;
1085 LDX; 1085 LDX;
1086 break; 1086 break;
1087 case 0xb0: /* BCS */ 1087 case 0xb0: /* BCS */
1088 BRANCH(c != 0); 1088 BRANCH(c != 0);
1089 case 0xb1: /* LDA (ab),y */ 1089 case 0xb1: /* LDA (ab),y */
1090 INDIRECT_Y; 1090 INDIRECT_Y;
1091 NCYCLES_Y; 1091 NCYCLES_Y;
1092 LDA; 1092 LDA;
1093 break; 1093 break;
1094 case 0xb4: /* LDY ab,x */ 1094 case 0xb4: /* LDY ab,x */
1095 ZPAGE_X; 1095 ZPAGE_X;
1096 LDY_ZP; 1096 LDY_ZP;
1097 break; 1097 break;
1098 case 0xb5: /* LDA ab,x */ 1098 case 0xb5: /* LDA ab,x */
1099 ZPAGE_X; 1099 ZPAGE_X;
1100 LDA_ZP; 1100 LDA_ZP;
1101 break; 1101 break;
1102 case 0xb6: /* LDX ab,y */ 1102 case 0xb6: /* LDX ab,y */
1103 ZPAGE_Y; 1103 ZPAGE_Y;
1104 LDX_ZP; 1104 LDX_ZP;
1105 break; 1105 break;
1106 case 0xb8: /* CLV */ 1106 case 0xb8: /* CLV */
1107 vdi &= D_FLAG | I_FLAG; 1107 vdi &= D_FLAG | I_FLAG;
1108 break; 1108 break;
1109 case 0xb9: /* LDA abcd,y */ 1109 case 0xb9: /* LDA abcd,y */
1110 ABSOLUTE_Y; 1110 ABSOLUTE_Y;
1111 NCYCLES_Y; 1111 NCYCLES_Y;
1112 LDA; 1112 LDA;
1113 break; 1113 break;
1114 case 0xba: /* TSX */ 1114 case 0xba: /* TSX */
1115 nz = x = s; 1115 nz = x = s;
1116 break; 1116 break;
1117 case 0xbc: /* LDY abcd,x */ 1117 case 0xbc: /* LDY abcd,x */
1118 ABSOLUTE_X; 1118 ABSOLUTE_X;
1119 NCYCLES_X; 1119 NCYCLES_X;
1120 LDY; 1120 LDY;
1121 break; 1121 break;
1122 case 0xbd: /* LDA abcd,x */ 1122 case 0xbd: /* LDA abcd,x */
1123 ABSOLUTE_X; 1123 ABSOLUTE_X;
1124 NCYCLES_X; 1124 NCYCLES_X;
1125 LDA; 1125 LDA;
1126 break; 1126 break;
1127 case 0xbe: /* LDX abcd,y */ 1127 case 0xbe: /* LDX abcd,y */
1128 ABSOLUTE_Y; 1128 ABSOLUTE_Y;
1129 NCYCLES_Y; 1129 NCYCLES_Y;
1130 LDX; 1130 LDX;
1131 break; 1131 break;
1132 case 0xc0: /* CPY #ab */ 1132 case 0xc0: /* CPY #ab */
1133 nz = FETCH; 1133 nz = FETCH;
1134 c = (y >= nz) ? 1 : 0; 1134 c = (y >= nz) ? 1 : 0;
1135 nz = (y - nz) & 0xff; 1135 nz = (y - nz) & 0xff;
1136 break; 1136 break;
1137 case 0xc1: /* CMP (ab,x) */ 1137 case 0xc1: /* CMP (ab,x) */
1138 INDIRECT_X; 1138 INDIRECT_X;
1139 CMP; 1139 CMP;
1140 break; 1140 break;
1141 case 0xc4: /* CPY ab */ 1141 case 0xc4: /* CPY ab */
1142 ZPAGE; 1142 ZPAGE;
1143 CPY_ZP; 1143 CPY_ZP;
1144 break; 1144 break;
1145 case 0xc5: /* CMP ab */ 1145 case 0xc5: /* CMP ab */
1146 ZPAGE; 1146 ZPAGE;
1147 CMP_ZP; 1147 CMP_ZP;
1148 break; 1148 break;
1149 case 0xc6: /* DEC ab */ 1149 case 0xc6: /* DEC ab */
1150 ZPAGE; 1150 ZPAGE;
1151 DEC_ZP; 1151 DEC_ZP;
1152 break; 1152 break;
1153 case 0xc8: /* INY */ 1153 case 0xc8: /* INY */
1154 nz = y = (y + 1) & 0xff; 1154 nz = y = (y + 1) & 0xff;
1155 break; 1155 break;
1156 case 0xc9: /* CMP #ab */ 1156 case 0xc9: /* CMP #ab */
1157 nz = FETCH; 1157 nz = FETCH;
1158 c = (a >= nz) ? 1 : 0; 1158 c = (a >= nz) ? 1 : 0;
1159 nz = (a - nz) & 0xff; 1159 nz = (a - nz) & 0xff;
1160 break; 1160 break;
1161 case 0xca: /* DEX */ 1161 case 0xca: /* DEX */
1162 nz = x = (x - 1) & 0xff; 1162 nz = x = (x - 1) & 0xff;
1163 break; 1163 break;
1164 case 0xcc: /* CPY abcd */ 1164 case 0xcc: /* CPY abcd */
1165 ABSOLUTE; 1165 ABSOLUTE;
1166 CPY; 1166 CPY;
1167 break; 1167 break;
1168 case 0xcd: /* CMP abcd */ 1168 case 0xcd: /* CMP abcd */
1169 ABSOLUTE; 1169 ABSOLUTE;
1170 CMP; 1170 CMP;
1171 break; 1171 break;
1172 case 0xce: /* DEC abcd */ 1172 case 0xce: /* DEC abcd */
1173 ABSOLUTE; 1173 ABSOLUTE;
1174 DEC; 1174 DEC;
1175 break; 1175 break;
1176 case 0xd0: /* BNE */ 1176 case 0xd0: /* BNE */
1177 BRANCH((nz & 0xff) != 0); 1177 BRANCH((nz & 0xff) != 0);
1178 case 0xd1: /* CMP (ab),y */ 1178 case 0xd1: /* CMP (ab),y */
1179 INDIRECT_Y; 1179 INDIRECT_Y;
1180 NCYCLES_Y; 1180 NCYCLES_Y;
1181 CMP; 1181 CMP;
1182 break; 1182 break;
1183 case 0xd5: /* CMP ab,x */ 1183 case 0xd5: /* CMP ab,x */
1184 ZPAGE_X; 1184 ZPAGE_X;
1185 CMP_ZP; 1185 CMP_ZP;
1186 break; 1186 break;
1187 case 0xd6: /* DEC ab,x */ 1187 case 0xd6: /* DEC ab,x */
1188 ZPAGE_X; 1188 ZPAGE_X;
1189 DEC_ZP; 1189 DEC_ZP;
1190 break; 1190 break;
1191 case 0xd8: /* CLD */ 1191 case 0xd8: /* CLD */
1192 vdi &= V_FLAG | I_FLAG; 1192 vdi &= V_FLAG | I_FLAG;
1193 break; 1193 break;
1194 case 0xd9: /* CMP abcd,y */ 1194 case 0xd9: /* CMP abcd,y */
1195 ABSOLUTE_Y; 1195 ABSOLUTE_Y;
1196 NCYCLES_Y; 1196 NCYCLES_Y;
1197 CMP; 1197 CMP;
1198 break; 1198 break;
1199 case 0xdd: /* CMP abcd,x */ 1199 case 0xdd: /* CMP abcd,x */
1200 ABSOLUTE_X; 1200 ABSOLUTE_X;
1201 NCYCLES_X; 1201 NCYCLES_X;
1202 CMP; 1202 CMP;
1203 break; 1203 break;
1204 case 0xde: /* DEC abcd,x */ 1204 case 0xde: /* DEC abcd,x */
1205 ABSOLUTE_X; 1205 ABSOLUTE_X;
1206 DEC; 1206 DEC;
1207 break; 1207 break;
1208 case 0xe0: /* CPX #ab */ 1208 case 0xe0: /* CPX #ab */
1209 nz = FETCH; 1209 nz = FETCH;
1210 c = (x >= nz) ? 1 : 0; 1210 c = (x >= nz) ? 1 : 0;
1211 nz = (x - nz) & 0xff; 1211 nz = (x - nz) & 0xff;
1212 break; 1212 break;
1213 case 0xe1: /* SBC (ab,x) */ 1213 case 0xe1: /* SBC (ab,x) */
1214 INDIRECT_X; 1214 INDIRECT_X;
1215 SBC; 1215 SBC;
1216 break; 1216 break;
1217 case 0xe4: /* CPX ab */ 1217 case 0xe4: /* CPX ab */
1218 ZPAGE; 1218 ZPAGE;
1219 CPX_ZP; 1219 CPX_ZP;
1220 break; 1220 break;
1221 case 0xe5: /* SBC ab */ 1221 case 0xe5: /* SBC ab */
1222 ZPAGE; 1222 ZPAGE;
1223 SBC_ZP; 1223 SBC_ZP;
1224 break; 1224 break;
1225 case 0xe6: /* INC ab */ 1225 case 0xe6: /* INC ab */
1226 ZPAGE; 1226 ZPAGE;
1227 INC_ZP; 1227 INC_ZP;
1228 break; 1228 break;
1229 case 0xe8: /* INX */ 1229 case 0xe8: /* INX */
1230 nz = x = (x + 1) & 0xff; 1230 nz = x = (x + 1) & 0xff;
1231 break; 1231 break;
1232 case 0xe9: /* SBC #ab */ 1232 case 0xe9: /* SBC #ab */
1233 case 0xeb: /* SBC #ab [unofficial] */ 1233 case 0xeb: /* SBC #ab [unofficial] */
1234 data = FETCH; 1234 data = FETCH;
1235 DO_SBC; 1235 DO_SBC;
1236 break; 1236 break;
1237 case 0xea: /* NOP */ 1237 case 0xea: /* NOP */
1238 case 0x1a: /* NOP [unofficial] */ 1238 case 0x1a: /* NOP [unofficial] */
1239 case 0x3a: 1239 case 0x3a:
1240 case 0x5a: 1240 case 0x5a:
1241 case 0x7a: 1241 case 0x7a:
1242 case 0xda: 1242 case 0xda:
1243 case 0xfa: 1243 case 0xfa:
1244 break; 1244 break;
1245 case 0xec: /* CPX abcd */ 1245 case 0xec: /* CPX abcd */
1246 ABSOLUTE; 1246 ABSOLUTE;
1247 CPX; 1247 CPX;
1248 break; 1248 break;
1249 case 0xed: /* SBC abcd */ 1249 case 0xed: /* SBC abcd */
1250 ABSOLUTE; 1250 ABSOLUTE;
1251 SBC; 1251 SBC;
1252 break; 1252 break;
1253 case 0xee: /* INC abcd */ 1253 case 0xee: /* INC abcd */
1254 ABSOLUTE; 1254 ABSOLUTE;
1255 INC; 1255 INC;
1256 break; 1256 break;
1257 case 0xf0: /* BEQ */ 1257 case 0xf0: /* BEQ */
1258 BRANCH((nz & 0xff) == 0); 1258 BRANCH((nz & 0xff) == 0);
1259 case 0xf1: /* SBC (ab),y */ 1259 case 0xf1: /* SBC (ab),y */
1260 INDIRECT_Y; 1260 INDIRECT_Y;
1261 NCYCLES_Y; 1261 NCYCLES_Y;
1262 SBC; 1262 SBC;
1263 break; 1263 break;
1264 case 0xf5: /* SBC ab,x */ 1264 case 0xf5: /* SBC ab,x */
1265 ZPAGE_X; 1265 ZPAGE_X;
1266 SBC_ZP; 1266 SBC_ZP;
1267 break; 1267 break;
1268 case 0xf6: /* INC ab,x */ 1268 case 0xf6: /* INC ab,x */
1269 ZPAGE_X; 1269 ZPAGE_X;
1270 INC_ZP; 1270 INC_ZP;
1271 break; 1271 break;
1272 case 0xf8: /* SED */ 1272 case 0xf8: /* SED */
1273 vdi |= D_FLAG; 1273 vdi |= D_FLAG;
1274 break; 1274 break;
1275 case 0xf9: /* SBC abcd,y */ 1275 case 0xf9: /* SBC abcd,y */
1276 ABSOLUTE_Y; 1276 ABSOLUTE_Y;
1277 NCYCLES_Y; 1277 NCYCLES_Y;
1278 SBC; 1278 SBC;
1279 break; 1279 break;
1280 case 0xfd: /* SBC abcd,x */ 1280 case 0xfd: /* SBC abcd,x */
1281 ABSOLUTE_X; 1281 ABSOLUTE_X;
1282 NCYCLES_X; 1282 NCYCLES_X;
1283 SBC; 1283 SBC;
1284 break; 1284 break;
1285 case 0xfe: /* INC abcd,x */ 1285 case 0xfe: /* INC abcd,x */
1286 ABSOLUTE_X; 1286 ABSOLUTE_X;
1287 INC; 1287 INC;
1288 break; 1288 break;
1289 } 1289 }
1290 } 1290 }
1291 ast _ cpu_pc = pc; 1291 ast _ cpu_pc = pc;
1292 ast _ cpu_nz = nz; 1292 ast _ cpu_nz = nz;
1293 ast _ cpu_a = a; 1293 ast _ cpu_a = a;
1294 ast _ cpu_x = x; 1294 ast _ cpu_x = x;
1295 ast _ cpu_y = y; 1295 ast _ cpu_y = y;
1296 ast _ cpu_c = c; 1296 ast _ cpu_c = c;
1297 ast _ cpu_s = s; 1297 ast _ cpu_s = s;
1298 ast _ cpu_vdi = vdi; 1298 ast _ cpu_vdi = vdi;
1299 ast _ cycle -= cycle_limit; 1299 ast _ cycle -= cycle_limit;
1300 if (ast _ timer1_cycle != NEVER) 1300 if (ast _ timer1_cycle != NEVER)
1301 ast _ timer1_cycle -= cycle_limit; 1301 ast _ timer1_cycle -= cycle_limit;
1302 if (ast _ timer2_cycle != NEVER) 1302 if (ast _ timer2_cycle != NEVER)
1303 ast _ timer2_cycle -= cycle_limit; 1303 ast _ timer2_cycle -= cycle_limit;
1304 if (ast _ timer4_cycle != NEVER) 1304 if (ast _ timer4_cycle != NEVER)
1305 ast _ timer4_cycle -= cycle_limit; 1305 ast _ timer4_cycle -= cycle_limit;
1306} 1306}
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-17 22:10:22 +0000