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-rw-r--r--utils/regtools/desc/regs-atj213x.xml104
1 files changed, 55 insertions, 49 deletions
diff --git a/utils/regtools/desc/regs-atj213x.xml b/utils/regtools/desc/regs-atj213x.xml
index 6a7831a9a3..cca7db9fc0 100644
--- a/utils/regtools/desc/regs-atj213x.xml
+++ b/utils/regtools/desc/regs-atj213x.xml
@@ -235,14 +235,15 @@
235 <addr name="IRQPD" addr="0x8"/> 235 <addr name="IRQPD" addr="0x8"/>
236 </reg> 236 </reg>
237 <reg name="DMA_MODE" desc=""> 237 <reg name="DMA_MODE" desc="">
238 <addr name="DMA0_MODE" addr="0x100"/> 238 <formula string="0x100+n*0x20"/>
239 <addr name="DMA1_MODE" addr="0x200"/> 239 <addr name="DMA_MODE0" addr="0x100"/>
240 <addr name="DMA2_MODE" addr="0x300"/> 240 <addr name="DMA_MODE1" addr="0x120"/>
241 <addr name="DMA3_MODE" addr="0x400"/> 241 <addr name="DMA_MODE2" addr="0x140"/>
242 <addr name="DMA4_MODE" addr="0x500"/> 242 <addr name="DMA_MODE3" addr="0x160"/>
243 <addr name="DMA5_MODE" addr="0x600"/> 243 <addr name="DMA_MODE4" addr="0x180"/>
244 <addr name="DMA6_MODE" addr="0x700"/> 244 <addr name="DMA_MODE5" addr="0x1a0"/>
245 <addr name="DMA7_MODE" addr="0x800"/> 245 <addr name="DMA_MODE6" addr="0x1c0"/>
246 <addr name="DMA_MODE7" addr="0x1e0"/>
246 <field name="DBURLEN" desc="Destination burst length. If burst lenght is 4 or 8 DDIR must be 0, DFXA must be 0, DDSP must be 0, DCOL must be 0. Burst must not cross a 1kB address boundary." bitrange="31:29"> 247 <field name="DBURLEN" desc="Destination burst length. If burst lenght is 4 or 8 DDIR must be 0, DFXA must be 0, DDSP must be 0, DCOL must be 0. Burst must not cross a 1kB address boundary." bitrange="31:29">
247 <value name="SINGLE" value="0x0" desc=""/> 248 <value name="SINGLE" value="0x0" desc=""/>
248 <value name="INCR4" value="0x3" desc=""/> 249 <value name="INCR4" value="0x3" desc=""/>
@@ -304,54 +305,59 @@
304 <field name="SFXS" desc="Source Fix Size. If DFXS=0, DMA will transfer in 8bit mode when remain counter is less than STRANWID. If SFXS=1, DMA will always transfer in STRANWID." bitrange="0:0"/> 305 <field name="SFXS" desc="Source Fix Size. If DFXS=0, DMA will transfer in 8bit mode when remain counter is less than STRANWID. If SFXS=1, DMA will always transfer in STRANWID." bitrange="0:0"/>
305 </reg> 306 </reg>
306 <reg name="DMA_SRC" desc=""> 307 <reg name="DMA_SRC" desc="">
307 <addr name="DMA0_SRC" addr="0x104"/> 308 <formula string="0x104+n*0x20"/>
308 <addr name="DMA1_SRC" addr="0x204"/> 309 <addr name="DMA_SRC0" addr="0x104"/>
309 <addr name="DMA2_SRC" addr="0x304"/> 310 <addr name="DMA_SRC1" addr="0x124"/>
310 <addr name="DMA3_SRC" addr="0x404"/> 311 <addr name="DMA_SRC2" addr="0x144"/>
311 <addr name="DMA4_SRC" addr="0x504"/> 312 <addr name="DMA_SRC3" addr="0x164"/>
312 <addr name="DMA5_SRC" addr="0x604"/> 313 <addr name="DMA_SRC4" addr="0x184"/>
313 <addr name="DMA6_SRC" addr="0x704"/> 314 <addr name="DMA_SRC5" addr="0x1a4"/>
314 <addr name="DMA7_SRC" addr="0x804"/> 315 <addr name="DMA_SRC6" addr="0x1c4"/>
316 <addr name="DMA_SRC7" addr="0x1e4"/>
315 </reg> 317 </reg>
316 <reg name="DMA_DST" desc=""> 318 <reg name="DMA_DST" desc="">
317 <addr name="DMA0_DST" addr="0x108"/> 319 <formula string="0x108+n*0x20"/>
318 <addr name="DMA1_DST" addr="0x208"/> 320 <addr name="DMA_DST0" addr="0x108"/>
319 <addr name="DMA2_DST" addr="0x308"/> 321 <addr name="DMA_DST1" addr="0x128"/>
320 <addr name="DMA3_DST" addr="0x408"/> 322 <addr name="DMA_DST2" addr="0x148"/>
321 <addr name="DMA4_DST" addr="0x508"/> 323 <addr name="DMA_DST3" addr="0x168"/>
322 <addr name="DMA5_DST" addr="0x608"/> 324 <addr name="DMA_DST4" addr="0x188"/>
323 <addr name="DMA6_DST" addr="0x708"/> 325 <addr name="DMA_DST5" addr="0x1a8"/>
324 <addr name="DMA7_DST" addr="0x808"/> 326 <addr name="DMA_DST6" addr="0x1c8"/>
327 <addr name="DMA_DST7" addr="0x1e8"/>
325 </reg> 328 </reg>
326 <reg name="DMA_CNT" desc=""> 329 <reg name="DMA_CNT" desc="">
327 <addr name="DMA0_CNT" addr="0x10c"/> 330 <formula string="0x10c+n*0x20"/>
328 <addr name="DMA1_CNT" addr="0x20c"/> 331 <addr name="DMA_CNT0" addr="0x10c"/>
329 <addr name="DMA2_CNT" addr="0x30c"/> 332 <addr name="DMA_CNT1" addr="0x12c"/>
330 <addr name="DMA3_CNT" addr="0x40c"/> 333 <addr name="DMA_CNT2" addr="0x14c"/>
331 <addr name="DMA4_CNT" addr="0x50c"/> 334 <addr name="DMA_CNT3" addr="0x16c"/>
332 <addr name="DMA5_CNT" addr="0x60c"/> 335 <addr name="DMA_CNT4" addr="0x18c"/>
333 <addr name="DMA6_CNT" addr="0x70c"/> 336 <addr name="DMA_CNT5" addr="0x1ac"/>
334 <addr name="DMA7_CNT" addr="0x80c"/> 337 <addr name="DMA_CNT6" addr="0x1cc"/>
338 <addr name="DMA_CNT7" addr="0x1ec"/>
335 </reg> 339 </reg>
336 <reg name="DMA_REM" desc=""> 340 <reg name="DMA_REM" desc="">
337 <addr name="DMA0_REM" addr="0x110"/> 341 <formula string="0x110+n*0x20"/>
338 <addr name="DMA1_REM" addr="0x210"/> 342 <addr name="DMA_REM0" addr="0x110"/>
339 <addr name="DMA2_REM" addr="0x310"/> 343 <addr name="DMA_REM1" addr="0x130"/>
340 <addr name="DMA3_REM" addr="0x410"/> 344 <addr name="DMA_REM2" addr="0x150"/>
341 <addr name="DMA4_REM" addr="0x510"/> 345 <addr name="DMA_REM3" addr="0x170"/>
342 <addr name="DMA5_REM" addr="0x610"/> 346 <addr name="DMA_REM4" addr="0x190"/>
343 <addr name="DMA6_REM" addr="0x710"/> 347 <addr name="DMA_REM5" addr="0x1b0"/>
344 <addr name="DMA7_REM" addr="0x810"/> 348 <addr name="DMA_REM6" addr="0x1d0"/>
349 <addr name="DMA_REM7" addr="0x1f0"/>
345 </reg> 350 </reg>
346 <reg name="DMA_CMD" desc=""> 351 <reg name="DMA_CMD" desc="">
347 <addr name="DMA0_CMD" addr="0x114"/> 352 <formula string="0x114+n*0x20"/>
348 <addr name="DMA1_CMD" addr="0x214"/> 353 <addr name="DMA_CMD0" addr="0x114"/>
349 <addr name="DMA2_CMD" addr="0x314"/> 354 <addr name="DMA_CMD1" addr="0x134"/>
350 <addr name="DMA3_CMD" addr="0x414"/> 355 <addr name="DMA_CMD2" addr="0x154"/>
351 <addr name="DMA4_CMD" addr="0x514"/> 356 <addr name="DMA_CMD3" addr="0x174"/>
352 <addr name="DMA5_CMD" addr="0x614"/> 357 <addr name="DMA_CMD4" addr="0x194"/>
353 <addr name="DMA6_CMD" addr="0x714"/> 358 <addr name="DMA_CMD5" addr="0x1b4"/>
354 <addr name="DMA7_CMD" addr="0x814"/> 359 <addr name="DMA_CMD6" addr="0x1d4"/>
360 <addr name="DMA_CMD7" addr="0x1f4"/>
355 </reg> 361 </reg>
356 </dev> 362 </dev>
357 <dev name="DSP" long_name="Digital Signal Processor" desc="" version="1.0"> 363 <dev name="DSP" long_name="Digital Signal Processor" desc="" version="1.0">
@@ -980,8 +986,8 @@
980 </reg> 986 </reg>
981 <reg name="FIFOCTRL" desc=""> 987 <reg name="FIFOCTRL" desc="">
982 <addr name="FIFOCTRL" addr="0x1a8"/> 988 <addr name="FIFOCTRL" addr="0x1a8"/>
983 <field name="DMA" desc="" bitrange="5:5"/>
984 <field name="CPU_ACCESS" desc="" bitrange="7:7"/> 989 <field name="CPU_ACCESS" desc="" bitrange="7:7"/>
990 <field name="DMA" desc="" bitrange="5:5"/>
985 <field name="DIR" desc="" bitrange="4:4"> 991 <field name="DIR" desc="" bitrange="4:4">
986 <value name="OUT" value="0x0" desc=""/> 992 <value name="OUT" value="0x0" desc=""/>
987 <value name="IN" value="0x1" desc=""/> 993 <value name="IN" value="0x1" desc=""/>