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-rw-r--r--firmware/target/arm/as3525/ata_sd_as3525.c18
-rw-r--r--firmware/target/arm/as3525/clock-target.h7
-rw-r--r--firmware/target/arm/as3525/debug-as3525.c10
3 files changed, 22 insertions, 13 deletions
diff --git a/firmware/target/arm/as3525/ata_sd_as3525.c b/firmware/target/arm/as3525/ata_sd_as3525.c
index 65df027c30..7567ac498d 100644
--- a/firmware/target/arm/as3525/ata_sd_as3525.c
+++ b/firmware/target/arm/as3525/ata_sd_as3525.c
@@ -103,9 +103,17 @@ static void init_pl180_controller(const int drive);
103 103
104static tCardInfo card_info[NUM_DRIVES]; 104static tCardInfo card_info[NUM_DRIVES];
105 105
106/* maximum timeouts recommanded in the SD Specification v2.00 */ 106#ifdef HAVE_MULTIDRIVE
107#define SD_MAX_READ_TIMEOUT ((AS3525_PCLK_FREQ) / 1000 * 100) /* 100 ms */ 107/* maximum timeouts recommended in the SD Specification v2.00 */
108#define SD_MAX_WRITE_TIMEOUT ((AS3525_PCLK_FREQ) / 1000 * 250) /* 250 ms */ 108#define SD_MAX_READ_TIMEOUT (((drive == SD_SLOT_AS3525)? (AS3525_PCLK_FREQ): \
109 (AS3525_IDE_FREQ)) / 1000 * 100) /* 100 ms */
110#define SD_MAX_WRITE_TIMEOUT (((drive == SD_SLOT_AS3525)? (AS3525_PCLK_FREQ): \
111 (AS3525_IDE_FREQ)) / 1000 * 250) /* 250 ms */
112#else
113/* maximum timeouts recommended in the SD Specification v2.00 */
114#define SD_MAX_READ_TIMEOUT ((AS3525_IDE_FREQ) / 1000 * 100) /* 100 ms */
115#define SD_MAX_WRITE_TIMEOUT ((AS3525_IDE_FREQ) / 1000 * 250) /* 250 ms */
116#endif
109 117
110/* for compatibility */ 118/* for compatibility */
111static long last_disk_activity = -1; 119static long last_disk_activity = -1;
@@ -306,7 +314,7 @@ static int sd_init_card(const int drive)
306 /* End of Card Identification Mode ************************************/ 314 /* End of Card Identification Mode ************************************/
307 315
308 316
309 /* full speed for controller clock MCICLK = MCLK = PCLK = 62 MHz */ 317 /* full speed for controller clock MCICLK = MCLK = PCLK = IDECLK = 62 MHz */
310 MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* FIXME: 50 MHz is spec limit */ 318 MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* FIXME: 50 MHz is spec limit */
311 mci_delay(); 319 mci_delay();
312 320
@@ -612,7 +620,7 @@ static int sd_select_bank(signed char bank)
612 DMA_PERI_SD, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, 620 DMA_PERI_SD, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8,
613 NULL); 621 NULL);
614 622
615 MCI_DATA_TIMER(INTERNAL_AS3525) = SD_MAX_WRITE_TIMEOUT; 623 MCI_DATA_TIMER(INTERNAL_AS3525) = ((AS3525_IDE_FREQ) / 1000 * 250) /* 250 ms */;
616 MCI_DATA_LENGTH(INTERNAL_AS3525) = 512; 624 MCI_DATA_LENGTH(INTERNAL_AS3525) = 512;
617 MCI_DATA_CTRL(INTERNAL_AS3525) = (1<<0) /* enable */ | 625 MCI_DATA_CTRL(INTERNAL_AS3525) = (1<<0) /* enable */ |
618 (0<<1) /* transfer direction */ | 626 (0<<1) /* transfer direction */ |
diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h
index 560e067510..319b9f57f0 100644
--- a/firmware/target/arm/as3525/clock-target.h
+++ b/firmware/target/arm/as3525/clock-target.h
@@ -113,14 +113,15 @@
113 #define AS3525_DBOP_DIV (CLK_DIV(AS3525_PCLK_FREQ, AS3525_DBOP_FREQ) - 1) /*div=1/(n+1)*/ 113 #define AS3525_DBOP_DIV (CLK_DIV(AS3525_PCLK_FREQ, AS3525_DBOP_FREQ) - 1) /*div=1/(n+1)*/
114 #define AS3525_I2C_PRESCALER CLK_DIV(AS3525_PCLK_FREQ, AS3525_I2C_FREQ) 114 #define AS3525_I2C_PRESCALER CLK_DIV(AS3525_PCLK_FREQ, AS3525_I2C_FREQ)
115 #define AS3525_I2C_FREQ 400000 115 #define AS3525_I2C_FREQ 400000
116
117 /* For now use same divider for ident frequencies on both internal and uSD cards */
116 #define AS3525_SD_IDENT_DIV ((CLK_DIV(AS3525_PCLK_FREQ, AS3525_SD_IDENT_FREQ) / 2) - 1) 118 #define AS3525_SD_IDENT_DIV ((CLK_DIV(AS3525_PCLK_FREQ, AS3525_SD_IDENT_FREQ) / 2) - 1)
117 #define AS3525_SD_IDENT_FREQ 400000 /* must be between 100 & 400 kHz */ 119 #define AS3525_SD_IDENT_FREQ 400000 /* must be between 100 & 400 kHz */
118 120
119#define AS3525_IDE_SEL AS3525_CLK_PLLA /* Input Source */ 121#define AS3525_IDE_SEL AS3525_CLK_PLLA /* Input Source */
120#define AS3525_IDE_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1)/*div=1/(n+1)*/ 122#define AS3525_IDE_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1)/*div=1/(n+1)*/
121#define AS3525_IDE_FREQ 90000000 /* The OF uses 66MHz maximal freq 123 /* for now use IDECLK == PCLK for consistency */
122 but sd transfers fail on some 124#define AS3525_IDE_FREQ AS3525_PCLK_FREQ /* The OF uses 66MHz maximal freq */
123 players with this limit */
124 125
125//#define AS3525_USB_SEL AS3525_CLK_PLLA /* Input Source */ 126//#define AS3525_USB_SEL AS3525_CLK_PLLA /* Input Source */
126//#define AS3525_USB_DIV /* div = 1/(n=0?1:2n)*/ 127//#define AS3525_USB_DIV /* div = 1/(n=0?1:2n)*/
diff --git a/firmware/target/arm/as3525/debug-as3525.c b/firmware/target/arm/as3525/debug-as3525.c
index d8d3e013e2..4775278102 100644
--- a/firmware/target/arm/as3525/debug-as3525.c
+++ b/firmware/target/arm/as3525/debug-as3525.c
@@ -183,9 +183,9 @@ int calc_freq(int clk)
183 if(!(MCI_NAND & (1<<8))) 183 if(!(MCI_NAND & (1<<8)))
184 return 0; 184 return 0;
185 else if(MCI_NAND & (1<<10)) 185 else if(MCI_NAND & (1<<10))
186 return calc_freq(CLK_PCLK); 186 return calc_freq(CLK_IDE);
187 else 187 else
188 return calc_freq(CLK_PCLK)/(((MCI_NAND & 0xff)+1)*2); 188 return calc_freq(CLK_IDE)/(((MCI_NAND & 0xff)+1)*2);
189 case CLK_SD_MCLK_MSD: 189 case CLK_SD_MCLK_MSD:
190 if(!(MCI_SD & (1<<8))) 190 if(!(MCI_SD & (1<<8)))
191 return 0; 191 return 0;
@@ -222,7 +222,7 @@ bool __dbg_hw_info(void)
222{ 222{
223 int line; 223 int line;
224 int last_nand = 0; 224 int last_nand = 0;
225#if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2) 225#ifdef HAVE_MULTIDRIVE
226 int last_sd = 0; 226 int last_sd = 0;
227#endif 227#endif
228 228
@@ -293,10 +293,10 @@ bool __dbg_hw_info(void)
293 last_nand = MCI_NAND; 293 last_nand = MCI_NAND;
294 /* MCLK == PCLK */ 294 /* MCLK == PCLK */
295 lcd_putsf(0, line++, "SD :%3dMHz %3dMHz", 295 lcd_putsf(0, line++, "SD :%3dMHz %3dMHz",
296 ((last_nand ? (AS3525_PCLK_FREQ/ 1000000): 0) / 296 ((last_nand ? (AS3525_IDE_FREQ/ 1000000): 0) /
297 ((last_nand & MCI_CLOCK_BYPASS)? 1:(((last_nand & 0xff)+1) * 2))), 297 ((last_nand & MCI_CLOCK_BYPASS)? 1:(((last_nand & 0xff)+1) * 2))),
298 calc_freq(CLK_SD_MCLK_NAND)/1000000); 298 calc_freq(CLK_SD_MCLK_NAND)/1000000);
299#if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2) 299#ifdef HAVE_MULTIDRIVE
300 if(MCI_SD) 300 if(MCI_SD)
301 last_sd = MCI_SD; 301 last_sd = MCI_SD;
302 lcd_putsf(0, line++, "uSD :%3dMHz %3dMHz", 302 lcd_putsf(0, line++, "uSD :%3dMHz %3dMHz",