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-rw-r--r--firmware/target/mips/mmu-mips.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/firmware/target/mips/mmu-mips.c b/firmware/target/mips/mmu-mips.c
index 35c47207dd..4f2de528bd 100644
--- a/firmware/target/mips/mmu-mips.c
+++ b/firmware/target/mips/mmu-mips.c
@@ -222,6 +222,22 @@ void discard_dcache_range(const void *base, unsigned int size)
222 char *ptr = CACHEALIGN_DOWN((char*)base); 222 char *ptr = CACHEALIGN_DOWN((char*)base);
223 char *end = CACHEALIGN_UP((char*)base + size); 223 char *end = CACHEALIGN_UP((char*)base + size);
224 224
225 /* If the start of the buffer is unaligned, write
226 back that cacheline and shrink up the region
227 to discard. */
228 if (base != ptr) {
229 __CACHE_OP(DCHitWBInv, ptr);
230 ptr += CACHEALIGN_SIZE;
231 }
232
233 /* If the end of the buffer is unaligned, write back that
234 cacheline and shrink down the region to discard. */
235 if (ptr != end && (end !=((char*)base + size))) {
236 end -= CACHEALIGN_SIZE;
237 __CACHE_OP(DCHitWBInv, ptr);
238 }
239
240 /* Finally, discard whatever is left */
225 for(; ptr != end; ptr += CACHEALIGN_SIZE) 241 for(; ptr != end; ptr += CACHEALIGN_SIZE)
226 __CACHE_OP(DCHitInv, ptr); 242 __CACHE_OP(DCHitInv, ptr);
227 243