1 files changed, 53 insertions, 49 deletions
diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.h b/firmware/target/arm/as3525/usb-drv-as3525v2.h
index 72dd8a0b5a..4e88530373 100644
--- a/firmware/target/arm/as3525/usb-drv-as3525v2.h
+++ b/firmware/target/arm/as3525/usb-drv-as3525v2.h
@@ -25,34 +25,36 @@
 #define USB_DEVICE                  (USB_BASE + 0x0800)   /** USB Device base address */
+#define USB_BASE_REG(offset) (*(volatile unsigned long *)(USB_BASE + offset))
 /**
 * Core Global Registers
 */
-#define USB_GOTGCTL     (*(volatile unsigned long *)(USB_BASE + 0x000)) /** OTG Control and Status Register */
+#define USB_GOTGCTL     USB_BASE_REG(0x000) /** OTG Control and Status Register */
-#define USB_GOTGINT     (*(volatile unsigned long *)(USB_BASE + 0x004)) /** OTG Interrupt Register */
+#define USB_GOTGINT     USB_BASE_REG(0x004) /** OTG Interrupt Register */
-#define USB_GAHBCFG     (*(volatile unsigned long *)(USB_BASE + 0x008)) /** Core AHB Configuration Register */
+#define USB_GAHBCFG     USB_BASE_REG(0x008) /** Core AHB Configuration Register */
-#define USB_GUSBCFG     (*(volatile unsigned long *)(USB_BASE + 0x00C)) /** Core USB Configuration Register */
+#define USB_GUSBCFG     USB_BASE_REG(0x00C) /** Core USB Configuration Register */
-#define USB_GRSTCTL     (*(volatile unsigned long *)(USB_BASE + 0x010)) /** Core Reset Register */
+#define USB_GRSTCTL     USB_BASE_REG(0x010) /** Core Reset Register */
-#define USB_GINTSTS     (*(volatile unsigned long *)(USB_BASE + 0x014)) /** Core Interrupt Register */
+#define USB_GINTSTS     USB_BASE_REG(0x014) /** Core Interrupt Register */
-#define USB_GINTMSK     (*(volatile unsigned long *)(USB_BASE + 0x018)) /** Core Interrupt Mask Register */
+#define USB_GINTMSK     USB_BASE_REG(0x018) /** Core Interrupt Mask Register */
-#define USB_GRXSTSR     (*(volatile unsigned long *)(USB_BASE + 0x01C)) /** Receive Status Debug Read Register (Read Only) */
+#define USB_GRXSTSR     USB_BASE_REG(0x01C) /** Receive Status Debug Read Register (Read Only) */
-#define USB_GRXSTSP     (*(volatile unsigned long *)(USB_BASE + 0x020)) /** Receive Status Read /Pop Register (Read Only) */
+#define USB_GRXSTSP     USB_BASE_REG(0x020) /** Receive Status Read /Pop Register (Read Only) */
-#define USB_GRXFSIZ     (*(volatile unsigned long *)(USB_BASE + 0x024)) /** Receive FIFO Size Register */
+#define USB_GRXFSIZ     USB_BASE_REG(0x024) /** Receive FIFO Size Register */
-#define USB_GNPTXFSIZ   (*(volatile unsigned long *)(USB_BASE + 0x028)) /** Periodic Transmit FIFO Size Register */
+#define USB_GNPTXFSIZ   USB_BASE_REG(0x028) /** Periodic Transmit FIFO Size Register */
-#define USB_GNPTXSTS    (*(volatile unsigned long *)(USB_BASE + 0x02C)) /** Non-Periodic Transmit FIFO/Queue Status Register */
+#define USB_GNPTXSTS    USB_BASE_REG(0x02C) /** Non-Periodic Transmit FIFO/Queue Status Register */
-#define USB_GI2CCTL     (*(volatile unsigned long *)(USB_BASE + 0x030)) /** I2C Access Register */
+#define USB_GI2CCTL     USB_BASE_REG(0x030) /** I2C Access Register */
-#define USB_GPVNDCTL    (*(volatile unsigned long *)(USB_BASE + 0x034)) /** PHY Vendor Control Register */
+#define USB_GPVNDCTL    USB_BASE_REG(0x034) /** PHY Vendor Control Register */
-#define USB_GGPIO       (*(volatile unsigned long *)(USB_BASE + 0x038)) /** General Purpose Input/Output Register */
+#define USB_GGPIO       USB_BASE_REG(0x038) /** General Purpose Input/Output Register */
-#define USB_GUID        (*(volatile unsigned long *)(USB_BASE + 0x03C)) /** User ID Register */
+#define USB_GUID        USB_BASE_REG(0x03C) /** User ID Register */
-#define USB_GSNPSID     (*(volatile unsigned long *)(USB_BASE + 0x040)) /** Synopsys ID Register */
+#define USB_GSNPSID     USB_BASE_REG(0x040) /** Synopsys ID Register */
-#define USB_GHWCFG1     (*(volatile unsigned long *)(USB_BASE + 0x044)) /** User HW Config1 Register */
+#define USB_GHWCFG1     USB_BASE_REG(0x044) /** User HW Config1 Register */
-#define USB_GHWCFG2     (*(volatile unsigned long *)(USB_BASE + 0x048)) /** User HW Config2 Register */
+#define USB_GHWCFG2     USB_BASE_REG(0x048) /** User HW Config2 Register */
-#define USB_GHWCFG3     (*(volatile unsigned long *)(USB_BASE + 0x04C)) /** User HW Config3 Register */
+#define USB_GHWCFG3     USB_BASE_REG(0x04C) /** User HW Config3 Register */
-#define USB_GHWCFG4     (*(volatile unsigned long *)(USB_BASE + 0x050)) /** User HW Config4 Register */
+#define USB_GHWCFG4     USB_BASE_REG(0x050) /** User HW Config4 Register */
 /* 1<=ep<=15, don't use ep=0 !!! */
 /** Device IN Endpoint Transmit FIFO (ep) Size Register */
-#define USB_DIEPTXFSIZ(ep)  (*(volatile unsigned long *)(USB_BASE + 0x100 + 4 * (ep)))
+#define USB_DIEPTXFSIZ(ep)  USB_BASE_REG(0x100 + 4 * (ep))
 /** Build the content of a FIFO size register like USB_DIEPTXFSIZ(i) and USB_GNPTXFSIZ*/
 #define USB_MAKE_FIFOSIZE_DATA(startadr, depth) \
@@ -161,24 +163,26 @@
 /**
 * Device Registers Base Addresses
 */
-#define USB_DCFG        (*(volatile unsigned long *)(USB_DEVICE + 0x00)) /** Device Configuration Register */
+#define USB_DEV_REG(offset) (*(volatile unsigned long *)(USB_DEVICE + offset))
-#define USB_DCTL        (*(volatile unsigned long *)(USB_DEVICE + 0x04)) /** Device Control Register */
-#define USB_DSTS        (*(volatile unsigned long *)(USB_DEVICE + 0x08)) /** Device Status Register */
+#define USB_DCFG        USB_DEV_REG(0x00) /** Device Configuration Register */
-#define USB_DIEPMSK     (*(volatile unsigned long *)(USB_DEVICE + 0x10)) /** Device IN Endpoint Common Interrupt Mask Register */
+#define USB_DCTL        USB_DEV_REG(0x04) /** Device Control Register */
-#define USB_DOEPMSK     (*(volatile unsigned long *)(USB_DEVICE + 0x14)) /** Device OUT Endpoint Common Interrupt Mask Register */
+#define USB_DSTS        USB_DEV_REG(0x08) /** Device Status Register */
-#define USB_DAINT       (*(volatile unsigned long *)(USB_DEVICE + 0x18)) /** Device All Endpoints Interrupt Register */
+#define USB_DIEPMSK     USB_DEV_REG(0x10) /** Device IN Endpoint Common Interrupt Mask Register */
-#define USB_DAINTMSK    (*(volatile unsigned long *)(USB_DEVICE + 0x1C)) /** Device Endpoints Interrupt Mask Register */
+#define USB_DOEPMSK     USB_DEV_REG(0x14) /** Device OUT Endpoint Common Interrupt Mask Register */
-#define USB_DTKNQR1     (*(volatile unsigned long *)(USB_DEVICE + 0x20)) /** Device IN Token Sequence Learning Queue Read Register 1 */
+#define USB_DAINT       USB_DEV_REG(0x18) /** Device All Endpoints Interrupt Register */
-#define USB_DTKNQR2     (*(volatile unsigned long *)(USB_DEVICE + 0x24)) /** Device IN Token Sequence Learning Queue Register 2 */
+#define USB_DAINTMSK    USB_DEV_REG(0x1C) /** Device Endpoints Interrupt Mask Register */
-#define USB_DTKNQP      (*(volatile unsigned long *)(USB_DEVICE + 0x28)) /** Device IN Token Queue Pop register */
+#define USB_DTKNQR1     USB_DEV_REG(0x20) /** Device IN Token Sequence Learning Queue Read Register 1 */
+#define USB_DTKNQR2     USB_DEV_REG(0x24) /** Device IN Token Sequence Learning Queue Register 2 */
+#define USB_DTKNQP      USB_DEV_REG(0x28) /** Device IN Token Queue Pop register */
 /* fixme: those registers are not present in usb_registers.h but are in dwc_otgh_regs.h.
 *        the previous registers exists but has a different name :( */
-#define USB_DVBUSDIS    (*(volatile unsigned long *)(USB_DEVICE + 0x28)) /** Device VBUS discharge register*/
+#define USB_DVBUSDIS    USB_DEV_REG(0x28) /** Device VBUS discharge register*/
-#define USB_DVBUSPULSE  (*(volatile unsigned long *)(USB_DEVICE + 0x2C)) /** Device VBUS pulse register */
+#define USB_DVBUSPULSE  USB_DEV_REG(0x2C) /** Device VBUS pulse register */
-#define USB_DTKNQR3     (*(volatile unsigned long *)(USB_DEVICE + 0x30)) /** Device IN Token Queue Read Register 3 (RO) */
+#define USB_DTKNQR3     USB_DEV_REG(0x30) /** Device IN Token Queue Read Register 3 (RO) */
-#define USB_DTHRCTL     (*(volatile unsigned long *)(USB_DEVICE + 0x30)) /** Device Thresholding control register */
+#define USB_DTHRCTL     USB_DEV_REG(0x30) /** Device Thresholding control register */
-#define USB_DTKNQR4     (*(volatile unsigned long *)(USB_DEVICE + 0x34)) /** Device IN Token Queue Read Register 4 (RO) */
+#define USB_DTKNQR4     USB_DEV_REG(0x34) /** Device IN Token Queue Read Register 4 (RO) */
-#define USB_FFEMPTYMSK  (*(volatile unsigned long *)(USB_DEVICE + 0x34)) /** Device IN EPs empty Inr. Mask Register */
+#define USB_FFEMPTYMSK  USB_DEV_REG(0x34) /** Device IN EPs empty Inr. Mask Register */
 #define USB_DCTL_rmtwkupsig                 (1 << 0) /** Remote Wakeup */
 #define USB_DCTL_sftdiscon                  (1 << 1) /** Soft Disconnect */
@@ -227,15 +231,15 @@
 /* 0<=ep<=15, you can use ep=0 */
 /** Device IN Endpoint (ep) Control Register */
-#define USB_DIEPCTL(ep)     (*(volatile unsigned long *)(USB_DEVICE + 0x100 + (ep) * 0x20))
+#define USB_DIEPCTL(ep)     USB_DEV_REG(0x100 + (ep) * 0x20)
 /** Device IN Endpoint (ep) Interrupt Register */
-#define USB_DIEPINT(ep)     (*(volatile unsigned long *)(USB_DEVICE + 0x100 + (ep) * 0x20 + 0x8))
+#define USB_DIEPINT(ep)     USB_DEV_REG(0x100 + (ep) * 0x20 + 0x8)
 /** Device IN Endpoint (ep) Transfer Size Register */
-#define USB_DIEPTSIZ(ep)    (*(volatile unsigned long *)(USB_DEVICE + 0x100 + (ep) * 0x20 + 0x10))
+#define USB_DIEPTSIZ(ep)    USB_DEV_REG(0x100 + (ep) * 0x20 + 0x10)
 /** Device IN Endpoint (ep) DMA Address Register */
-#define USB_DIEPDMA(ep)     (*(volatile unsigned long *)(USB_DEVICE + 0x100 + (ep) * 0x20 + 0x14))
+#define USB_DIEPDMA(ep)     USB_DEV_REG(0x100 + (ep) * 0x20 + 0x14)
 /** Device IN Endpoint (ep) Transmit FIFO Status Register */
-#define USB_DTXFSTS(ep)     (*(volatile unsigned long *)(USB_DEVICE + 0x100 + (ep) * 0x20 + 0x18))
+#define USB_DTXFSTS(ep)     USB_DEV_REG(0x100 + (ep) * 0x20 + 0x18)
 /* the following also apply to DIEPMSK */
 #define USB_DIEPINT_xfercompl       (1 << 0) /** Transfer complete */
@@ -256,17 +260,17 @@
 /* 0<=ep<=15, you can use ep=0 */
 /** Device OUT Endpoint (ep) Control Register */
-#define USB_DOEPCTL(ep)     (*(volatile unsigned long *)(USB_DEVICE + 0x300 + (ep) * 0x20))
+#define USB_DOEPCTL(ep)     USB_DEV_REG(0x300 + (ep) * 0x20)
 /** Device OUT Endpoint (ep) Frame number Register */
-#define USB_DOEPFN(ep)      (*(volatile unsigned long *)(USB_DEVICE + 0x300 + (ep) * 0x20 + 0x4))
+#define USB_DOEPFN(ep)      USB_DEV_REG(0x300 + (ep) * 0x20 + 0x4)
 /** Device Endpoint (ep) Interrupt Register */
-#define USB_DOEPINT(ep)     (*(volatile unsigned long *)(USB_DEVICE + 0x300 + (ep) * 0x20 + 0x8))
+#define USB_DOEPINT(ep)     USB_DEV_REG(0x300 + (ep) * 0x20 + 0x8)
 /** Device OUT Endpoint (ep) Transfer Size Register */
-#define USB_DOEPTSIZ(ep)    (*(volatile unsigned long *)(USB_DEVICE + 0x300 + (ep) * 0x20 + 0x10))
+#define USB_DOEPTSIZ(ep)    USB_DEV_REG(0x300 + (ep) * 0x20 + 0x10)
 /** Device Endpoint (ep) DMA Address Register */
-#define USB_DOEPDMA(ep)     (*(volatile unsigned long *)(USB_DEVICE + 0x300 + (ep) * 0x20 + 0x14))
+#define USB_DOEPDMA(ep)     USB_DEV_REG(0x300 + (ep) * 0x20 + 0x14)
-#define USB_PCGCCTL         (*(volatile unsigned long *)(USB_BASE + 0xE00)) /** Power and Clock Gating Control Register */
+#define USB_PCGCCTL         USB_BASE_REG(0xE00) /** Power and Clock Gating Control Register */
 /** Maximum Packet Size

diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.h b/firmware/target/arm/as3525/usb-drv-as3525v2.h index 72dd8a0b5a..4e88530373 100644 --- a/firmware/target/arm/as3525/usb-drv-as3525v2.h +++ b/firmware/target/arm/as3525/usb-drv-as3525v2.h
@@ -25,34 +25,36 @@
25		25
26	#define USB_DEVICE (USB_BASE + 0x0800) /** USB Device base address */	26	#define USB_DEVICE (USB_BASE + 0x0800) /** USB Device base address */
27		27
		28	#define USB_BASE_REG(offset) ((volatile unsigned long )(USB_BASE + offset))
		29
28	/**	30	/**
29	* Core Global Registers	31	* Core Global Registers
30	*/	32	*/
31	#define USB_GOTGCTL ((volatile unsigned long )(USB_BASE + 0x000)) /** OTG Control and Status Register */	33	#define USB_GOTGCTL USB_BASE_REG(0x000) /** OTG Control and Status Register */
32	#define USB_GOTGINT ((volatile unsigned long )(USB_BASE + 0x004)) /** OTG Interrupt Register */	34	#define USB_GOTGINT USB_BASE_REG(0x004) /** OTG Interrupt Register */
33	#define USB_GAHBCFG ((volatile unsigned long )(USB_BASE + 0x008)) /** Core AHB Configuration Register */	35	#define USB_GAHBCFG USB_BASE_REG(0x008) /** Core AHB Configuration Register */
34	#define USB_GUSBCFG ((volatile unsigned long )(USB_BASE + 0x00C)) /** Core USB Configuration Register */	36	#define USB_GUSBCFG USB_BASE_REG(0x00C) /** Core USB Configuration Register */
35	#define USB_GRSTCTL ((volatile unsigned long )(USB_BASE + 0x010)) /** Core Reset Register */	37	#define USB_GRSTCTL USB_BASE_REG(0x010) /** Core Reset Register */
36	#define USB_GINTSTS ((volatile unsigned long )(USB_BASE + 0x014)) /** Core Interrupt Register */	38	#define USB_GINTSTS USB_BASE_REG(0x014) /** Core Interrupt Register */
37	#define USB_GINTMSK ((volatile unsigned long )(USB_BASE + 0x018)) /** Core Interrupt Mask Register */	39	#define USB_GINTMSK USB_BASE_REG(0x018) /** Core Interrupt Mask Register */
38	#define USB_GRXSTSR ((volatile unsigned long )(USB_BASE + 0x01C)) /** Receive Status Debug Read Register (Read Only) */	40	#define USB_GRXSTSR USB_BASE_REG(0x01C) /** Receive Status Debug Read Register (Read Only) */
39	#define USB_GRXSTSP ((volatile unsigned long )(USB_BASE + 0x020)) /** Receive Status Read /Pop Register (Read Only) */	41	#define USB_GRXSTSP USB_BASE_REG(0x020) /** Receive Status Read /Pop Register (Read Only) */
40	#define USB_GRXFSIZ ((volatile unsigned long )(USB_BASE + 0x024)) /** Receive FIFO Size Register */	42	#define USB_GRXFSIZ USB_BASE_REG(0x024) /** Receive FIFO Size Register */
41	#define USB_GNPTXFSIZ ((volatile unsigned long )(USB_BASE + 0x028)) /** Periodic Transmit FIFO Size Register */	43	#define USB_GNPTXFSIZ USB_BASE_REG(0x028) /** Periodic Transmit FIFO Size Register */
42	#define USB_GNPTXSTS ((volatile unsigned long )(USB_BASE + 0x02C)) /** Non-Periodic Transmit FIFO/Queue Status Register */	44	#define USB_GNPTXSTS USB_BASE_REG(0x02C) /** Non-Periodic Transmit FIFO/Queue Status Register */
43	#define USB_GI2CCTL ((volatile unsigned long )(USB_BASE + 0x030)) /** I2C Access Register */	45	#define USB_GI2CCTL USB_BASE_REG(0x030) /** I2C Access Register */
44	#define USB_GPVNDCTL ((volatile unsigned long )(USB_BASE + 0x034)) /** PHY Vendor Control Register */	46	#define USB_GPVNDCTL USB_BASE_REG(0x034) /** PHY Vendor Control Register */
45	#define USB_GGPIO ((volatile unsigned long )(USB_BASE + 0x038)) /** General Purpose Input/Output Register */	47	#define USB_GGPIO USB_BASE_REG(0x038) /** General Purpose Input/Output Register */
46	#define USB_GUID ((volatile unsigned long )(USB_BASE + 0x03C)) /** User ID Register */	48	#define USB_GUID USB_BASE_REG(0x03C) /** User ID Register */
47	#define USB_GSNPSID ((volatile unsigned long )(USB_BASE + 0x040)) /** Synopsys ID Register */	49	#define USB_GSNPSID USB_BASE_REG(0x040) /** Synopsys ID Register */
48	#define USB_GHWCFG1 ((volatile unsigned long )(USB_BASE + 0x044)) /** User HW Config1 Register */	50	#define USB_GHWCFG1 USB_BASE_REG(0x044) /** User HW Config1 Register */
49	#define USB_GHWCFG2 ((volatile unsigned long )(USB_BASE + 0x048)) /** User HW Config2 Register */	51	#define USB_GHWCFG2 USB_BASE_REG(0x048) /** User HW Config2 Register */
50	#define USB_GHWCFG3 ((volatile unsigned long )(USB_BASE + 0x04C)) /** User HW Config3 Register */	52	#define USB_GHWCFG3 USB_BASE_REG(0x04C) /** User HW Config3 Register */
51	#define USB_GHWCFG4 ((volatile unsigned long )(USB_BASE + 0x050)) /** User HW Config4 Register */	53	#define USB_GHWCFG4 USB_BASE_REG(0x050) /** User HW Config4 Register */
52		54
53	/* 1<=ep<=15, don't use ep=0 !!! */	55	/* 1<=ep<=15, don't use ep=0 !!! */
54	/** Device IN Endpoint Transmit FIFO (ep) Size Register */	56	/** Device IN Endpoint Transmit FIFO (ep) Size Register */
55	#define USB_DIEPTXFSIZ(ep) ((volatile unsigned long )(USB_BASE + 0x100 + 4 * (ep)))	57	#define USB_DIEPTXFSIZ(ep) USB_BASE_REG(0x100 + 4 * (ep))
56		58
57	/** Build the content of a FIFO size register like USB_DIEPTXFSIZ(i) and USB_GNPTXFSIZ*/	59	/** Build the content of a FIFO size register like USB_DIEPTXFSIZ(i) and USB_GNPTXFSIZ*/
58	#define USB_MAKE_FIFOSIZE_DATA(startadr, depth) \	60	#define USB_MAKE_FIFOSIZE_DATA(startadr, depth) \
@@ -161,24 +163,26 @@
161	/**	163	/**
162	* Device Registers Base Addresses	164	* Device Registers Base Addresses
163	*/	165	*/
164	#define USB_DCFG ((volatile unsigned long )(USB_DEVICE + 0x00)) /** Device Configuration Register */	166	#define USB_DEV_REG(offset) ((volatile unsigned long )(USB_DEVICE + offset))
165	#define USB_DCTL ((volatile unsigned long )(USB_DEVICE + 0x04)) /** Device Control Register */	167
166	#define USB_DSTS ((volatile unsigned long )(USB_DEVICE + 0x08)) /** Device Status Register */	168	#define USB_DCFG USB_DEV_REG(0x00) /** Device Configuration Register */
167	#define USB_DIEPMSK ((volatile unsigned long )(USB_DEVICE + 0x10)) /** Device IN Endpoint Common Interrupt Mask Register */	169	#define USB_DCTL USB_DEV_REG(0x04) /** Device Control Register */
168	#define USB_DOEPMSK ((volatile unsigned long )(USB_DEVICE + 0x14)) /** Device OUT Endpoint Common Interrupt Mask Register */	170	#define USB_DSTS USB_DEV_REG(0x08) /** Device Status Register */
169	#define USB_DAINT ((volatile unsigned long )(USB_DEVICE + 0x18)) /** Device All Endpoints Interrupt Register */	171	#define USB_DIEPMSK USB_DEV_REG(0x10) /** Device IN Endpoint Common Interrupt Mask Register */
170	#define USB_DAINTMSK ((volatile unsigned long )(USB_DEVICE + 0x1C)) /** Device Endpoints Interrupt Mask Register */	172	#define USB_DOEPMSK USB_DEV_REG(0x14) /** Device OUT Endpoint Common Interrupt Mask Register */
171	#define USB_DTKNQR1 ((volatile unsigned long )(USB_DEVICE + 0x20)) /** Device IN Token Sequence Learning Queue Read Register 1 */	173	#define USB_DAINT USB_DEV_REG(0x18) /** Device All Endpoints Interrupt Register */
172	#define USB_DTKNQR2 ((volatile unsigned long )(USB_DEVICE + 0x24)) /** Device IN Token Sequence Learning Queue Register 2 */	174	#define USB_DAINTMSK USB_DEV_REG(0x1C) /** Device Endpoints Interrupt Mask Register */
173	#define USB_DTKNQP ((volatile unsigned long )(USB_DEVICE + 0x28)) /** Device IN Token Queue Pop register */	175	#define USB_DTKNQR1 USB_DEV_REG(0x20) /** Device IN Token Sequence Learning Queue Read Register 1 */
		176	#define USB_DTKNQR2 USB_DEV_REG(0x24) /** Device IN Token Sequence Learning Queue Register 2 */
		177	#define USB_DTKNQP USB_DEV_REG(0x28) /** Device IN Token Queue Pop register */
174	/* fixme: those registers are not present in usb_registers.h but are in dwc_otgh_regs.h.	178	/* fixme: those registers are not present in usb_registers.h but are in dwc_otgh_regs.h.
175	* the previous registers exists but has a different name :( */	179	* the previous registers exists but has a different name :( */
176	#define USB_DVBUSDIS ((volatile unsigned long )(USB_DEVICE + 0x28)) /** Device VBUS discharge register*/	180	#define USB_DVBUSDIS USB_DEV_REG(0x28) /** Device VBUS discharge register*/
177	#define USB_DVBUSPULSE ((volatile unsigned long )(USB_DEVICE + 0x2C)) /** Device VBUS pulse register */	181	#define USB_DVBUSPULSE USB_DEV_REG(0x2C) /** Device VBUS pulse register */
178	#define USB_DTKNQR3 ((volatile unsigned long )(USB_DEVICE + 0x30)) /** Device IN Token Queue Read Register 3 (RO) */	182	#define USB_DTKNQR3 USB_DEV_REG(0x30) /** Device IN Token Queue Read Register 3 (RO) */
179	#define USB_DTHRCTL ((volatile unsigned long )(USB_DEVICE + 0x30)) /** Device Thresholding control register */	183	#define USB_DTHRCTL USB_DEV_REG(0x30) /** Device Thresholding control register */
180	#define USB_DTKNQR4 ((volatile unsigned long )(USB_DEVICE + 0x34)) /** Device IN Token Queue Read Register 4 (RO) */	184	#define USB_DTKNQR4 USB_DEV_REG(0x34) /** Device IN Token Queue Read Register 4 (RO) */
181	#define USB_FFEMPTYMSK ((volatile unsigned long )(USB_DEVICE + 0x34)) /** Device IN EPs empty Inr. Mask Register */	185	#define USB_FFEMPTYMSK USB_DEV_REG(0x34) /** Device IN EPs empty Inr. Mask Register */
182		186
183	#define USB_DCTL_rmtwkupsig (1 << 0) /** Remote Wakeup */	187	#define USB_DCTL_rmtwkupsig (1 << 0) /** Remote Wakeup */
184	#define USB_DCTL_sftdiscon (1 << 1) /** Soft Disconnect */	188	#define USB_DCTL_sftdiscon (1 << 1) /** Soft Disconnect */
@@ -227,15 +231,15 @@
227		231
228	/* 0<=ep<=15, you can use ep=0 */	232	/* 0<=ep<=15, you can use ep=0 */
229	/** Device IN Endpoint (ep) Control Register */	233	/** Device IN Endpoint (ep) Control Register */
230	#define USB_DIEPCTL(ep) ((volatile unsigned long )(USB_DEVICE + 0x100 + (ep) * 0x20))	234	#define USB_DIEPCTL(ep) USB_DEV_REG(0x100 + (ep) * 0x20)
231	/** Device IN Endpoint (ep) Interrupt Register */	235	/** Device IN Endpoint (ep) Interrupt Register */
232	#define USB_DIEPINT(ep) ((volatile unsigned long )(USB_DEVICE + 0x100 + (ep) * 0x20 + 0x8))	236	#define USB_DIEPINT(ep) USB_DEV_REG(0x100 + (ep) * 0x20 + 0x8)
233	/** Device IN Endpoint (ep) Transfer Size Register */	237	/** Device IN Endpoint (ep) Transfer Size Register */
234	#define USB_DIEPTSIZ(ep) ((volatile unsigned long )(USB_DEVICE + 0x100 + (ep) * 0x20 + 0x10))	238	#define USB_DIEPTSIZ(ep) USB_DEV_REG(0x100 + (ep) * 0x20 + 0x10)
235	/** Device IN Endpoint (ep) DMA Address Register */	239	/** Device IN Endpoint (ep) DMA Address Register */
236	#define USB_DIEPDMA(ep) ((volatile unsigned long )(USB_DEVICE + 0x100 + (ep) * 0x20 + 0x14))	240	#define USB_DIEPDMA(ep) USB_DEV_REG(0x100 + (ep) * 0x20 + 0x14)
237	/** Device IN Endpoint (ep) Transmit FIFO Status Register */	241	/** Device IN Endpoint (ep) Transmit FIFO Status Register */
238	#define USB_DTXFSTS(ep) ((volatile unsigned long )(USB_DEVICE + 0x100 + (ep) * 0x20 + 0x18))	242	#define USB_DTXFSTS(ep) USB_DEV_REG(0x100 + (ep) * 0x20 + 0x18)
239		243
240	/* the following also apply to DIEPMSK */	244	/* the following also apply to DIEPMSK */
241	#define USB_DIEPINT_xfercompl (1 << 0) /** Transfer complete */	245	#define USB_DIEPINT_xfercompl (1 << 0) /** Transfer complete */
@@ -256,17 +260,17 @@
256		260
257	/* 0<=ep<=15, you can use ep=0 */	261	/* 0<=ep<=15, you can use ep=0 */
258	/** Device OUT Endpoint (ep) Control Register */	262	/** Device OUT Endpoint (ep) Control Register */
259	#define USB_DOEPCTL(ep) ((volatile unsigned long )(USB_DEVICE + 0x300 + (ep) * 0x20))	263	#define USB_DOEPCTL(ep) USB_DEV_REG(0x300 + (ep) * 0x20)
260	/** Device OUT Endpoint (ep) Frame number Register */	264	/** Device OUT Endpoint (ep) Frame number Register */
261	#define USB_DOEPFN(ep) ((volatile unsigned long )(USB_DEVICE + 0x300 + (ep) * 0x20 + 0x4))	265	#define USB_DOEPFN(ep) USB_DEV_REG(0x300 + (ep) * 0x20 + 0x4)
262	/** Device Endpoint (ep) Interrupt Register */	266	/** Device Endpoint (ep) Interrupt Register */
263	#define USB_DOEPINT(ep) ((volatile unsigned long )(USB_DEVICE + 0x300 + (ep) * 0x20 + 0x8))	267	#define USB_DOEPINT(ep) USB_DEV_REG(0x300 + (ep) * 0x20 + 0x8)
264	/** Device OUT Endpoint (ep) Transfer Size Register */	268	/** Device OUT Endpoint (ep) Transfer Size Register */
265	#define USB_DOEPTSIZ(ep) ((volatile unsigned long )(USB_DEVICE + 0x300 + (ep) * 0x20 + 0x10))	269	#define USB_DOEPTSIZ(ep) USB_DEV_REG(0x300 + (ep) * 0x20 + 0x10)
266	/** Device Endpoint (ep) DMA Address Register */	270	/** Device Endpoint (ep) DMA Address Register */
267	#define USB_DOEPDMA(ep) ((volatile unsigned long )(USB_DEVICE + 0x300 + (ep) * 0x20 + 0x14))	271	#define USB_DOEPDMA(ep) USB_DEV_REG(0x300 + (ep) * 0x20 + 0x14)
268		272
269	#define USB_PCGCCTL ((volatile unsigned long )(USB_BASE + 0xE00)) /** Power and Clock Gating Control Register */	273	#define USB_PCGCCTL USB_BASE_REG(0xE00) /** Power and Clock Gating Control Register */
270		274
271		275
272	/** Maximum Packet Size	276	/** Maximum Packet Size