summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--firmware/target/arm/as3525/clock-target.h11
1 files changed, 6 insertions, 5 deletions
diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h
index b8cb718592..1689c59448 100644
--- a/firmware/target/arm/as3525/clock-target.h
+++ b/firmware/target/arm/as3525/clock-target.h
@@ -70,8 +70,8 @@
70 * - bit 12 = unknown (always set to 1) 70 * - bit 12 = unknown (always set to 1)
71 * Fpll = Fin * F / (R * OD), where Fin = 12 MHz 71 * Fpll = Fin * F / (R * OD), where Fin = 12 MHz
72 */ 72 */
73#define AS3525_PLLA_FREQ 248000000 73#define AS3525_PLLA_FREQ 240000000
74#define AS3525_PLLA_SETTING 0x113D 74#define AS3525_PLLA_SETTING 0x113B
75 75
76#define AS3525_PLLB_FREQ 192000000 76#define AS3525_PLLB_FREQ 192000000
77#define AS3525_PLLB_SETTING 0x155F 77#define AS3525_PLLB_SETTING 0x155F
@@ -87,10 +87,11 @@
87 */ 87 */
88 88
89#ifdef SANSA_FUZEV2 89#ifdef SANSA_FUZEV2
90/* display is unbearably slow at ~24MHz */ 90/* display is unbearably slow at 24MHz
91#define AS3525_DRAM_FREQ 41333334 /* Initial DRAM frequency */ 91 * 34285715 HZ works ok but 40MHz works even better*/
92#define AS3525_DRAM_FREQ 40000000 /* Initial DRAM frequency */
92#else 93#else
93#define AS3525_DRAM_FREQ 24800000 /* Initial DRAM frequency */ 94#define AS3525_DRAM_FREQ 24000000 /* Initial DRAM frequency */
94#endif /* SANSA_FUZEV2 */ 95#endif /* SANSA_FUZEV2 */
95 96
96#else 97#else