diff options
-rw-r--r-- | firmware/export/system.h | 3 | ||||
-rw-r--r-- | firmware/system.c | 47 |
2 files changed, 40 insertions, 10 deletions
diff --git a/firmware/export/system.h b/firmware/export/system.h index 60febf3e16..f9da0d2e67 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h | |||
@@ -190,6 +190,9 @@ static inline void invalidate_icache(void) | |||
190 | 190 | ||
191 | #elif CONFIG_CPU == TCC730 | 191 | #elif CONFIG_CPU == TCC730 |
192 | 192 | ||
193 | extern void set_pll_freq(int pll_index, long freq_out); | ||
194 | |||
195 | |||
193 | extern void* volatile interrupt_vector[16] __attribute__ ((section(".idata"))); | 196 | extern void* volatile interrupt_vector[16] __attribute__ ((section(".idata"))); |
194 | 197 | ||
195 | extern void ddma_transfer(int dir, int mem, long intAddr, long extAddr, | 198 | extern void ddma_transfer(int dir, int mem, long intAddr, long extAddr, |
diff --git a/firmware/system.c b/firmware/system.c index 693c4a1434..eb6c6eedb4 100644 --- a/firmware/system.c +++ b/firmware/system.c | |||
@@ -85,25 +85,51 @@ extern int icodecopy; | |||
85 | extern int icodesize; | 85 | extern int icodesize; |
86 | extern int icodestart; | 86 | extern int icodestart; |
87 | 87 | ||
88 | /* change the CPU frequency */ | ||
89 | void set_pll_freq(int pll_index, long freq_out) { | ||
90 | volatile unsigned int* plldata; | ||
91 | volatile unsigned char* pllcon; | ||
92 | if (pll_index == 0) { | ||
93 | plldata = &PLL0DATA; | ||
94 | pllcon = &PLL0CON; | ||
95 | } else { | ||
96 | plldata = &PLL1DATA; | ||
97 | pllcon = &PLL1CON; | ||
98 | } | ||
99 | /* VC0 is 32768 Hz */ | ||
100 | #define VC0FREQ (32768L) | ||
101 | unsigned m = (freq_out / VC0FREQ) - 2; | ||
102 | /* TODO: if m is too small here, use the divider bits [0,1] */ | ||
103 | *plldata = m << 2; | ||
104 | *pllcon |= 0x1; /* activate */ | ||
105 | do { | ||
106 | } while ((*pllcon & 0x2) == 0); /* wait for stabilization */ | ||
107 | } | ||
108 | |||
88 | /* called by crt0 */ | 109 | /* called by crt0 */ |
89 | void system_init(void) | 110 | void system_init(void) |
90 | { | 111 | { |
91 | /* Disable watchdog */ | 112 | /* Disable watchdog */ |
92 | WDTEN = 0xA5; | 113 | WDTEN = 0xA5; |
114 | |||
115 | /**************** | ||
116 | * GPIO ports | ||
117 | */ | ||
118 | |||
119 | /* keep alive (?) -- clear the bit to prevent crash at start (??) */ | ||
120 | P8 = 0x00; | ||
121 | P8CON = 0x01; | ||
93 | 122 | ||
94 | /* Setup the CPU */ | 123 | /******** |
124 | * CPU | ||
125 | */ | ||
95 | 126 | ||
96 | 127 | ||
97 | /* PLL0 (cpu osc. frequency) */ | 128 | /* PLL0 (cpu osc. frequency) */ |
98 | 129 | ||
99 | #if 0 | 130 | #if 0 |
100 | PLL0DATA = 0xf98; | 131 | set_pll_freq(0, CPU_FREQ); |
101 | PLL0CON = 0x1; /* activate */ | 132 | PLL0CON |= 0x4; /* use as CPU clock */ |
102 | do { | ||
103 | asm "nop"; | ||
104 | } while ((PLL0CON & 0x2) == 0); /* wait for stabilization */ | ||
105 | |||
106 | PLL0CON = 0x5; /* use as CPU clock */ | ||
107 | 133 | ||
108 | #endif | 134 | #endif |
109 | 135 | ||
@@ -118,11 +144,12 @@ void system_init(void) | |||
118 | 144 | ||
119 | 145 | ||
120 | /*************************** | 146 | /*************************** |
121 | * Interrupt mask | 147 | * Interrupts |
122 | */ | 148 | */ |
123 | 149 | ||
124 | /* interrupt priorities ? */ | 150 | /* priorities ? */ |
125 | 151 | ||
152 | /* mask */ | ||
126 | IMR0 = 0; | 153 | IMR0 = 0; |
127 | IMR1 = 0; | 154 | IMR1 = 0; |
128 | 155 | ||