diff options
-rw-r--r-- | firmware/export/pcm_mixer.h | 4 | ||||
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/codec-jz4740.c | 1 | ||||
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/codec-jz4760.c | 1 | ||||
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c | 2 | ||||
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/pcm-jz4760.c | 2 |
5 files changed, 10 insertions, 0 deletions
diff --git a/firmware/export/pcm_mixer.h b/firmware/export/pcm_mixer.h index b418a5d347..3d255a7345 100644 --- a/firmware/export/pcm_mixer.h +++ b/firmware/export/pcm_mixer.h | |||
@@ -30,6 +30,10 @@ | |||
30 | #if CONFIG_CPU == PP5002 | 30 | #if CONFIG_CPU == PP5002 |
31 | /* There's far less time to do mixing because HW FIFOs are short */ | 31 | /* There's far less time to do mixing because HW FIFOs are short */ |
32 | #define MIX_FRAME_SAMPLES 64 | 32 | #define MIX_FRAME_SAMPLES 64 |
33 | #elif (CONFIG_CPU == JZ4760B) || (CONFIG_CPU == JZ4732) | ||
34 | /* These MIPS32r1 targets have a very high interrupt latency, which | ||
35 | unfortunately causes a lot of audio underruns under even moderate load */ | ||
36 | #define MIX_FRAME_SAMPLES 2048 | ||
33 | #elif (CONFIG_PLATFORM & PLATFORM_MAEMO5) || defined(DX50) || defined(DX90) | 37 | #elif (CONFIG_PLATFORM & PLATFORM_MAEMO5) || defined(DX50) || defined(DX90) |
34 | /* Maemo 5 needs 2048 samples for decent performance. | 38 | /* Maemo 5 needs 2048 samples for decent performance. |
35 | Otherwise the locking overhead inside gstreamer costs too much */ | 39 | Otherwise the locking overhead inside gstreamer costs too much */ |
diff --git a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c index 702f3bb50e..a41f047026 100644 --- a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c | |||
@@ -267,6 +267,7 @@ void audiohw_postinit(void) | |||
267 | 267 | ||
268 | void audiohw_init(void) | 268 | void audiohw_init(void) |
269 | { | 269 | { |
270 | __aic_play_lastsample(); /* on FIFO underflow */ | ||
270 | i2s_codec_init(); | 271 | i2s_codec_init(); |
271 | } | 272 | } |
272 | 273 | ||
diff --git a/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c b/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c index bc4286fd6a..60bfecb08c 100644 --- a/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c +++ b/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c | |||
@@ -115,6 +115,7 @@ void audiohw_init(void) | |||
115 | __cpm_start_aic(); | 115 | __cpm_start_aic(); |
116 | 116 | ||
117 | /* Init AIC */ | 117 | /* Init AIC */ |
118 | __aic_play_lastsample(); /* on FIFO underflow. Versus 0.. */ | ||
118 | __i2s_enable_sclk(); | 119 | __i2s_enable_sclk(); |
119 | __i2s_external_codec(); | 120 | __i2s_external_codec(); |
120 | __i2s_select_msbjustified(); | 121 | __i2s_select_msbjustified(); |
diff --git a/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c b/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c index 00a2b22591..ef2597ae69 100644 --- a/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c | |||
@@ -137,6 +137,8 @@ void DMA_CALLBACK(DMA_AIC_TX_CHANNEL)(void) | |||
137 | 137 | ||
138 | void pcm_play_dma_start(const void *addr, size_t size) | 138 | void pcm_play_dma_start(const void *addr, size_t size) |
139 | { | 139 | { |
140 | pcm_play_dma_stop(); | ||
141 | |||
140 | dma_enable(); | 142 | dma_enable(); |
141 | 143 | ||
142 | set_dma(addr, size); | 144 | set_dma(addr, size); |
diff --git a/firmware/target/mips/ingenic_jz47xx/pcm-jz4760.c b/firmware/target/mips/ingenic_jz47xx/pcm-jz4760.c index 59b086e4f8..098c28ecf5 100644 --- a/firmware/target/mips/ingenic_jz47xx/pcm-jz4760.c +++ b/firmware/target/mips/ingenic_jz47xx/pcm-jz4760.c | |||
@@ -128,6 +128,8 @@ void DMA_CALLBACK(DMA_AIC_TX_CHANNEL)(void) | |||
128 | 128 | ||
129 | void pcm_play_dma_start(const void *addr, size_t size) | 129 | void pcm_play_dma_start(const void *addr, size_t size) |
130 | { | 130 | { |
131 | pcm_play_dma_stop(); | ||
132 | |||
131 | __dmac_channel_enable_clk(DMA_AIC_TX_CHANNEL); | 133 | __dmac_channel_enable_clk(DMA_AIC_TX_CHANNEL); |
132 | 134 | ||
133 | set_dma(addr, size); | 135 | set_dma(addr, size); |