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-rw-r--r--firmware/export/config.h2
-rw-r--r--firmware/target/mips/ingenic_jz47xx/app.lds20
-rw-r--r--firmware/target/mips/ingenic_jz47xx/crt0.S17
-rw-r--r--firmware/target/mips/ingenic_jz47xx/system-jz4740.c2
-rw-r--r--firmware/target/mips/ingenic_jz47xx/system-jz4760.c8
5 files changed, 41 insertions, 8 deletions
diff --git a/firmware/export/config.h b/firmware/export/config.h
index d2ebbbf071..8726a8d6f4 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -1070,7 +1070,7 @@ Lyre prototype 1 */
1070 1070
1071#if (defined(CPU_PP) || (CONFIG_CPU == AS3525) || (CONFIG_CPU == AS3525v2) || \ 1071#if (defined(CPU_PP) || (CONFIG_CPU == AS3525) || (CONFIG_CPU == AS3525v2) || \
1072 (CONFIG_CPU == IMX31L) || (CONFIG_CPU == IMX233) || \ 1072 (CONFIG_CPU == IMX31L) || (CONFIG_CPU == IMX233) || \
1073 (CONFIG_CPU == RK27XX) || (CONFIG_CPU == X1000) || defined(CPU_COLDFIRE)) \ 1073 (CONFIG_CPU == RK27XX) || defined(CPU_MIPS) || defined(CPU_COLDFIRE)) \
1074 && (CONFIG_PLATFORM & PLATFORM_NATIVE) && !defined(BOOTLOADER) 1074 && (CONFIG_PLATFORM & PLATFORM_NATIVE) && !defined(BOOTLOADER)
1075/* Functions that have INIT_ATTR attached are NOT guaranteed to survive after 1075/* Functions that have INIT_ATTR attached are NOT guaranteed to survive after
1076 * root_menu() has been called. Their code may be overwritten by other data or 1076 * root_menu() has been called. Their code may be overwritten by other data or
diff --git a/firmware/target/mips/ingenic_jz47xx/app.lds b/firmware/target/mips/ingenic_jz47xx/app.lds
index cbeb7c1aaf..1d300fed82 100644
--- a/firmware/target/mips/ingenic_jz47xx/app.lds
+++ b/firmware/target/mips/ingenic_jz47xx/app.lds
@@ -1,4 +1,6 @@
1#include "config.h" 1#include "config.h"
2#define __ASSEMBLY__
3#include "cpu.h"
2 4
3OUTPUT_FORMAT("elf32-littlemips") 5OUTPUT_FORMAT("elf32-littlemips")
4OUTPUT_ARCH(MIPS) 6OUTPUT_ARCH(MIPS)
@@ -20,10 +22,15 @@ INPUT(target/mips/system-mips.o)
20/* Where the codec buffer ends, and the plugin buffer starts */ 22/* Where the codec buffer ends, and the plugin buffer starts */
21#define ENDCODECADDR (ENDAUDIOADDR + CODEC_SIZE) 23#define ENDCODECADDR (ENDAUDIOADDR + CODEC_SIZE)
22 24
25/* Place init code in the codec buffer */
26#define INITBASE ENDAUDIOADDR
27#define INITSIZE CODEC_SIZE
28
23MEMORY 29MEMORY
24{ 30{
25 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE 31 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
26 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE 32 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
33 INIT : ORIGIN = INITBASE, LENGTH = INITSIZE
27} 34}
28 35
29SECTIONS 36SECTIONS
@@ -40,6 +47,9 @@ SECTIONS
40 .text : 47 .text :
41 { 48 {
42 *(.text*); 49 *(.text*);
50#ifndef HAVE_INIT_ATTR
51 *(.init*);
52#endif
43 } > DRAM 53 } > DRAM
44 54
45 . = ALIGN(4); 55 . = ALIGN(4);
@@ -81,6 +91,16 @@ SECTIONS
81 } > IRAM 91 } > IRAM
82 _iramcopy = LOADADDR(.iram); 92 _iramcopy = LOADADDR(.iram);
83 93
94#ifdef HAVE_INIT_ATTR
95 .init :
96 {
97 _initstart = .;
98 *(.init*);
99 _initend = .;
100 } > INIT AT> DRAM
101 _initcopy = LOADADDR(.init);
102#endif
103
84 . = ALIGN(4); 104 . = ALIGN(4);
85 105
86 .stack (NOLOAD): 106 .stack (NOLOAD):
diff --git a/firmware/target/mips/ingenic_jz47xx/crt0.S b/firmware/target/mips/ingenic_jz47xx/crt0.S
index 17cd2b0405..b73a43d8f2 100644
--- a/firmware/target/mips/ingenic_jz47xx/crt0.S
+++ b/firmware/target/mips/ingenic_jz47xx/crt0.S
@@ -40,7 +40,7 @@
40 40
41 .text 41 .text
42 42
43 .extern system_main 43 .extern system_early_init
44 .extern main 44 .extern main
45 .global _start 45 .global _start
46 46
@@ -139,6 +139,19 @@ _iram_loop:
139 bne t1, t2, _iram_loop 139 bne t1, t2, _iram_loop
140 sw t3, -4(t1) 140 sw t3, -4(t1)
141 141
142#ifdef HAVE_INIT_ATTR
143 /* Copy init code */
144 la t0, _initcopy
145 la t1, _initstart
146 la t2, _initend
147_init_loop:
148 lw t3, 0(t0)
149 addiu t1, 4
150 addiu t0, 4
151 bne t1, t2, _init_loop
152 sw t3, -4(t1)
153#endif
154
142 /* 155 /*
143 ---------------------------------------------------- 156 ----------------------------------------------------
144 Clear BSS section 157 Clear BSS section
@@ -183,7 +196,7 @@ _irq_stack_loop:
183 Jump to C code 196 Jump to C code
184 ---------------------------------------------------- 197 ----------------------------------------------------
185 */ 198 */
186 jal system_main /* Init clocks etc first */ 199 jal system_early_init /* Init clocks etc first */
187 ssnop 200 ssnop
188 j main 201 j main
189 move ra, zero /* init backtrace root */ 202 move ra, zero /* init backtrace root */
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
index d2e39c0982..5aff144327 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
@@ -434,7 +434,7 @@ static void sdram_init(void)
434} 434}
435 435
436/* Gets called *before* main */ 436/* Gets called *before* main */
437void ICODE_ATTR system_main(void) 437void ICODE_ATTR system_early_init(void)
438{ 438{
439 int i; 439 int i;
440 440
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4760.c b/firmware/target/mips/ingenic_jz47xx/system-jz4760.c
index 81d3470aae..ef99048812 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/system-jz4760.c
@@ -533,7 +533,7 @@ static void serial_setbrg(void)
533 *uart_lcr = tmp; 533 *uart_lcr = tmp;
534} 534}
535 535
536int serial_preinit(void) 536static int serial_preinit(void);
537{ 537{
538 volatile u8 *uart_fcr = (volatile u8 *)(CFG_UART_BASE + OFF_FCR); 538 volatile u8 *uart_fcr = (volatile u8 *)(CFG_UART_BASE + OFF_FCR);
539 volatile u8 *uart_lcr = (volatile u8 *)(CFG_UART_BASE + OFF_LCR); 539 volatile u8 *uart_lcr = (volatile u8 *)(CFG_UART_BASE + OFF_LCR);
@@ -569,7 +569,7 @@ int serial_preinit(void)
569#define cpu_frequency CPU_FREQ 569#define cpu_frequency CPU_FREQ
570#endif 570#endif
571 571
572void usb_preinit(void) 572static void usb_preinit(void)
573{ 573{
574 /* Clear ECS bit of CPCCR, 0:clock source is EXCLK, 1:clock source is EXCLK/2 */ 574 /* Clear ECS bit of CPCCR, 0:clock source is EXCLK, 1:clock source is EXCLK/2 */
575 REG_CPM_CPCCR &= ~CPCCR_ECS; 575 REG_CPM_CPCCR &= ~CPCCR_ECS;
@@ -621,7 +621,7 @@ void usb_preinit(void)
621 udelay(300); 621 udelay(300);
622} 622}
623 623
624void dma_preinit(void) 624static void dma_preinit(void)
625{ 625{
626 __cpm_start_mdma(); 626 __cpm_start_mdma();
627 __cpm_start_dmac(); 627 __cpm_start_dmac();
@@ -636,7 +636,7 @@ void dma_preinit(void)
636} 636}
637 637
638/* Gets called *before* main */ 638/* Gets called *before* main */
639void ICODE_ATTR system_main(void) 639void ICODE_ATTR system_early_init(void)
640{ 640{
641 int i; 641 int i;
642 642