diff options
-rw-r--r-- | firmware/export/config/sansaclipplus.h | 4 | ||||
-rw-r--r-- | firmware/export/config/sansaclipv2.h | 4 | ||||
-rw-r--r-- | firmware/export/config/sansafuzev2.h | 4 | ||||
-rw-r--r-- | firmware/target/arm/as3525/clock-target.h | 1 | ||||
-rw-r--r-- | firmware/target/arm/as3525/system-as3525.c | 17 |
5 files changed, 12 insertions, 18 deletions
diff --git a/firmware/export/config/sansaclipplus.h b/firmware/export/config/sansaclipplus.h index 462c0a76e8..76be3cae7f 100644 --- a/firmware/export/config/sansaclipplus.h +++ b/firmware/export/config/sansaclipplus.h | |||
@@ -161,7 +161,7 @@ | |||
161 | #define ROM_START 0x00000000 | 161 | #define ROM_START 0x00000000 |
162 | 162 | ||
163 | /* Define this to the CPU frequency */ | 163 | /* Define this to the CPU frequency */ |
164 | #define CPU_FREQ 250000000 | 164 | #define CPU_FREQ 240000000 |
165 | 165 | ||
166 | /* Type of LCD */ | 166 | /* Type of LCD */ |
167 | #define CONFIG_LCD LCD_SSD1303 | 167 | #define CONFIG_LCD LCD_SSD1303 |
@@ -188,7 +188,7 @@ | |||
188 | #define CONFIG_LED LED_VIRTUAL | 188 | #define CONFIG_LED LED_VIRTUAL |
189 | 189 | ||
190 | /* Define this if you have adjustable CPU frequency */ | 190 | /* Define this if you have adjustable CPU frequency */ |
191 | //#define HAVE_ADJUSTABLE_CPU_FREQ | 191 | #define HAVE_ADJUSTABLE_CPU_FREQ |
192 | 192 | ||
193 | #define BOOTFILE_EXT "sansa" | 193 | #define BOOTFILE_EXT "sansa" |
194 | #define BOOTFILE "rockbox." BOOTFILE_EXT | 194 | #define BOOTFILE "rockbox." BOOTFILE_EXT |
diff --git a/firmware/export/config/sansaclipv2.h b/firmware/export/config/sansaclipv2.h index 20196dc72f..1736d6fe12 100644 --- a/firmware/export/config/sansaclipv2.h +++ b/firmware/export/config/sansaclipv2.h | |||
@@ -157,7 +157,7 @@ | |||
157 | #define ROM_START 0x00000000 | 157 | #define ROM_START 0x00000000 |
158 | 158 | ||
159 | /* Define this to the CPU frequency */ | 159 | /* Define this to the CPU frequency */ |
160 | #define CPU_FREQ 250000000 | 160 | #define CPU_FREQ 240000000 |
161 | 161 | ||
162 | /* Type of LCD */ | 162 | /* Type of LCD */ |
163 | #define CONFIG_LCD LCD_SSD1303 | 163 | #define CONFIG_LCD LCD_SSD1303 |
@@ -184,7 +184,7 @@ | |||
184 | #define CONFIG_LED LED_VIRTUAL | 184 | #define CONFIG_LED LED_VIRTUAL |
185 | 185 | ||
186 | /* Define this if you have adjustable CPU frequency */ | 186 | /* Define this if you have adjustable CPU frequency */ |
187 | //#define HAVE_ADJUSTABLE_CPU_FREQ | 187 | #define HAVE_ADJUSTABLE_CPU_FREQ |
188 | 188 | ||
189 | #define BOOTFILE_EXT "sansa" | 189 | #define BOOTFILE_EXT "sansa" |
190 | #define BOOTFILE "rockbox." BOOTFILE_EXT | 190 | #define BOOTFILE "rockbox." BOOTFILE_EXT |
diff --git a/firmware/export/config/sansafuzev2.h b/firmware/export/config/sansafuzev2.h index 3a46003361..fcb4a676d3 100644 --- a/firmware/export/config/sansafuzev2.h +++ b/firmware/export/config/sansafuzev2.h | |||
@@ -165,7 +165,7 @@ | |||
165 | #define CURRENT_RECORD CURRENT_NORMAL | 165 | #define CURRENT_RECORD CURRENT_NORMAL |
166 | 166 | ||
167 | /* Define this to the CPU frequency */ | 167 | /* Define this to the CPU frequency */ |
168 | #define CPU_FREQ 250000000 | 168 | #define CPU_FREQ 240000000 |
169 | 169 | ||
170 | /* Type of LCD */ | 170 | /* Type of LCD */ |
171 | #define CONFIG_LCD LCD_FUZE | 171 | #define CONFIG_LCD LCD_FUZE |
@@ -196,7 +196,7 @@ | |||
196 | #endif /* !BOOTLOADER */ | 196 | #endif /* !BOOTLOADER */ |
197 | 197 | ||
198 | /* Define this if you have adjustable CPU frequency */ | 198 | /* Define this if you have adjustable CPU frequency */ |
199 | //#define HAVE_ADJUSTABLE_CPU_FREQ | 199 | #define HAVE_ADJUSTABLE_CPU_FREQ |
200 | 200 | ||
201 | #define BOOTFILE_EXT "sansa" | 201 | #define BOOTFILE_EXT "sansa" |
202 | #define BOOTFILE "rockbox." BOOTFILE_EXT | 202 | #define BOOTFILE "rockbox." BOOTFILE_EXT |
diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h index 65fc681d24..9bb20b21ad 100644 --- a/firmware/target/arm/as3525/clock-target.h +++ b/firmware/target/arm/as3525/clock-target.h | |||
@@ -66,7 +66,6 @@ | |||
66 | #define AS3525_PLLA_FREQ 240000000 | 66 | #define AS3525_PLLA_FREQ 240000000 |
67 | #define AS3525_PLLA_SETTING 0x113B | 67 | #define AS3525_PLLA_SETTING 0x113B |
68 | 68 | ||
69 | /* XXX: CGU_PROC seems to be different as well */ | ||
70 | #define AS3525_FCLK_PREDIV 0 | 69 | #define AS3525_FCLK_PREDIV 0 |
71 | #define AS3525_FCLK_FREQ AS3525_PLLA_FREQ | 70 | #define AS3525_FCLK_FREQ AS3525_PLLA_FREQ |
72 | 71 | ||
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 4e1714b8aa..41cc54301b 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c | |||
@@ -254,11 +254,14 @@ void system_init(void) | |||
254 | CCU_SCON = 1; /* AHB master's priority configuration : | 254 | CCU_SCON = 1; /* AHB master's priority configuration : |
255 | TIC (Test Interface Controller) > DMA > USB > IDE > ARM */ | 255 | TIC (Test Interface Controller) > DMA > USB > IDE > ARM */ |
256 | 256 | ||
257 | #if CONFIG_CPU == AS3525 | ||
258 | CGU_PROC = 0; /* fclk 24 MHz */ | ||
259 | #endif | ||
260 | CGU_PERI &= ~0x7f; /* pclk 24 MHz */ | 257 | CGU_PERI &= ~0x7f; /* pclk 24 MHz */ |
261 | 258 | ||
259 | asm volatile( | ||
260 | "mrc p15, 0, r0, c1, c0 \n" /* control register */ | ||
261 | "bic r0, r0, #3<<30 \n" /* clears bus bits : sets fastbus */ | ||
262 | "mcr p15, 0, r0, c1, c0 \n" | ||
263 | : : : "r0" ); | ||
264 | |||
262 | CGU_PLLASUP = 0; /* enable PLLA */ | 265 | CGU_PLLASUP = 0; /* enable PLLA */ |
263 | CGU_PLLA = AS3525_PLLA_SETTING; | 266 | CGU_PLLA = AS3525_PLLA_SETTING; |
264 | while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */ | 267 | while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */ |
@@ -269,12 +272,10 @@ void system_init(void) | |||
269 | while(!(CGU_INTCTRL & (1<<1))); /* wait until PLLB is locked */ | 272 | while(!(CGU_INTCTRL & (1<<1))); /* wait until PLLB is locked */ |
270 | #endif | 273 | #endif |
271 | 274 | ||
272 | #if CONFIG_CPU == AS3525 | ||
273 | /* Set FCLK frequency */ | 275 | /* Set FCLK frequency */ |
274 | CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | | 276 | CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | |
275 | (AS3525_FCLK_PREDIV << 2) | | 277 | (AS3525_FCLK_PREDIV << 2) | |
276 | AS3525_FCLK_SEL); | 278 | AS3525_FCLK_SEL); |
277 | #endif | ||
278 | 279 | ||
279 | /* Set PCLK frequency */ | 280 | /* Set PCLK frequency */ |
280 | CGU_PERI = ((CGU_PERI & ~0x7F) | /* reset divider & clksel bits */ | 281 | CGU_PERI = ((CGU_PERI & ~0x7F) | /* reset divider & clksel bits */ |
@@ -282,12 +283,6 @@ void system_init(void) | |||
282 | (AS3525_PCLK_DIV1 << 6) | | 283 | (AS3525_PCLK_DIV1 << 6) | |
283 | AS3525_PCLK_SEL); | 284 | AS3525_PCLK_SEL); |
284 | 285 | ||
285 | asm volatile( | ||
286 | "mrc p15, 0, r0, c1, c0 \n" /* control register */ | ||
287 | "bic r0, r0, #3<<30 \n" /* clears bus bits : sets fastbus */ | ||
288 | "mcr p15, 0, r0, c1, c0 \n" | ||
289 | : : : "r0" ); | ||
290 | |||
291 | #ifdef BOOTLOADER | 286 | #ifdef BOOTLOADER |
292 | sdram_init(); | 287 | sdram_init(); |
293 | #endif /* BOOTLOADER */ | 288 | #endif /* BOOTLOADER */ |