diff options
| -rw-r--r-- | utils/rk27utils/rk27load/stage1/main.S | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/utils/rk27utils/rk27load/stage1/main.S b/utils/rk27utils/rk27load/stage1/main.S index 2564ad3cc4..e2cf2e5361 100644 --- a/utils/rk27utils/rk27load/stage1/main.S +++ b/utils/rk27utils/rk27load/stage1/main.S | |||
| @@ -70,18 +70,16 @@ row_loop: | |||
| 70 | str r7, [r0, #0x108] /* MCSDR_ADDCFG */ | 70 | str r7, [r0, #0x108] /* MCSDR_ADDCFG */ |
| 71 | 71 | ||
| 72 | add r7, r5, #11 /* row_num_bits */ | 72 | add r7, r5, #11 /* row_num_bits */ |
| 73 | mov r7, r3, lsl r7 /* 1<<row_num_bits */ | 73 | mov lr, r3, lsl r7 /* 1<<row_num_bits */ |
| 74 | mla lr, r7, r6, r6 /* (1<<row_num_bits)*(1<<col_num_bits) + | 74 | mul lr, lr, r6 /* (1<<row_num_bits)*(1<<col_num_bits) */ |
| 75 | * (1<<col_num_bits) (row1, col1 mem cell) | ||
| 76 | */ | ||
| 77 | 75 | ||
| 78 | mov r7, #0 | 76 | mov r7, #0 |
| 79 | str r7, [r2] /* *(0x60000000) = 0 */ | 77 | str r7, [r2] /* *(0x60000000) = 0 */ |
| 80 | str r2, [r2, lr] /* store test pattern */ | 78 | str r1, [r2, lr] /* store test pattern */ |
| 81 | ldr r7, [r2] | 79 | ldr r7, [r2] |
| 82 | cmp r7, #0 /* check if beginning of dram is not touched */ | 80 | cmp r7, #0 /* check if beginning of dram is not touched */ |
| 83 | ldreq lr, [r2, lr] /* readback row1,col1 addr */ | 81 | ldreq r7, [r2, lr] /* readback row1 addr */ |
| 84 | cmpeq lr, r1 /* check if test pattern is valid */ | 82 | cmpeq r7, r1 /* check if test pattern is valid */ |
| 85 | beq end | 83 | beq end |
| 86 | subs r5, #1 | 84 | subs r5, #1 |
| 87 | bpl row_loop | 85 | bpl row_loop |