diff options
-rw-r--r-- | firmware/export/config-e200.h | 2 | ||||
-rw-r--r-- | firmware/export/i2s.h | 1 | ||||
-rw-r--r-- | firmware/target/arm/i2s-pp.c | 31 | ||||
-rw-r--r-- | firmware/target/arm/pcm-pp.c | 4 | ||||
-rw-r--r-- | firmware/target/arm/system-pp502x.c | 9 |
5 files changed, 44 insertions, 3 deletions
diff --git a/firmware/export/config-e200.h b/firmware/export/config-e200.h index c7f058e95c..acb23cb4d0 100644 --- a/firmware/export/config-e200.h +++ b/firmware/export/config-e200.h | |||
@@ -160,7 +160,7 @@ | |||
160 | #define CONFIG_LED LED_VIRTUAL | 160 | #define CONFIG_LED LED_VIRTUAL |
161 | 161 | ||
162 | /* Define this if you have adjustable CPU frequency */ | 162 | /* Define this if you have adjustable CPU frequency */ |
163 | /*#define HAVE_ADJUSTABLE_CPU_FREQ*/ | 163 | #define HAVE_ADJUSTABLE_CPU_FREQ |
164 | 164 | ||
165 | #define MI4_FORMAT | 165 | #define MI4_FORMAT |
166 | #define BOOTFILE_EXT "mi4" | 166 | #define BOOTFILE_EXT "mi4" |
diff --git a/firmware/export/i2s.h b/firmware/export/i2s.h index 13dba68391..3b4dbb4c10 100644 --- a/firmware/export/i2s.h +++ b/firmware/export/i2s.h | |||
@@ -18,3 +18,4 @@ | |||
18 | ****************************************************************************/ | 18 | ****************************************************************************/ |
19 | 19 | ||
20 | void i2s_reset(void); | 20 | void i2s_reset(void); |
21 | void i2s_scale_attn_level(long frequency); | ||
diff --git a/firmware/target/arm/i2s-pp.c b/firmware/target/arm/i2s-pp.c index c63287b72b..b9e32b8789 100644 --- a/firmware/target/arm/i2s-pp.c +++ b/firmware/target/arm/i2s-pp.c | |||
@@ -25,6 +25,7 @@ | |||
25 | ****************************************************************************/ | 25 | ****************************************************************************/ |
26 | 26 | ||
27 | #include "system.h" | 27 | #include "system.h" |
28 | #include "cpu.h" | ||
28 | 29 | ||
29 | /* TODO: Add in PP5002 defs */ | 30 | /* TODO: Add in PP5002 defs */ |
30 | #if CONFIG_CPU == PP5002 | 31 | #if CONFIG_CPU == PP5002 |
@@ -140,4 +141,34 @@ void i2s_reset(void) | |||
140 | /* Rx.CLR = 1, TX.CLR = 1 */ | 141 | /* Rx.CLR = 1, TX.CLR = 1 */ |
141 | IISFIFO_CFG |= 0x1100; | 142 | IISFIFO_CFG |= 0x1100; |
142 | } | 143 | } |
144 | |||
145 | #ifdef SANSA_E200 | ||
146 | void i2s_scale_attn_level(long frequency) | ||
147 | { | ||
148 | unsigned int iisfifo_cfg = IISFIFO_CFG & ~0xff; | ||
149 | |||
150 | /* TODO: set this more appropriately for frequency */ | ||
151 | if (frequency <= CPUFREQ_DEFAULT) | ||
152 | { | ||
153 | /* when 4 slots full */ | ||
154 | /* when 4 slots empty */ | ||
155 | iisfifo_cfg |= 0x11; | ||
156 | } | ||
157 | else if (frequency < CPUFREQ_MAX) | ||
158 | { | ||
159 | /* when 8 slots full */ | ||
160 | /* when 8 slots empty */ | ||
161 | iisfifo_cfg |= 0x22; | ||
162 | } | ||
163 | else | ||
164 | { | ||
165 | /* when 12 slots full */ | ||
166 | /* when 12 slots empty */ | ||
167 | iisfifo_cfg |= 0x33; | ||
168 | } | ||
169 | |||
170 | IISFIFO_CFG = iisfifo_cfg; | ||
171 | } | ||
172 | #endif /* SANSA_E200 */ | ||
173 | |||
143 | #endif | 174 | #endif |
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c index 29e5275745..5ac15fe00c 100644 --- a/firmware/target/arm/pcm-pp.c +++ b/firmware/target/arm/pcm-pp.c | |||
@@ -378,7 +378,7 @@ void fiq_record(void) | |||
378 | if (audio_channels == 2) { | 378 | if (audio_channels == 2) { |
379 | /* RX is stereo */ | 379 | /* RX is stereo */ |
380 | while (p_size > 0) { | 380 | while (p_size > 0) { |
381 | if (FIFO_FREE_COUNT < 8) { | 381 | if (FIFO_FREE_COUNT < 2) { |
382 | /* enable interrupt */ | 382 | /* enable interrupt */ |
383 | IISCONFIG |= (1 << 0); | 383 | IISCONFIG |= (1 << 0); |
384 | goto fiq_record_exit; | 384 | goto fiq_record_exit; |
@@ -402,7 +402,7 @@ void fiq_record(void) | |||
402 | else { | 402 | else { |
403 | /* RX is left channel mono */ | 403 | /* RX is left channel mono */ |
404 | while (p_size > 0) { | 404 | while (p_size > 0) { |
405 | if (FIFO_FREE_COUNT < 8) { | 405 | if (FIFO_FREE_COUNT < 2) { |
406 | /* enable interrupt */ | 406 | /* enable interrupt */ |
407 | IISCONFIG |= (1 << 0); | 407 | IISCONFIG |= (1 << 0); |
408 | goto fiq_record_exit; | 408 | goto fiq_record_exit; |
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c index 3011162e40..748e10668c 100644 --- a/firmware/target/arm/system-pp502x.c +++ b/firmware/target/arm/system-pp502x.c | |||
@@ -18,6 +18,7 @@ | |||
18 | ****************************************************************************/ | 18 | ****************************************************************************/ |
19 | #include "system.h" | 19 | #include "system.h" |
20 | #include "thread.h" | 20 | #include "thread.h" |
21 | #include "i2s.h" | ||
21 | 22 | ||
22 | #if NUM_CORES > 1 | 23 | #if NUM_CORES > 1 |
23 | struct mutex boostctrl_mtx NOCACHEBSS_ATTR; | 24 | struct mutex boostctrl_mtx NOCACHEBSS_ATTR; |
@@ -165,6 +166,10 @@ void set_cpu_frequency(long frequency) | |||
165 | postmult = CPUFREQ_DEFAULT_MULT; | 166 | postmult = CPUFREQ_DEFAULT_MULT; |
166 | cpu_frequency = frequency; | 167 | cpu_frequency = frequency; |
167 | 168 | ||
169 | #ifdef SANSA_E200 | ||
170 | i2s_scale_attn_level(CPUFREQ_DEFAULT); | ||
171 | #endif | ||
172 | |||
168 | unknown2 = inl(0x600060a0); | 173 | unknown2 = inl(0x600060a0); |
169 | 174 | ||
170 | outl(inl(0x70000020) | (1<<30), 0x70000020); /* Enable PLL power */ | 175 | outl(inl(0x70000020) | (1<<30), 0x70000020); /* Enable PLL power */ |
@@ -197,6 +202,10 @@ void set_cpu_frequency(long frequency) | |||
197 | inl(0x600060a0); /* sync pipeline (?) */ | 202 | inl(0x600060a0); /* sync pipeline (?) */ |
198 | outl(unknown2, 0x600060a0); | 203 | outl(unknown2, 0x600060a0); |
199 | 204 | ||
205 | #ifdef SANSA_E200 | ||
206 | i2s_scale_attn_level(frequency); | ||
207 | #endif | ||
208 | |||
200 | # if NUM_CORES > 1 | 209 | # if NUM_CORES > 1 |
201 | boostctrl_mtx.locked = 0; | 210 | boostctrl_mtx.locked = 0; |
202 | # endif | 211 | # endif |