diff options
-rw-r--r-- | firmware/SOURCES | 3 | ||||
-rw-r--r-- | firmware/export/as3525.h | 1 | ||||
-rw-r--r-- | firmware/export/config.h | 6 | ||||
-rw-r--r-- | firmware/export/config/sansaclipplus.h | 5 | ||||
-rw-r--r-- | firmware/target/arm/as3525/system-as3525.c | 2 | ||||
-rw-r--r-- | firmware/target/arm/as3525/usb-drv-as3525v2.c | 261 | ||||
-rw-r--r-- | firmware/target/arm/as3525/usb-drv-as3525v2.h | 91 |
7 files changed, 364 insertions, 5 deletions
diff --git a/firmware/SOURCES b/firmware/SOURCES index 85fec60f9e..9528ed0308 100644 --- a/firmware/SOURCES +++ b/firmware/SOURCES | |||
@@ -444,6 +444,9 @@ target/arm/as3525/scrollwheel-as3525.c | |||
444 | #else /* AS3535v2 */ | 444 | #else /* AS3535v2 */ |
445 | target/arm/as3525/sd-as3525v2.c | 445 | target/arm/as3525/sd-as3525v2.c |
446 | #endif | 446 | #endif |
447 | #if CONFIG_CPU == AS3525v2 | ||
448 | target/arm/as3525/usb-drv-as3525v2.c | ||
449 | #endif | ||
447 | target/arm/as3525/power-as3525.c | 450 | target/arm/as3525/power-as3525.c |
448 | target/arm/as3525/usb-as3525.c | 451 | target/arm/as3525/usb-as3525.c |
449 | target/arm/as3525/dma-pl081.c | 452 | target/arm/as3525/dma-pl081.c |
diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h index 1d5fb1d820..699762a9b2 100644 --- a/firmware/export/as3525.h +++ b/firmware/export/as3525.h | |||
@@ -110,6 +110,7 @@ | |||
110 | #define CCU_VERS (*(volatile unsigned long *)(CCU_BASE + 0x14)) | 110 | #define CCU_VERS (*(volatile unsigned long *)(CCU_BASE + 0x14)) |
111 | #define CCU_SPARE1 (*(volatile unsigned long *)(CCU_BASE + 0x18)) | 111 | #define CCU_SPARE1 (*(volatile unsigned long *)(CCU_BASE + 0x18)) |
112 | #define CCU_SPARE2 (*(volatile unsigned long *)(CCU_BASE + 0x1C)) | 112 | #define CCU_SPARE2 (*(volatile unsigned long *)(CCU_BASE + 0x1C)) |
113 | #define CCU_USB_THINGY (*(volatile unsigned long *)(CCU_BASE + 0x20)) | ||
113 | 114 | ||
114 | /* DBOP */ | 115 | /* DBOP */ |
115 | #define DBOP_TIMPOL_01 (*(volatile unsigned long *)(DBOP_BASE + 0x00)) | 116 | #define DBOP_TIMPOL_01 (*(volatile unsigned long *)(DBOP_BASE + 0x00)) |
diff --git a/firmware/export/config.h b/firmware/export/config.h index 070bd959b7..5e986d47b9 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h | |||
@@ -276,6 +276,7 @@ Lyre prototype 1 */ | |||
276 | #define USBOTG_ARC 5020 /* PortalPlayer 502x */ | 276 | #define USBOTG_ARC 5020 /* PortalPlayer 502x */ |
277 | #define USBOTG_JZ4740 4740 /* Ingenic Jz4740/Jz4732 */ | 277 | #define USBOTG_JZ4740 4740 /* Ingenic Jz4740/Jz4732 */ |
278 | #define USBOTG_AS3525 3525 /* AMS AS3525 */ | 278 | #define USBOTG_AS3525 3525 /* AMS AS3525 */ |
279 | #define USBOTG_AS3525v2 3535 /* AMS AS3525v2 */ | ||
279 | #define USBOTG_S3C6400X 6400 /* Samsung S3C6400X, also used in the S5L8701 */ | 280 | #define USBOTG_S3C6400X 6400 /* Samsung S3C6400X, also used in the S5L8701 */ |
280 | 281 | ||
281 | /* Multiple cores */ | 282 | /* Multiple cores */ |
@@ -912,10 +913,11 @@ Lyre prototype 1 */ | |||
912 | 913 | ||
913 | #ifndef SIMULATOR | 914 | #ifndef SIMULATOR |
914 | //#define USB_ENABLE_SERIAL | 915 | //#define USB_ENABLE_SERIAL |
915 | #define USB_ENABLE_STORAGE | 916 | //#define USB_ENABLE_STORAGE |
916 | 917 | ||
917 | #ifdef USB_HAS_INTERRUPT | 918 | #ifdef USB_HAS_INTERRUPT |
918 | #define USB_ENABLE_HID | 919 | //#define USB_ENABLE_HID |
920 | #define USB_ENABLE_CHARGING_ONLY | ||
919 | #else | 921 | #else |
920 | #define USB_ENABLE_CHARGING_ONLY | 922 | #define USB_ENABLE_CHARGING_ONLY |
921 | #endif | 923 | #endif |
diff --git a/firmware/export/config/sansaclipplus.h b/firmware/export/config/sansaclipplus.h index 29694d87c2..55eacd2607 100644 --- a/firmware/export/config/sansaclipplus.h +++ b/firmware/export/config/sansaclipplus.h | |||
@@ -171,10 +171,11 @@ | |||
171 | 171 | ||
172 | #ifndef BOOTLOADER | 172 | #ifndef BOOTLOADER |
173 | 173 | ||
174 | #define USB_HANDLED_BY_OF | 174 | //#define USB_HANDLED_BY_OF |
175 | #define USE_ROCKBOX_USB | ||
175 | 176 | ||
176 | /* USB On-the-go */ | 177 | /* USB On-the-go */ |
177 | #define CONFIG_USBOTG USBOTG_AS3525 | 178 | #define CONFIG_USBOTG USBOTG_AS3525v2 |
178 | 179 | ||
179 | /* enable these for the experimental usb stack */ | 180 | /* enable these for the experimental usb stack */ |
180 | #define HAVE_USBSTACK | 181 | #define HAVE_USBSTACK |
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 6cce5e5a50..dbbe1a1905 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c | |||
@@ -325,7 +325,7 @@ void system_init(void) | |||
325 | CGU_PLLASUP = 0; /* enable PLLA */ | 325 | CGU_PLLASUP = 0; /* enable PLLA */ |
326 | while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */ | 326 | while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */ |
327 | 327 | ||
328 | #if defined(USE_ROCKBOX_USB) || (AS3525_MCLK_SEL == AS3525_CLK_PLLB) | 328 | #if (defined(USE_ROCKBOX_USB) && CONFIG_CPU==AS3525) || (AS3525_MCLK_SEL == AS3525_CLK_PLLB) |
329 | CGU_COUNTB = 0xff; | 329 | CGU_COUNTB = 0xff; |
330 | CGU_PLLB = AS3525_PLLB_SETTING; | 330 | CGU_PLLB = AS3525_PLLB_SETTING; |
331 | CGU_PLLBSUP = 0; /* enable PLLB */ | 331 | CGU_PLLBSUP = 0; /* enable PLLB */ |
diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.c b/firmware/target/arm/as3525/usb-drv-as3525v2.c new file mode 100644 index 0000000000..9afe8255e5 --- /dev/null +++ b/firmware/target/arm/as3525/usb-drv-as3525v2.c | |||
@@ -0,0 +1,261 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright © 2010 Amaury Pouly | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #include "usb.h" | ||
23 | #include "usb_drv.h" | ||
24 | #include "as3525v2.h" | ||
25 | #include "clock-target.h" | ||
26 | #include "ascodec.h" | ||
27 | #include "as3514.h" | ||
28 | #include <stdbool.h> | ||
29 | #include "panic.h" | ||
30 | #define LOGF_ENABLE | ||
31 | #include "logf.h" | ||
32 | #include "usb-drv-as3525v2.h" | ||
33 | |||
34 | struct usb_endpoint | ||
35 | { | ||
36 | void *buf; | ||
37 | unsigned int len; | ||
38 | union | ||
39 | { | ||
40 | unsigned int sent; | ||
41 | unsigned int received; | ||
42 | }; | ||
43 | bool wait; | ||
44 | bool busy; | ||
45 | }; | ||
46 | |||
47 | static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS*2]; | ||
48 | |||
49 | void usb_attach(void) | ||
50 | { | ||
51 | usb_enable(true); | ||
52 | } | ||
53 | |||
54 | static void usb_delay(void) | ||
55 | { | ||
56 | int i = 0; | ||
57 | while(i < 0x300) | ||
58 | i++; | ||
59 | } | ||
60 | |||
61 | static void as3525v2_connect(void) | ||
62 | { | ||
63 | logf("usb: init as3525v2"); | ||
64 | /* 1) enable usb core clock */ | ||
65 | CGU_PERI |= CGU_USB_CLOCK_ENABLE; | ||
66 | usb_delay(); | ||
67 | /* 2) enable usb phy clock */ | ||
68 | CGU_USB |= 0x20; | ||
69 | usb_delay(); | ||
70 | /* 3) clear "stop pclk" */ | ||
71 | USB_PCGCCTL &= ~0x1; | ||
72 | usb_delay(); | ||
73 | /* 4) clear "power clamp" */ | ||
74 | USB_PCGCCTL &= ~0x4; | ||
75 | usb_delay(); | ||
76 | /* 5) clear "reset power down module" */ | ||
77 | USB_PCGCCTL &= ~0x8; | ||
78 | usb_delay(); | ||
79 | /* 6) set "power on program done" */ | ||
80 | USB_DCTL |= 0x800; | ||
81 | usb_delay(); | ||
82 | /* 7) core soft reset */ | ||
83 | USB_GRSTCTL |= USB_GRSTCTL_csftrst; | ||
84 | usb_delay(); | ||
85 | /* 8) hclk soft reset */ | ||
86 | USB_GRSTCTL |= USB_GRSTCTL_hsftrst; | ||
87 | usb_delay(); | ||
88 | /* 9) flush and reset everything */ | ||
89 | USB_GRSTCTL |= 0x3f; | ||
90 | usb_delay(); | ||
91 | /* 10) force device mode*/ | ||
92 | USB_GUSBCFG &= ~0x20000000; | ||
93 | USB_GUSBCFG |= 0x40000000; | ||
94 | usb_delay(); | ||
95 | /* 11) Do something that is probably CCU related but undocumented*/ | ||
96 | CCU_USB_THINGY &= ~0x1000; | ||
97 | usb_delay(); | ||
98 | /* 12) reset usb core parameters (dev addr, speed, ...) */ | ||
99 | USB_DCFG = 0; | ||
100 | usb_delay(); | ||
101 | } | ||
102 | |||
103 | static void core_reset(void) | ||
104 | { | ||
105 | unsigned int i = 0; | ||
106 | /* Wait for AHB master IDLE state. */ | ||
107 | while((USB_GRSTCTL & USB_GRSTCTL_ahbidle) == 0); | ||
108 | { | ||
109 | /*udelay(10);*/ | ||
110 | sleep(1); | ||
111 | } | ||
112 | /* Core Soft Reset */ | ||
113 | USB_GRSTCTL |= USB_GRSTCTL_csftrst; | ||
114 | /* Waits for the hardware to clear reset bit */ | ||
115 | while(USB_GRSTCTL & USB_GRSTCTL_csftrst && i < 0x300) | ||
116 | i++; | ||
117 | |||
118 | if(USB_GRSTCTL & USB_GRSTCTL_csftrst) | ||
119 | logf("oops, usb core soft reset hang :("); | ||
120 | |||
121 | /* Wait for 3 PHY Clocks */ | ||
122 | /*mdelay(100);*/ | ||
123 | sleep(1); | ||
124 | |||
125 | logf("%ld endpoints", USB_GHWCFG2_NUM_EP); | ||
126 | for(i = 0; i < USB_GHWCFG2_NUM_EP; i++) | ||
127 | logf(" EP%d: IN=%ld OUT=%ld", i, USB_GHWCFG1_IN_EP(i), USB_GHWCFG1_OUT_EP(i)); | ||
128 | logf("hwcfg1: %08lx", USB_GHWCFG1); | ||
129 | logf("hwcfg2: %08lx", USB_GHWCFG2); | ||
130 | logf("hwcfg3: %08lx", USB_GHWCFG3); | ||
131 | logf("hwcfg4: %08lx", USB_GHWCFG4); | ||
132 | |||
133 | logf("%ld in ep", USB_GHWCFG4_NUM_IN_EP); | ||
134 | logf("tot fifo sz: %ld", USB_GHWCFG3_DFIFO_LEN); | ||
135 | logf("rx fifo sz: %ld", USB_GRXFSIZ); | ||
136 | logf("tx fifo sz: %ld", USB_GNPTXFSIZ >> 16); /* there is no perio ep so print only non-perio */ | ||
137 | } | ||
138 | |||
139 | static void core_init(void) | ||
140 | { | ||
141 | /* Reset the Controller */ | ||
142 | core_reset(); | ||
143 | |||
144 | /* Setup phy for high speed */ | ||
145 | /* 1) select utmi */ | ||
146 | /* fixme: the clip+ hardware support utmi only, this is useless */ | ||
147 | //USB_GUSBCFG &= ~USB_GUSBCFG_ulpi_utmi_sel; | ||
148 | /* 2) select utmi 16-bit wide bus */ | ||
149 | USB_GUSBCFG |= USB_GUSBCFG_phy_if; | ||
150 | /* 3) core reset */ | ||
151 | /* fixme: linux patch says the phy parameters survive the soft reset so | ||
152 | * perhaps this part can be done only one type but I don't know | ||
153 | * what happened when phy goes to standby mode and clock are disabled */ | ||
154 | core_reset(); | ||
155 | |||
156 | /* fixme: at this point, the linux patch sets ulpi bits to 0 on utmi selection | ||
157 | * but the clip+ hardware does not support it so don't bother with | ||
158 | * that */ | ||
159 | |||
160 | /* fixme: the current code is for internal DMA only, the clip+ architecture | ||
161 | * define the internal DMA model */ | ||
162 | /* Set burstlen */ | ||
163 | USB_GAHBCFG |= USB_GAHBCFG_INT_DMA_BURST_INCR << USB_GAHBCFG_hburstlen_bit_pos; | ||
164 | /* Enable DMA */ | ||
165 | USB_GAHBCFG |= USB_GAHBCFG_dma_enable; | ||
166 | /* Disable HNP and SRP, not sure it's useful because we already forced dev mode */ | ||
167 | USB_GUSBCFG &= ~(USB_GUSBCFG_SRP_cap | USB_GUSBCFG_HNP_cap); | ||
168 | } | ||
169 | |||
170 | void usb_drv_init(void) | ||
171 | { | ||
172 | logf("usb_drv_init"); | ||
173 | as3525v2_connect(); | ||
174 | |||
175 | logf("usb: synopsis id: %lx", USB_GSNPSID); | ||
176 | |||
177 | core_init(); | ||
178 | } | ||
179 | |||
180 | void usb_drv_exit(void) | ||
181 | { | ||
182 | logf("usb_drv_exit"); | ||
183 | } | ||
184 | |||
185 | int usb_drv_port_speed(void) | ||
186 | { | ||
187 | return 0; | ||
188 | } | ||
189 | |||
190 | int usb_drv_request_endpoint(int type, int dir) | ||
191 | { | ||
192 | (void) type; | ||
193 | (void) dir; | ||
194 | return -1; | ||
195 | } | ||
196 | |||
197 | void usb_drv_release_endpoint(int ep) | ||
198 | { | ||
199 | (void) ep; | ||
200 | } | ||
201 | |||
202 | void usb_drv_cancel_all_transfers(void) | ||
203 | { | ||
204 | } | ||
205 | |||
206 | int usb_drv_recv(int ep, void *ptr, int len) | ||
207 | { | ||
208 | (void) ep; | ||
209 | (void) ptr; | ||
210 | (void) len; | ||
211 | return -1; | ||
212 | } | ||
213 | |||
214 | int usb_drv_send(int ep, void *ptr, int len) | ||
215 | { | ||
216 | (void) ep; | ||
217 | (void) ptr; | ||
218 | (void) len; | ||
219 | return -1; | ||
220 | } | ||
221 | |||
222 | int usb_drv_send_nonblocking(int ep, void *ptr, int len) | ||
223 | { | ||
224 | (void) ep; | ||
225 | (void) ptr; | ||
226 | (void) len; | ||
227 | return -1; | ||
228 | } | ||
229 | |||
230 | /* interrupt service routine */ | ||
231 | void INT_USB(void) | ||
232 | { | ||
233 | panicf("USB interrupt !"); | ||
234 | } | ||
235 | |||
236 | /* (not essential? , not implemented in usb-tcc.c) */ | ||
237 | void usb_drv_set_test_mode(int mode) | ||
238 | { | ||
239 | (void) mode; | ||
240 | } | ||
241 | |||
242 | void usb_drv_set_address(int address) | ||
243 | { | ||
244 | (void) address; | ||
245 | } | ||
246 | |||
247 | void usb_drv_stall(int ep, bool stall, bool in) | ||
248 | { | ||
249 | (void) ep; | ||
250 | (void) stall; | ||
251 | (void) in; | ||
252 | } | ||
253 | |||
254 | bool usb_drv_stalled(int ep, bool in) | ||
255 | { | ||
256 | (void) ep; | ||
257 | (void) in; | ||
258 | return true; | ||
259 | return true; | ||
260 | } | ||
261 | |||
diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.h b/firmware/target/arm/as3525/usb-drv-as3525v2.h new file mode 100644 index 0000000000..4abbdb7dc2 --- /dev/null +++ b/firmware/target/arm/as3525/usb-drv-as3525v2.h | |||
@@ -0,0 +1,91 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright © 2010 Amaury Pouly | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #ifndef __USB_DRV_AS3525v2_H__ | ||
22 | #define __USB_DRV_AS3525v2_H__ | ||
23 | |||
24 | #include "as3525v2.h" | ||
25 | |||
26 | #define USB_DEVICE (USB_BASE + 0x0800) /** USB Device base address */ | ||
27 | |||
28 | /** | ||
29 | * Core Global Registers | ||
30 | */ | ||
31 | #define USB_GOTGCTL (*(volatile unsigned long *)(USB_BASE + 0x000)) /** OTG Control and Status Register */ | ||
32 | #define USB_GOTGINT (*(volatile unsigned long *)(USB_BASE + 0x004)) /** OTG Interrupt Register */ | ||
33 | #define USB_GAHBCFG (*(volatile unsigned long *)(USB_BASE + 0x008)) /** Core AHB Configuration Register */ | ||
34 | #define USB_GUSBCFG (*(volatile unsigned long *)(USB_BASE + 0x00C)) /** Core USB Configuration Register */ | ||
35 | #define USB_GRSTCTL (*(volatile unsigned long *)(USB_BASE + 0x010)) /** Core Reset Register */ | ||
36 | #define USB_GINTSTS (*(volatile unsigned long *)(USB_BASE + 0x014)) /** Core Interrupt Register */ | ||
37 | #define USB_GINTMSK (*(volatile unsigned long *)(USB_BASE + 0x018)) /** Core Interrupt Mask Register */ | ||
38 | #define USB_GRXSTSR (*(volatile unsigned long *)(USB_BASE + 0x01C)) /** Receive Status Debug Read Register (Read Only) */ | ||
39 | #define USB_GRXSTSP (*(volatile unsigned long *)(USB_BASE + 0x020)) /** Receive Status Read /Pop Register (Read Only) */ | ||
40 | #define USB_GRXFSIZ (*(volatile unsigned long *)(USB_BASE + 0x024)) /** Receive FIFO Size Register */ | ||
41 | #define USB_GNPTXFSIZ (*(volatile unsigned long *)(USB_BASE + 0x028)) /** Periodic Transmit FIFO Size Register */ | ||
42 | #define USB_GNPTXSTS (*(volatile unsigned long *)(USB_BASE + 0x02C)) /** Non-Periodic Transmit FIFO/Queue Status Register */ | ||
43 | #define USB_GI2CCTL (*(volatile unsigned long *)(USB_BASE + 0x030)) /** I2C Access Register */ | ||
44 | #define USB_GPVNDCTL (*(volatile unsigned long *)(USB_BASE + 0x034)) /** PHY Vendor Control Register */ | ||
45 | #define USB_GGPIO (*(volatile unsigned long *)(USB_BASE + 0x038)) /** General Purpose Input/Output Register */ | ||
46 | #define USB_GUID (*(volatile unsigned long *)(USB_BASE + 0x03C)) /** User ID Register */ | ||
47 | #define USB_GSNPSID (*(volatile unsigned long *)(USB_BASE + 0x040)) /** Synopsys ID Register */ | ||
48 | #define USB_GHWCFG1 (*(volatile unsigned long *)(USB_BASE + 0x044)) /** User HW Config1 Register */ | ||
49 | #define USB_GHWCFG2 (*(volatile unsigned long *)(USB_BASE + 0x048)) /** User HW Config2 Register */ | ||
50 | #define USB_GHWCFG3 (*(volatile unsigned long *)(USB_BASE + 0x04C)) /** User HW Config3 Register */ | ||
51 | #define USB_GHWCFG4 (*(volatile unsigned long *)(USB_BASE + 0x050)) /** User HW Config4 Register */ | ||
52 | |||
53 | #define USB_GRSTCTL_csftrst (1 << 0) /** Core soft reset */ | ||
54 | #define USB_GRSTCTL_hsftrst (1 << 1) /** Hclk soft reset */ | ||
55 | #define USB_GRSTCTL_ahbidle (1 << 31) /** AHB idle state*/ | ||
56 | |||
57 | #define USB_GHWCFG1_IN_EP(ep) ((USB_GHWCFG1 >> ((ep) *2)) & 0x1) /** 1 if EP(ep) has in cap */ | ||
58 | #define USB_GHWCFG1_OUT_EP(ep) ((USB_GHWCFG1 >> ((ep) *2 + 1)) & 0x1)/** 1 if EP(ep) has out cap */ | ||
59 | |||
60 | #define USB_GHWCFG3_DFIFO_LEN (USB_GHWCFG3 >> 16) /** Total fifo size */ | ||
61 | |||
62 | #define USB_GHWCFG4_NUM_IN_EP ((USB_GHWCFG4 >> 26) & 0xf) /** Number of IN endpoints */ | ||
63 | |||
64 | #define USB_GHWCFG2_NUM_EP ((USB_GHWCFG2 >> 10) & 0xf) /** Number of endpoints */ | ||
65 | |||
66 | #define USB_GUSBCFG_ulpi_utmi_sel (1 << 4) /** select ulpi:1 or utmi:0 */ | ||
67 | #define USB_GUSBCFG_phy_if (1 << 3) /** select utmi bus width ? */ | ||
68 | #define USB_GUSBCFG_SRP_cap 0x100 | ||
69 | #define USB_GUSBCFG_HNP_cap 0x200 | ||
70 | |||
71 | #define USB_GAHBCFG_hburstlen_bit_pos 1 | ||
72 | #define USB_GAHBCFG_INT_DMA_BURST_INCR 1 /** note: the linux patch has several other value, this is one picked for internal dma */ | ||
73 | #define USB_GAHBCFG_dma_enable (1 << 5) | ||
74 | |||
75 | /** | ||
76 | * Device Registers Base Addresses | ||
77 | */ | ||
78 | #define USB_DCFG (*(volatile unsigned long *)(USB_DEVICE + 0x00)) /** Device Configuration Register */ | ||
79 | #define USB_DCTL (*(volatile unsigned long *)(USB_DEVICE + 0x04)) /** Device Control Register */ | ||
80 | #define USB_DSTS (*(volatile unsigned long *)(USB_DEVICE + 0x08)) /** Device Status Register */ | ||
81 | #define USB_DIEPMSK (*(volatile unsigned long *)(USB_DEVICE + 0x10)) /** Device IN Endpoint Common Interrupt Mask Register */ | ||
82 | #define USB_DOEPMSK (*(volatile unsigned long *)(USB_DEVICE + 0x14)) /** Device OUT Endpoint Common Interrupt Mask Register */ | ||
83 | #define USB_DAINT (*(volatile unsigned long *)(USB_DEVICE + 0x18)) /** Device All Endpoints Interrupt Register */ | ||
84 | #define USB_DAINTMSK (*(volatile unsigned long *)(USB_DEVICE + 0x1C)) /** Device Endpoints Interrupt Mask Register */ | ||
85 | #define USB_DTKNQR1 (*(volatile unsigned long *)(USB_DEVICE + 0x20)) /** Device IN Token Sequence Learning Queue Read Register 1 */ | ||
86 | #define USB_DTKNQR2 (*(volatile unsigned long *)(USB_DEVICE + 0x24)) /** Device IN Token Sequence Learning Queue Register 2 */ | ||
87 | #define USB_DTKNQP (*(volatile unsigned long *)(USB_DEVICE + 0x28)) /** Device IN Token Queue Pop register */ | ||
88 | |||
89 | #define USB_PCGCCTL (*(volatile unsigned long *)(USB_BASE + 0xE00)) /** Power and Clock Gating Control Register */ | ||
90 | |||
91 | #endif /* __USB_DRV_AS3525v2_H__ */ | ||