diff options
-rw-r--r-- | firmware/system.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/firmware/system.c b/firmware/system.c index b432cde79a..7d28a210bd 100644 --- a/firmware/system.c +++ b/firmware/system.c | |||
@@ -1215,7 +1215,7 @@ void set_cpu_frequency(long frequency) | |||
1215 | cpu_frequency = frequency; | 1215 | cpu_frequency = frequency; |
1216 | 1216 | ||
1217 | /* Enable PLL? */ | 1217 | /* Enable PLL? */ |
1218 | outl(inl(0x70000020) | (1<<30), 0x70000020); | 1218 | outl(inl(0x70000020) | (1<<30), 0x70000020); |
1219 | 1219 | ||
1220 | /* Select 24MHz crystal as clock source? */ | 1220 | /* Select 24MHz crystal as clock source? */ |
1221 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020); | 1221 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020); |
@@ -1223,16 +1223,16 @@ void set_cpu_frequency(long frequency) | |||
1223 | /* Clock frequency = (24/8)*postmult */ | 1223 | /* Clock frequency = (24/8)*postmult */ |
1224 | outl(0xaa020000 | 8 | (postmult << 8), 0x60006034); | 1224 | outl(0xaa020000 | 8 | (postmult << 8), 0x60006034); |
1225 | /* Wait for PLL relock? */ | 1225 | /* Wait for PLL relock? */ |
1226 | udelay(2000); | 1226 | udelay(2000); |
1227 | 1227 | ||
1228 | /* Select PLL as clock source? */ | 1228 | /* Select PLL as clock source? */ |
1229 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); | 1229 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); |
1230 | } | 1230 | } |
1231 | #else | 1231 | #else |
1232 | void ipod_set_cpu_frequency(void) | 1232 | void ipod_set_cpu_frequency(void) |
1233 | { | 1233 | { |
1234 | /* Enable PLL? */ | 1234 | /* Enable PLL? */ |
1235 | outl(inl(0x70000020) | (1<<30), 0x70000020); | 1235 | outl(inl(0x70000020) | (1<<30), 0x70000020); |
1236 | 1236 | ||
1237 | /* Select 24MHz crystal as clock source? */ | 1237 | /* Select 24MHz crystal as clock source? */ |
1238 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020); | 1238 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020); |
@@ -1240,10 +1240,10 @@ void ipod_set_cpu_frequency(void) | |||
1240 | /* Clock frequency = (24/8)*25 = 75MHz */ | 1240 | /* Clock frequency = (24/8)*25 = 75MHz */ |
1241 | outl(0xaa020000 | 8 | (25 << 8), 0x60006034); | 1241 | outl(0xaa020000 | 8 | (25 << 8), 0x60006034); |
1242 | /* Wait for PLL relock? */ | 1242 | /* Wait for PLL relock? */ |
1243 | udelay(2000); | 1243 | udelay(2000); |
1244 | 1244 | ||
1245 | /* Select PLL as clock source? */ | 1245 | /* Select PLL as clock source? */ |
1246 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); | 1246 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); |
1247 | } | 1247 | } |
1248 | #endif | 1248 | #endif |
1249 | 1249 | ||
@@ -1267,7 +1267,7 @@ void system_init(void) | |||
1267 | #if !defined(APPLE_IPODNANO) && !defined(APPLE_IPODVIDEO) | 1267 | #if !defined(APPLE_IPODNANO) && !defined(APPLE_IPODVIDEO) |
1268 | ipod_set_cpu_frequency(); | 1268 | ipod_set_cpu_frequency(); |
1269 | #endif | 1269 | #endif |
1270 | ipod_init_cache(); | 1270 | ipod_init_cache(); |
1271 | #endif | 1271 | #endif |
1272 | } | 1272 | } |
1273 | 1273 | ||