diff options
-rw-r--r-- | firmware/target/arm/tms320dm320/system-dm320.c | 37 |
1 files changed, 30 insertions, 7 deletions
diff --git a/firmware/target/arm/tms320dm320/system-dm320.c b/firmware/target/arm/tms320dm320/system-dm320.c index 7180d3b421..234d13c743 100644 --- a/firmware/target/arm/tms320dm320/system-dm320.c +++ b/firmware/target/arm/tms320dm320/system-dm320.c | |||
@@ -24,6 +24,9 @@ | |||
24 | #include "uart-target.h" | 24 | #include "uart-target.h" |
25 | #include "system-arm.h" | 25 | #include "system-arm.h" |
26 | #include "spi.h" | 26 | #include "spi.h" |
27 | #ifdef CREATIVE_ZVM | ||
28 | #include "dma-target.h" | ||
29 | #endif | ||
27 | 30 | ||
28 | #define default_interrupt(name) \ | 31 | #define default_interrupt(name) \ |
29 | extern __attribute__((weak,alias("UIRQ"))) void name (void) | 32 | extern __attribute__((weak,alias("UIRQ"))) void name (void) |
@@ -78,6 +81,23 @@ default_interrupt(ARMCOM_RX); | |||
78 | default_interrupt(ARMCOM_TX); | 81 | default_interrupt(ARMCOM_TX); |
79 | default_interrupt(RESERVED); | 82 | default_interrupt(RESERVED); |
80 | 83 | ||
84 | /* The entry address is equal to base address plus an offset. | ||
85 | * The offset is based on the priority of the interrupt. So if | ||
86 | * the priority of an interrupt is changed, the user should also | ||
87 | * change the offset for the interrupt in the entry table. | ||
88 | */ | ||
89 | |||
90 | static const unsigned short const irqpriority[] = | ||
91 | { | ||
92 | IRQ_TIMER0,IRQ_TIMER1,IRQ_TIMER2,IRQ_TIMER3,IRQ_CCD_VD0,IRQ_CCD_VD1, | ||
93 | IRQ_CCD_WEN,IRQ_VENC,IRQ_SERIAL0,IRQ_SERIAL1,IRQ_EXT_HOST,IRQ_DSPHINT, | ||
94 | IRQ_UART0,IRQ_UART1,IRQ_USB_DMA,IRQ_USB_CORE,IRQ_VLYNQ,IRQ_MTC0,IRQ_MTC1, | ||
95 | IRQ_SD_MMC,IRQ_SDIO_MS,IRQ_GIO0,IRQ_GIO1,IRQ_GIO2,IRQ_GIO3,IRQ_GIO4,IRQ_GIO5, | ||
96 | IRQ_GIO6,IRQ_GIO7,IRQ_GIO8,IRQ_GIO9,IRQ_GIO10,IRQ_GIO11,IRQ_GIO12,IRQ_GIO13, | ||
97 | IRQ_GIO14,IRQ_GIO15,IRQ_PREVIEW0,IRQ_PREVIEW1,IRQ_WATCHDOG,IRQ_I2C,IRQ_CLKC, | ||
98 | IRQ_ICE,IRQ_ARMCOM_RX,IRQ_ARMCOM_TX,IRQ_RESERVED | ||
99 | }; /* IRQ priorities, ranging from highest to lowest */ | ||
100 | |||
81 | static void (* const irqvector[])(void) = | 101 | static void (* const irqvector[])(void) = |
82 | { | 102 | { |
83 | TIMER0,TIMER1,TIMER2,TIMER3,CCD_VD0,CCD_VD1, | 103 | TIMER0,TIMER1,TIMER2,TIMER3,CCD_VD0,CCD_VD1, |
@@ -150,15 +170,14 @@ void system_reboot(void) | |||
150 | __asm__ __volatile__( | 170 | __asm__ __volatile__( |
151 | "mov ip, #0 \n" | 171 | "mov ip, #0 \n" |
152 | "mcr p15, 0, ip, c7, c7, 0 @ invalidate cache \n" | 172 | "mcr p15, 0, ip, c7, c7, 0 @ invalidate cache \n" |
153 | "mcr p15, 0, ip, c7, c10,4 @ drain WB \n" | 173 | "mcr p15, 0, ip, c7, c10,4 @ drain WB \n" |
154 | "mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4) \n" | 174 | "mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4) \n" |
155 | "mrc p15, 0, ip, c1, c0, 0 @ get ctrl register\n" | 175 | "mrc p15, 0, ip, c1, c0, 0 @ get ctrl register\n" |
156 | "bic ip, ip, #0x000f @ ............wcam \n" | 176 | "bic ip, ip, #0x000f @ ............wcam \n" |
157 | "bic ip, ip, #0x2100 @ ..v....s........ \n" | 177 | "bic ip, ip, #0x2100 @ ..v....s........ \n" |
158 | "mcr p15, 0, ip, c1, c0, 0 @ ctrl register \n" | 178 | "mcr p15, 0, ip, c1, c0, 0 @ ctrl register \n" |
159 | "mov ip, #0xFF000000 \n" | 179 | "mov ip, #0xFF000000 \n" |
160 | "orr ip, ip, #0xFF0000 @ ip = 0xFFFF0000 \n" | 180 | "orr pc, ip, #0xFF0000 @ ip = 0xFFFF0000 \n" |
161 | "mov pc, ip \n" | ||
162 | : | 181 | : |
163 | : | 182 | : |
164 | : "cc" | 183 | : "cc" |
@@ -194,10 +213,10 @@ void system_init(void) | |||
194 | IO_INTC_ENTRY_TBA0 = 0; | 213 | IO_INTC_ENTRY_TBA0 = 0; |
195 | IO_INTC_ENTRY_TBA1 = 0; | 214 | IO_INTC_ENTRY_TBA1 = 0; |
196 | 215 | ||
197 | unsigned short i; | 216 | int i; |
198 | /* Reset interrupt priorities to default values */ | 217 | /* Set interrupt priorities to predefined values */ |
199 | for(i = 0; i < 23; i++) | 218 | for(i = 0; i < 23; i++) |
200 | DM320_REG(0x0540+i*2) = ( (i*2+1) << 8 ) | i*2 ;/* IO_INTC_PRIORITYx */ | 219 | DM320_REG(0x0540+i*2) = ((irqpriority[i*2+1] & 0x3F) << 8) | (irqpriority[i*2] & 0x3F); /* IO_INTC_PRIORITYx */ |
201 | 220 | ||
202 | /* Turn off all timers */ | 221 | /* Turn off all timers */ |
203 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP; | 222 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP; |
@@ -213,6 +232,10 @@ void system_init(void) | |||
213 | 232 | ||
214 | uart_init(); | 233 | uart_init(); |
215 | spi_init(); | 234 | spi_init(); |
235 | |||
236 | #ifdef CREATIVE_ZVM | ||
237 | dma_init(); | ||
238 | #endif | ||
216 | 239 | ||
217 | /* MMU initialization (Starts data and instruction cache) */ | 240 | /* MMU initialization (Starts data and instruction cache) */ |
218 | ttb_init(); | 241 | ttb_init(); |
@@ -229,7 +252,7 @@ void system_init(void) | |||
229 | map_section(0x40000000, 0x40000000, 16, CACHE_NONE); | 252 | map_section(0x40000000, 0x40000000, 16, CACHE_NONE); |
230 | map_section(0x50000000, 0x50000000, 16, CACHE_NONE); | 253 | map_section(0x50000000, 0x50000000, 16, CACHE_NONE); |
231 | map_section(0x60000000, 0x60000000, 16, CACHE_NONE); | 254 | map_section(0x60000000, 0x60000000, 16, CACHE_NONE); |
232 | map_section(0x80000000, 0x80000000, 1, CACHE_NONE); | 255 | map_section(0x80000000, 0x80000000, 1, CACHE_NONE); |
233 | #endif | 256 | #endif |
234 | enable_mmu(); | 257 | enable_mmu(); |
235 | } | 258 | } |