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author | Amaury Pouly <amaury.pouly@gmail.com> | 2017-01-18 14:36:27 +0100 |
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committer | Amaury Pouly <amaury.pouly@gmail.com> | 2017-01-24 15:34:19 +0100 |
commit | 9bb6050d40b9936beda5cb1cd15040f6c1b07179 (patch) | |
tree | 03fa1ad2b5d20db4cae1d8f7b75deb4d98fbdeee /utils/hwstub/stub/system.h | |
parent | f3cce72269703e983e4a4e6ec8dc9217b0c2b6fe (diff) | |
download | rockbox-9bb6050d40b9936beda5cb1cd15040f6c1b07179.tar.gz rockbox-9bb6050d40b9936beda5cb1cd15040f6c1b07179.zip |
hwstub: rewrite exception catching
Since we can catch exceptions like data aborts on read/write, it takes very
little to also catch exceptions in calls. When extending this with the catching
of illegal instructions, the call instruction now becomes much more robust and
also for address and instruction probing. Since we can catch several types of
exception, rename set_data_abort_jmp to set_exception_jmp. At the same time,
simplify the logic in read/write request handlers. Also fix a bug in ARM
jump code: it was using
stmia r1, {..., pc}
as if pc would get current pc + 8 but this is actually implementation defined
on older ARMs (typically pc + 12) and deprecated on newer ARMs, so rewrite the
code avoid that. The set_exception_jmp() function now also reports the exception
type.
Change-Id: Icd0dd52d2456b361b27c4776be09c3d13528ed93
Diffstat (limited to 'utils/hwstub/stub/system.h')
-rw-r--r-- | utils/hwstub/stub/system.h | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/utils/hwstub/stub/system.h b/utils/hwstub/stub/system.h index 09c86debfe..5de08cb40a 100644 --- a/utils/hwstub/stub/system.h +++ b/utils/hwstub/stub/system.h | |||
@@ -21,6 +21,7 @@ | |||
21 | #ifndef __HWSTUB_SYSTEM__ | 21 | #ifndef __HWSTUB_SYSTEM__ |
22 | #define __HWSTUB_SYSTEM__ | 22 | #define __HWSTUB_SYSTEM__ |
23 | 23 | ||
24 | #ifdef ARM_ARCH | ||
24 | #define IRQ_ENABLED 0x00 | 25 | #define IRQ_ENABLED 0x00 |
25 | #define IRQ_DISABLED 0x80 | 26 | #define IRQ_DISABLED 0x80 |
26 | #define IRQ_STATUS 0x80 | 27 | #define IRQ_STATUS 0x80 |
@@ -56,6 +57,7 @@ | |||
56 | #define enable_fiq() \ | 57 | #define enable_fiq() \ |
57 | enable_interrupt(FIQ_STATUS) | 58 | enable_interrupt(FIQ_STATUS) |
58 | 59 | ||
60 | #ifndef __ASSEMBLER__ | ||
59 | static inline int set_interrupt_status(int status, int mask) | 61 | static inline int set_interrupt_status(int status, int mask) |
60 | { | 62 | { |
61 | unsigned long cpsr; | 63 | unsigned long cpsr; |
@@ -113,8 +115,21 @@ static inline int disable_interrupt_save(int mask) | |||
113 | : "i"(mask)); | 115 | : "i"(mask)); |
114 | return cpsr; | 116 | return cpsr; |
115 | } | 117 | } |
118 | #endif /* __ASSEMBLER__ */ | ||
119 | #endif /* ARM_ARCH */ | ||
116 | 120 | ||
117 | int set_data_abort_jmp(void); | 121 | /* Save the current context into a local buffer and return 0. |
122 | * When an exception occurs, typically read/write at invalid address or invalid | ||
123 | * instructions (the exact exceptions caught depend on the architecture), it will | ||
124 | * restore the context to what it was when the function was called except that | ||
125 | * it returns a nonzero value describing the error */ | ||
126 | #define EXCEPTION_NONE 0 /* no exception, returned on the first call */ | ||
127 | #define EXCEPTION_UNSP 1 /* some unspecified exception occured */ | ||
128 | #define EXCEPTION_ADDR 2 /* read/write at an invalid address */ | ||
129 | #define EXCEPTION_INSTR 3 /* invalid instruction */ | ||
130 | |||
131 | #ifndef __ASSEMBLER__ | ||
132 | int set_exception_jmp(void); | ||
133 | #endif /* __ASSEMBLER__ */ | ||
118 | 134 | ||
119 | #endif /* __HWSTUB_SYSTEM__ */ | 135 | #endif /* __HWSTUB_SYSTEM__ */ |
120 | |||