diff options
author | Barry Wardell <rockbox@barrywardell.net> | 2007-08-01 22:19:22 +0000 |
---|---|---|
committer | Barry Wardell <rockbox@barrywardell.net> | 2007-08-01 22:19:22 +0000 |
commit | c5b52205954326e680ed679c47808433595f6f39 (patch) | |
tree | fc0760d86bfa9d5fa68eb2833195dba9b8ec2b9b /utils/disassembler/arm/disasm_arm.c | |
parent | 0b8dd125c3744fbfd4b3162de7882f5dd60f5e0a (diff) | |
download | rockbox-c5b52205954326e680ed679c47808433595f6f39.tar.gz rockbox-c5b52205954326e680ed679c47808433595f6f39.zip |
FS#7182: Second attempt by Dave Chapman at getting ARM disassembler to compile in Linux. This version produces identical output to the Windows version.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14128 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'utils/disassembler/arm/disasm_arm.c')
-rw-r--r-- | utils/disassembler/arm/disasm_arm.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/utils/disassembler/arm/disasm_arm.c b/utils/disassembler/arm/disasm_arm.c index 631eb9d7db..65cb9280a3 100644 --- a/utils/disassembler/arm/disasm_arm.c +++ b/utils/disassembler/arm/disasm_arm.c | |||
@@ -2,8 +2,8 @@ | |||
2 | #include <string.h> | 2 | #include <string.h> |
3 | #include <stdint.h> | 3 | #include <stdint.h> |
4 | 4 | ||
5 | #define ULONG unsigned long | 5 | #define ULONG uint32_t |
6 | #define UCHAR unsigned char | 6 | #define UCHAR uint8_t |
7 | 7 | ||
8 | #define FRMT "0x%x" // "0x%x" | 8 | #define FRMT "0x%x" // "0x%x" |
9 | #define SHFTFRMC "%s %s #%d" // "%s %s %d" | 9 | #define SHFTFRMC "%s %s #%d" // "%s %s %d" |
@@ -162,7 +162,7 @@ void halfword_stg(char *stg, ULONG val) | |||
162 | 162 | ||
163 | void branch_stg(char *stg, ULONG val, ULONG pos) | 163 | void branch_stg(char *stg, ULONG val, ULONG pos) |
164 | { | 164 | { |
165 | ULONG off = pos + ((int)val*256) / 64 + 8; | 165 | ULONG off = pos + (((int32_t)val << 8) >> 6) + 8; |
166 | 166 | ||
167 | if((val & 0x0ffffff0) == 0x012fff10) // bx instruction | 167 | if((val & 0x0ffffff0) == 0x012fff10) // bx instruction |
168 | { sprintf(stg+strlen(stg), "bx%s %s", cond[val>>28], regs[val&15]); } | 168 | { sprintf(stg+strlen(stg), "bx%s %s", cond[val>>28], regs[val&15]); } |
@@ -226,7 +226,7 @@ void opcode_stg(char *stg, ULONG val, ULONG off) | |||
226 | { sprintf(st, "msr%s %s, %s", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR", regs[val&15]); } | 226 | { sprintf(st, "msr%s %s, %s", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR", regs[val&15]); } |
227 | else | 227 | else |
228 | if((((val>>23) & 31) == 6) && ((val & 0x30f000) == 0x20f000)) | 228 | if((((val>>23) & 31) == 6) && ((val & 0x30f000) == 0x20f000)) |
229 | { sprintf(st, "msr%s %s, 0x%x", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR_cf", op2); } | 229 | { sprintf(st, "msr%s %s, %s", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR_cf", op2); } |
230 | else | 230 | else |
231 | if((((val>>23) & 31) == 2) && ((val & 0x300ff0) == 0x000090)) | 231 | if((((val>>23) & 31) == 2) && ((val & 0x300ff0) == 0x000090)) |
232 | { sprintf(st, "swp%s%s %s, %s, [%s]", val&0x400000?"b":"", cnd1[val>>28], regs[(val>>12)&15], regs[val&15], regs[(val>>16)&15]); } | 232 | { sprintf(st, "swp%s%s %s, %s, [%s]", val&0x400000?"b":"", cnd1[val>>28], regs[(val>>12)&15], regs[val&15], regs[(val>>16)&15]); } |
@@ -254,14 +254,15 @@ void single_data(char *stg, ULONG val) | |||
254 | if(val & 0x100000) sprintf(stg+strlen(stg), "ldr%s ", cnd1[val>>28]); | 254 | if(val & 0x100000) sprintf(stg+strlen(stg), "ldr%s ", cnd1[val>>28]); |
255 | else sprintf(stg+strlen(stg), "str%s ", cnd1[val>>28]); | 255 | else sprintf(stg+strlen(stg), "str%s ", cnd1[val>>28]); |
256 | 256 | ||
257 | if(val & 0x2000000) // reg offset | 257 | if(val & 0x2000000) {// reg offset |
258 | if(val & 16) // shift type | 258 | if(val & 16) // shift type |
259 | sprintf(op2, "error: reg defined shift"); | 259 | sprintf(op2, "error: reg defined shift"); |
260 | else | 260 | else |
261 | if((val>>7) & 31) | 261 | if((val>>7) & 31) |
262 | sprintf(op2, SHFTFRMC, regs[val&15], shfts[(val>>5)&3], (val>>7) & 31); | 262 | sprintf(op2, SHFTFRMC, regs[val&15], shfts[(val>>5)&3], (val>>7) & 31); |
263 | else | 263 | else |
264 | sprintf(op2, "%s", regs[val&15]); | 264 | sprintf(op2, "%s", regs[val&15]); |
265 | } | ||
265 | 266 | ||
266 | if(val & 0x2000000) // reg offset | 267 | if(val & 0x2000000) // reg offset |
267 | if(val & 0x1000000) // pre index | 268 | if(val & 0x1000000) // pre index |