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authorMarcin Bukat <marcin.bukat@gmail.com>2013-12-13 22:37:05 +0100
committerMarcin Bukat <marcin.bukat@gmail.com>2013-12-13 22:43:52 +0100
commit87c6df98a34154b77c522196c61d89c6f3797416 (patch)
tree12b785db2c7dfe5efb077de0c63d172430ed6864 /utils/atj2137/adfuload/test_binary/backlight_c/crt0.S
parent32a6ed8903e18b00bf780f303b33f172a5f23eda (diff)
downloadrockbox-87c6df98a34154b77c522196c61d89c6f3797416.tar.gz
rockbox-87c6df98a34154b77c522196c61d89c6f3797416.zip
adfuload: add test program
This test program. I add it mainly to document somehow my work: 1) atj213x.h lists registers addresses 2) crt0.S exploits self relocation of the binary 3) test_bl.c documents how to control backlight on e150 Change-Id: I055e0fe065d926a5c3805b73cea3f537cb64bf52
Diffstat (limited to 'utils/atj2137/adfuload/test_binary/backlight_c/crt0.S')
-rw-r--r--utils/atj2137/adfuload/test_binary/backlight_c/crt0.S80
1 files changed, 80 insertions, 0 deletions
diff --git a/utils/atj2137/adfuload/test_binary/backlight_c/crt0.S b/utils/atj2137/adfuload/test_binary/backlight_c/crt0.S
new file mode 100644
index 0000000000..e3817fcfb7
--- /dev/null
+++ b/utils/atj2137/adfuload/test_binary/backlight_c/crt0.S
@@ -0,0 +1,80 @@
1#include "mips.h"
2
3 .extern main
4 .global start
5
6 .set mips32r2
7 .set noreorder
8 .set noat
9
10 .section .init.text,"ax",%progbits
11
12start:
13 di # disable interrupts
14 bal get_pc # v0 = PC + 8 actually
15 nop
16 addiu v0, -12 # calc real load address
17 la t0, relocstart
18 la t1, relocend
19 beq t0, v0, entry_point # no relocation needed
20 nop
21
22reloc_loop:
23 lw t2, 0(v0) # src
24 addiu v0, 4 # inc src addr
25 sw t2, 0(t0) # dst
26 bne t0, t1, reloc_loop
27 addiu t0, 4 # inc dst addr
28
29entry_point_jump:
30 la t0, entry_point
31 jr t0
32 nop
33
34get_pc:
35 move v0, ra
36 jr ra
37 nop
38
39entry_point:
40 # setup caches
41 # 4-way, 256 sets, 16 bytes cacheline I/D
42 li t0, 3 # enable cache for kseg0 accesses
43 mtc0 t0, C0_CONFIG
44
45 la t0, 0x80000000 # an idx op should use an unmappable address
46 ori t1, t0, 0x4000 # 16kB cache
47 mtc0 zero, C0_TAGLO
48 mtc0 zero, C0_TAGHI
49
50cache_init_loop:
51 cache 8, 0(t0) # index store icache tag
52 cache 9, 0(t0) # index store dcache tag
53 bne t0, t1, cache_init_loop
54 addiu t0, t0, 0x10
55
56 # clear bss
57 la t0, bssbegin
58 la t1, bssend
59
60clear_bss_loop:
61 sw zero, 0(t0)
62 bne t0, t1, clear_bss_loop
63 addiu t0, 4
64
65 # setup stack
66 la sp, stackend
67 la t0, stackbegin
68 li t1, 0xdeadbeef
69
70stack_munge_loop:
71 sw t1, 0(t0)
72 bne t0, sp, stack_munge_loop
73 addiu t0, 4
74
75 # jump to C code
76 j main
77 nop
78
79 .set at
80 .set reorder