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author | Aidan MacDonald <amachronic@protonmail.com> | 2022-06-07 19:30:59 +0100 |
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committer | Aidan MacDonald <amachronic@protonmail.com> | 2022-07-10 15:22:32 +0100 |
commit | 47cbeb2e67288dcff95a47261b58306c107b4bd6 (patch) | |
tree | e2a802a77f30da12647861f4274df449323a9a0f /manual | |
parent | df29c7991ab70c764165da08807e5610055031b0 (diff) | |
download | rockbox-47cbeb2e67288dcff95a47261b58306c107b4bd6.tar.gz rockbox-47cbeb2e67288dcff95a47261b58306c107b4bd6.zip |
x1000: add support for simple on-die ECC with NAND flash
Many SPI NAND flash chips have on-die ECC engines that report
ECC status via the status feature register. This code handles
the common case where ECC status is reported with 2 bits: one
bit to indicate if flips were detected & corrected, and another
bit to indicate an uncorrectable error.
Change-Id: I5d587cd960ca9d090d2629e890724a6bc411e70c
Diffstat (limited to 'manual')
0 files changed, 0 insertions, 0 deletions