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author | Sean Bartell <wingedtachikoma@gmail.com> | 2011-06-25 21:32:25 -0400 |
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committer | Nils Wallménius <nils@rockbox.org> | 2012-04-25 22:13:20 +0200 |
commit | f40bfc9267b13b54e6379dfe7539447662879d24 (patch) | |
tree | 9b20069d5e62809ff434061ad730096836f916f2 /lib/rbcodec/codecs/libspeex/fixed_arm5e.h | |
parent | a0009907de7a0107d49040d8a180f140e2eff299 (diff) | |
download | rockbox-f40bfc9267b13b54e6379dfe7539447662879d24.tar.gz rockbox-f40bfc9267b13b54e6379dfe7539447662879d24.zip |
Add codecs to librbcodec.
Change-Id: Id7f4717d51ed02d67cb9f9cb3c0ada4a81843f97
Reviewed-on: http://gerrit.rockbox.org/137
Reviewed-by: Nils Wallménius <nils@rockbox.org>
Tested-by: Nils Wallménius <nils@rockbox.org>
Diffstat (limited to 'lib/rbcodec/codecs/libspeex/fixed_arm5e.h')
-rw-r--r-- | lib/rbcodec/codecs/libspeex/fixed_arm5e.h | 178 |
1 files changed, 178 insertions, 0 deletions
diff --git a/lib/rbcodec/codecs/libspeex/fixed_arm5e.h b/lib/rbcodec/codecs/libspeex/fixed_arm5e.h new file mode 100644 index 0000000000..9b4861c9a7 --- /dev/null +++ b/lib/rbcodec/codecs/libspeex/fixed_arm5e.h | |||
@@ -0,0 +1,178 @@ | |||
1 | /* Copyright (C) 2003 Jean-Marc Valin */ | ||
2 | /** | ||
3 | @file fixed_arm5e.h | ||
4 | @brief ARM-tuned fixed-point operations | ||
5 | */ | ||
6 | /* | ||
7 | Redistribution and use in source and binary forms, with or without | ||
8 | modification, are permitted provided that the following conditions | ||
9 | are met: | ||
10 | |||
11 | - Redistributions of source code must retain the above copyright | ||
12 | notice, this list of conditions and the following disclaimer. | ||
13 | |||
14 | - Redistributions in binary form must reproduce the above copyright | ||
15 | notice, this list of conditions and the following disclaimer in the | ||
16 | documentation and/or other materials provided with the distribution. | ||
17 | |||
18 | - Neither the name of the Xiph.org Foundation nor the names of its | ||
19 | contributors may be used to endorse or promote products derived from | ||
20 | this software without specific prior written permission. | ||
21 | |||
22 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
23 | ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
24 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
25 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR | ||
26 | CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | ||
27 | EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, | ||
28 | PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR | ||
29 | PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF | ||
30 | LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING | ||
31 | NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
32 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
33 | */ | ||
34 | |||
35 | #ifndef FIXED_ARM5E_H | ||
36 | #define FIXED_ARM5E_H | ||
37 | |||
38 | #undef MULT16_16 | ||
39 | static inline spx_word32_t MULT16_16(spx_word16_t x, spx_word16_t y) { | ||
40 | int res; | ||
41 | asm ("smulbb %0,%1,%2;\n" | ||
42 | : "=&r"(res) | ||
43 | : "%r"(x),"r"(y)); | ||
44 | return(res); | ||
45 | } | ||
46 | |||
47 | #undef MAC16_16 | ||
48 | static inline spx_word32_t MAC16_16(spx_word32_t a, spx_word16_t x, spx_word32_t y) { | ||
49 | int res; | ||
50 | asm ("smlabb %0,%1,%2,%3;\n" | ||
51 | : "=&r"(res) | ||
52 | : "%r"(x),"r"(y),"r"(a)); | ||
53 | return(res); | ||
54 | } | ||
55 | |||
56 | #undef MULT16_32_Q15 | ||
57 | static inline spx_word32_t MULT16_32_Q15(spx_word16_t x, spx_word32_t y) { | ||
58 | int res; | ||
59 | asm ("smulwb %0,%1,%2;\n" | ||
60 | : "=&r"(res) | ||
61 | : "%r"(y<<1),"r"(x)); | ||
62 | return(res); | ||
63 | } | ||
64 | |||
65 | #undef MAC16_32_Q15 | ||
66 | static inline spx_word32_t MAC16_32_Q15(spx_word32_t a, spx_word16_t x, spx_word32_t y) { | ||
67 | int res; | ||
68 | asm ("smlawb %0,%1,%2,%3;\n" | ||
69 | : "=&r"(res) | ||
70 | : "%r"(y<<1),"r"(x),"r"(a)); | ||
71 | return(res); | ||
72 | } | ||
73 | |||
74 | #undef MULT16_32_Q11 | ||
75 | static inline spx_word32_t MULT16_32_Q11(spx_word16_t x, spx_word32_t y) { | ||
76 | int res; | ||
77 | asm ("smulwb %0,%1,%2;\n" | ||
78 | : "=&r"(res) | ||
79 | : "%r"(y<<5),"r"(x)); | ||
80 | return(res); | ||
81 | } | ||
82 | |||
83 | #undef MAC16_32_Q11 | ||
84 | static inline spx_word32_t MAC16_32_Q11(spx_word32_t a, spx_word16_t x, spx_word32_t y) { | ||
85 | int res; | ||
86 | asm ("smlawb %0,%1,%2,%3;\n" | ||
87 | : "=&r"(res) | ||
88 | : "%r"(y<<5),"r"(x),"r"(a)); | ||
89 | return(res); | ||
90 | } | ||
91 | |||
92 | #undef DIV32_16 | ||
93 | static inline short DIV32_16(int a, int b) | ||
94 | { | ||
95 | int res=0; | ||
96 | int dead1, dead2, dead3, dead4, dead5; | ||
97 | __asm__ __volatile__ ( | ||
98 | "\teor %5, %0, %1\n" | ||
99 | "\tmovs %4, %0\n" | ||
100 | "\trsbmi %0, %0, #0 \n" | ||
101 | "\tmovs %4, %1\n" | ||
102 | "\trsbmi %1, %1, #0 \n" | ||
103 | "\tmov %4, #1\n" | ||
104 | |||
105 | "\tsubs %3, %0, %1, asl #14 \n" | ||
106 | "\torrpl %2, %2, %4, asl #14 \n" | ||
107 | "\tmovpl %0, %3 \n" | ||
108 | |||
109 | "\tsubs %3, %0, %1, asl #13 \n" | ||
110 | "\torrpl %2, %2, %4, asl #13 \n" | ||
111 | "\tmovpl %0, %3 \n" | ||
112 | |||
113 | "\tsubs %3, %0, %1, asl #12 \n" | ||
114 | "\torrpl %2, %2, %4, asl #12 \n" | ||
115 | "\tmovpl %0, %3 \n" | ||
116 | |||
117 | "\tsubs %3, %0, %1, asl #11 \n" | ||
118 | "\torrpl %2, %2, %4, asl #11 \n" | ||
119 | "\tmovpl %0, %3 \n" | ||
120 | |||
121 | "\tsubs %3, %0, %1, asl #10 \n" | ||
122 | "\torrpl %2, %2, %4, asl #10 \n" | ||
123 | "\tmovpl %0, %3 \n" | ||
124 | |||
125 | "\tsubs %3, %0, %1, asl #9 \n" | ||
126 | "\torrpl %2, %2, %4, asl #9 \n" | ||
127 | "\tmovpl %0, %3 \n" | ||
128 | |||
129 | "\tsubs %3, %0, %1, asl #8 \n" | ||
130 | "\torrpl %2, %2, %4, asl #8 \n" | ||
131 | "\tmovpl %0, %3 \n" | ||
132 | |||
133 | "\tsubs %3, %0, %1, asl #7 \n" | ||
134 | "\torrpl %2, %2, %4, asl #7 \n" | ||
135 | "\tmovpl %0, %3 \n" | ||
136 | |||
137 | "\tsubs %3, %0, %1, asl #6 \n" | ||
138 | "\torrpl %2, %2, %4, asl #6 \n" | ||
139 | "\tmovpl %0, %3 \n" | ||
140 | |||
141 | "\tsubs %3, %0, %1, asl #5 \n" | ||
142 | "\torrpl %2, %2, %4, asl #5 \n" | ||
143 | "\tmovpl %0, %3 \n" | ||
144 | |||
145 | "\tsubs %3, %0, %1, asl #4 \n" | ||
146 | "\torrpl %2, %2, %4, asl #4 \n" | ||
147 | "\tmovpl %0, %3 \n" | ||
148 | |||
149 | "\tsubs %3, %0, %1, asl #3 \n" | ||
150 | "\torrpl %2, %2, %4, asl #3 \n" | ||
151 | "\tmovpl %0, %3 \n" | ||
152 | |||
153 | "\tsubs %3, %0, %1, asl #2 \n" | ||
154 | "\torrpl %2, %2, %4, asl #2 \n" | ||
155 | "\tmovpl %0, %3 \n" | ||
156 | |||
157 | "\tsubs %3, %0, %1, asl #1 \n" | ||
158 | "\torrpl %2, %2, %4, asl #1 \n" | ||
159 | "\tmovpl %0, %3 \n" | ||
160 | |||
161 | "\tsubs %3, %0, %1 \n" | ||
162 | "\torrpl %2, %2, %4 \n" | ||
163 | "\tmovpl %0, %3 \n" | ||
164 | |||
165 | "\tmovs %5, %5, lsr #31 \n" | ||
166 | "\trsbne %2, %2, #0 \n" | ||
167 | : "=r" (dead1), "=r" (dead2), "=r" (res), | ||
168 | "=r" (dead3), "=r" (dead4), "=r" (dead5) | ||
169 | : "0" (a), "1" (b), "2" (res) | ||
170 | : "memory", "cc" | ||
171 | ); | ||
172 | return res; | ||
173 | } | ||
174 | |||
175 | |||
176 | |||
177 | |||
178 | #endif | ||