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author | Nils Wallménius <nils@rockbox.org> | 2013-12-11 22:59:14 +0100 |
---|---|---|
committer | Nils Wallménius <nils@rockbox.org> | 2013-12-16 21:13:23 +0100 |
commit | e3c2ed7a71f65dc721c7210f120259ecd4ff65cb (patch) | |
tree | de593c1e927dcc036f1b6656f1f881995491b3b9 /lib/rbcodec/codecs/libopus/silk/arm/macros_armv5e.h | |
parent | d0918b98fa0cfba21208a4fb5ed153687b8f02c3 (diff) | |
download | rockbox-e3c2ed7a71f65dc721c7210f120259ecd4ff65cb.tar.gz rockbox-e3c2ed7a71f65dc721c7210f120259ecd4ff65cb.zip |
Sync libopus to upstream release 1.1
Change-Id: I9fea7460fc33f60faff961b3389dd97b5191463c
Diffstat (limited to 'lib/rbcodec/codecs/libopus/silk/arm/macros_armv5e.h')
-rw-r--r-- | lib/rbcodec/codecs/libopus/silk/arm/macros_armv5e.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/lib/rbcodec/codecs/libopus/silk/arm/macros_armv5e.h b/lib/rbcodec/codecs/libopus/silk/arm/macros_armv5e.h index 63b1e30f48..aad4117e46 100644 --- a/lib/rbcodec/codecs/libopus/silk/arm/macros_armv5e.h +++ b/lib/rbcodec/codecs/libopus/silk/arm/macros_armv5e.h | |||
@@ -31,7 +31,7 @@ POSSIBILITY OF SUCH DAMAGE. | |||
31 | 31 | ||
32 | /* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */ | 32 | /* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */ |
33 | #undef silk_SMULWB | 33 | #undef silk_SMULWB |
34 | static inline opus_int32 silk_SMULWB_armv5e(opus_int32 a, opus_int16 b) | 34 | static OPUS_INLINE opus_int32 silk_SMULWB_armv5e(opus_int32 a, opus_int16 b) |
35 | { | 35 | { |
36 | int res; | 36 | int res; |
37 | __asm__( | 37 | __asm__( |
@@ -46,7 +46,7 @@ static inline opus_int32 silk_SMULWB_armv5e(opus_int32 a, opus_int16 b) | |||
46 | 46 | ||
47 | /* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */ | 47 | /* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */ |
48 | #undef silk_SMLAWB | 48 | #undef silk_SMLAWB |
49 | static inline opus_int32 silk_SMLAWB_armv5e(opus_int32 a, opus_int32 b, | 49 | static OPUS_INLINE opus_int32 silk_SMLAWB_armv5e(opus_int32 a, opus_int32 b, |
50 | opus_int16 c) | 50 | opus_int16 c) |
51 | { | 51 | { |
52 | int res; | 52 | int res; |
@@ -62,7 +62,7 @@ static inline opus_int32 silk_SMLAWB_armv5e(opus_int32 a, opus_int32 b, | |||
62 | 62 | ||
63 | /* (a32 * (b32 >> 16)) >> 16 */ | 63 | /* (a32 * (b32 >> 16)) >> 16 */ |
64 | #undef silk_SMULWT | 64 | #undef silk_SMULWT |
65 | static inline opus_int32 silk_SMULWT_armv5e(opus_int32 a, opus_int32 b) | 65 | static OPUS_INLINE opus_int32 silk_SMULWT_armv5e(opus_int32 a, opus_int32 b) |
66 | { | 66 | { |
67 | int res; | 67 | int res; |
68 | __asm__( | 68 | __asm__( |
@@ -77,7 +77,7 @@ static inline opus_int32 silk_SMULWT_armv5e(opus_int32 a, opus_int32 b) | |||
77 | 77 | ||
78 | /* a32 + (b32 * (c32 >> 16)) >> 16 */ | 78 | /* a32 + (b32 * (c32 >> 16)) >> 16 */ |
79 | #undef silk_SMLAWT | 79 | #undef silk_SMLAWT |
80 | static inline opus_int32 silk_SMLAWT_armv5e(opus_int32 a, opus_int32 b, | 80 | static OPUS_INLINE opus_int32 silk_SMLAWT_armv5e(opus_int32 a, opus_int32 b, |
81 | opus_int32 c) | 81 | opus_int32 c) |
82 | { | 82 | { |
83 | int res; | 83 | int res; |
@@ -93,7 +93,7 @@ static inline opus_int32 silk_SMLAWT_armv5e(opus_int32 a, opus_int32 b, | |||
93 | 93 | ||
94 | /* (opus_int32)((opus_int16)(a3))) * (opus_int32)((opus_int16)(b32)) output have to be 32bit int */ | 94 | /* (opus_int32)((opus_int16)(a3))) * (opus_int32)((opus_int16)(b32)) output have to be 32bit int */ |
95 | #undef silk_SMULBB | 95 | #undef silk_SMULBB |
96 | static inline opus_int32 silk_SMULBB_armv5e(opus_int32 a, opus_int32 b) | 96 | static OPUS_INLINE opus_int32 silk_SMULBB_armv5e(opus_int32 a, opus_int32 b) |
97 | { | 97 | { |
98 | int res; | 98 | int res; |
99 | __asm__( | 99 | __asm__( |
@@ -108,7 +108,7 @@ static inline opus_int32 silk_SMULBB_armv5e(opus_int32 a, opus_int32 b) | |||
108 | 108 | ||
109 | /* a32 + (opus_int32)((opus_int16)(b32)) * (opus_int32)((opus_int16)(c32)) output have to be 32bit int */ | 109 | /* a32 + (opus_int32)((opus_int16)(b32)) * (opus_int32)((opus_int16)(c32)) output have to be 32bit int */ |
110 | #undef silk_SMLABB | 110 | #undef silk_SMLABB |
111 | static inline opus_int32 silk_SMLABB_armv5e(opus_int32 a, opus_int32 b, | 111 | static OPUS_INLINE opus_int32 silk_SMLABB_armv5e(opus_int32 a, opus_int32 b, |
112 | opus_int32 c) | 112 | opus_int32 c) |
113 | { | 113 | { |
114 | int res; | 114 | int res; |
@@ -124,7 +124,7 @@ static inline opus_int32 silk_SMLABB_armv5e(opus_int32 a, opus_int32 b, | |||
124 | 124 | ||
125 | /* (opus_int32)((opus_int16)(a32)) * (b32 >> 16) */ | 125 | /* (opus_int32)((opus_int16)(a32)) * (b32 >> 16) */ |
126 | #undef silk_SMULBT | 126 | #undef silk_SMULBT |
127 | static inline opus_int32 silk_SMULBT_armv5e(opus_int32 a, opus_int32 b) | 127 | static OPUS_INLINE opus_int32 silk_SMULBT_armv5e(opus_int32 a, opus_int32 b) |
128 | { | 128 | { |
129 | int res; | 129 | int res; |
130 | __asm__( | 130 | __asm__( |
@@ -139,7 +139,7 @@ static inline opus_int32 silk_SMULBT_armv5e(opus_int32 a, opus_int32 b) | |||
139 | 139 | ||
140 | /* a32 + (opus_int32)((opus_int16)(b32)) * (c32 >> 16) */ | 140 | /* a32 + (opus_int32)((opus_int16)(b32)) * (c32 >> 16) */ |
141 | #undef silk_SMLABT | 141 | #undef silk_SMLABT |
142 | static inline opus_int32 silk_SMLABT_armv5e(opus_int32 a, opus_int32 b, | 142 | static OPUS_INLINE opus_int32 silk_SMLABT_armv5e(opus_int32 a, opus_int32 b, |
143 | opus_int32 c) | 143 | opus_int32 c) |
144 | { | 144 | { |
145 | int res; | 145 | int res; |
@@ -155,7 +155,7 @@ static inline opus_int32 silk_SMLABT_armv5e(opus_int32 a, opus_int32 b, | |||
155 | 155 | ||
156 | /* add/subtract with output saturated */ | 156 | /* add/subtract with output saturated */ |
157 | #undef silk_ADD_SAT32 | 157 | #undef silk_ADD_SAT32 |
158 | static inline opus_int32 silk_ADD_SAT32_armv5e(opus_int32 a, opus_int32 b) | 158 | static OPUS_INLINE opus_int32 silk_ADD_SAT32_armv5e(opus_int32 a, opus_int32 b) |
159 | { | 159 | { |
160 | int res; | 160 | int res; |
161 | __asm__( | 161 | __asm__( |
@@ -169,7 +169,7 @@ static inline opus_int32 silk_ADD_SAT32_armv5e(opus_int32 a, opus_int32 b) | |||
169 | #define silk_ADD_SAT32(a, b) (silk_ADD_SAT32_armv5e(a, b)) | 169 | #define silk_ADD_SAT32(a, b) (silk_ADD_SAT32_armv5e(a, b)) |
170 | 170 | ||
171 | #undef silk_SUB_SAT32 | 171 | #undef silk_SUB_SAT32 |
172 | static inline opus_int32 silk_SUB_SAT32_armv5e(opus_int32 a, opus_int32 b) | 172 | static OPUS_INLINE opus_int32 silk_SUB_SAT32_armv5e(opus_int32 a, opus_int32 b) |
173 | { | 173 | { |
174 | int res; | 174 | int res; |
175 | __asm__( | 175 | __asm__( |
@@ -183,7 +183,7 @@ static inline opus_int32 silk_SUB_SAT32_armv5e(opus_int32 a, opus_int32 b) | |||
183 | #define silk_SUB_SAT32(a, b) (silk_SUB_SAT32_armv5e(a, b)) | 183 | #define silk_SUB_SAT32(a, b) (silk_SUB_SAT32_armv5e(a, b)) |
184 | 184 | ||
185 | #undef silk_CLZ16 | 185 | #undef silk_CLZ16 |
186 | static inline opus_int32 silk_CLZ16_armv5(opus_int16 in16) | 186 | static OPUS_INLINE opus_int32 silk_CLZ16_armv5(opus_int16 in16) |
187 | { | 187 | { |
188 | int res; | 188 | int res; |
189 | __asm__( | 189 | __asm__( |
@@ -197,7 +197,7 @@ static inline opus_int32 silk_CLZ16_armv5(opus_int16 in16) | |||
197 | #define silk_CLZ16(in16) (silk_CLZ16_armv5(in16)) | 197 | #define silk_CLZ16(in16) (silk_CLZ16_armv5(in16)) |
198 | 198 | ||
199 | #undef silk_CLZ32 | 199 | #undef silk_CLZ32 |
200 | static inline opus_int32 silk_CLZ32_armv5(opus_int32 in32) | 200 | static OPUS_INLINE opus_int32 silk_CLZ32_armv5(opus_int32 in32) |
201 | { | 201 | { |
202 | int res; | 202 | int res; |
203 | __asm__( | 203 | __asm__( |