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author | Nils Wallménius <nils@rockbox.org> | 2013-12-11 22:59:14 +0100 |
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committer | Nils Wallménius <nils@rockbox.org> | 2013-12-16 21:13:23 +0100 |
commit | e3c2ed7a71f65dc721c7210f120259ecd4ff65cb (patch) | |
tree | de593c1e927dcc036f1b6656f1f881995491b3b9 /lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h | |
parent | d0918b98fa0cfba21208a4fb5ed153687b8f02c3 (diff) | |
download | rockbox-e3c2ed7a71f65dc721c7210f120259ecd4ff65cb.tar.gz rockbox-e3c2ed7a71f65dc721c7210f120259ecd4ff65cb.zip |
Sync libopus to upstream release 1.1
Change-Id: I9fea7460fc33f60faff961b3389dd97b5191463c
Diffstat (limited to 'lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h')
-rw-r--r-- | lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h b/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h index 58df6c2e2b..3f30e97288 100644 --- a/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h +++ b/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h | |||
@@ -30,7 +30,7 @@ POSSIBILITY OF SUCH DAMAGE. | |||
30 | 30 | ||
31 | /* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */ | 31 | /* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */ |
32 | #undef silk_SMULWB | 32 | #undef silk_SMULWB |
33 | static inline opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b) | 33 | static OPUS_INLINE opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b) |
34 | { | 34 | { |
35 | unsigned rd_lo; | 35 | unsigned rd_lo; |
36 | int rd_hi; | 36 | int rd_hi; |
@@ -50,7 +50,7 @@ static inline opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b) | |||
50 | 50 | ||
51 | /* (a32 * (b32 >> 16)) >> 16 */ | 51 | /* (a32 * (b32 >> 16)) >> 16 */ |
52 | #undef silk_SMULWT | 52 | #undef silk_SMULWT |
53 | static inline opus_int32 silk_SMULWT_armv4(opus_int32 a, opus_int32 b) | 53 | static OPUS_INLINE opus_int32 silk_SMULWT_armv4(opus_int32 a, opus_int32 b) |
54 | { | 54 | { |
55 | unsigned rd_lo; | 55 | unsigned rd_lo; |
56 | int rd_hi; | 56 | int rd_hi; |
@@ -70,7 +70,7 @@ static inline opus_int32 silk_SMULWT_armv4(opus_int32 a, opus_int32 b) | |||
70 | 70 | ||
71 | /* (a32 * b32) >> 16 */ | 71 | /* (a32 * b32) >> 16 */ |
72 | #undef silk_SMULWW | 72 | #undef silk_SMULWW |
73 | static inline opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b) | 73 | static OPUS_INLINE opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b) |
74 | { | 74 | { |
75 | unsigned rd_lo; | 75 | unsigned rd_lo; |
76 | int rd_hi; | 76 | int rd_hi; |
@@ -85,7 +85,7 @@ static inline opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b) | |||
85 | #define silk_SMULWW(a, b) (silk_SMULWW_armv4(a, b)) | 85 | #define silk_SMULWW(a, b) (silk_SMULWW_armv4(a, b)) |
86 | 86 | ||
87 | #undef silk_SMLAWW | 87 | #undef silk_SMLAWW |
88 | static inline opus_int32 silk_SMLAWW_armv4(opus_int32 a, opus_int32 b, | 88 | static OPUS_INLINE opus_int32 silk_SMLAWW_armv4(opus_int32 a, opus_int32 b, |
89 | opus_int32 c) | 89 | opus_int32 c) |
90 | { | 90 | { |
91 | unsigned rd_lo; | 91 | unsigned rd_lo; |