summaryrefslogtreecommitdiff
path: root/lib/rbcodec/codecs/libopus/celt/entcode.c
diff options
context:
space:
mode:
authorNils Wallménius <nils@rockbox.org>2013-05-20 22:25:57 +0200
committerNils Wallménius <nils@rockbox.org>2013-08-31 08:30:51 +0200
commit580b307fd791c0997a8831bc800bba87797bfb7e (patch)
tree807846056f06fd944a750ce41217a877910ebd59 /lib/rbcodec/codecs/libopus/celt/entcode.c
parent74761b70acd96cecc0d35450dd56a98ad9ee7d3d (diff)
downloadrockbox-580b307fd791c0997a8831bc800bba87797bfb7e.tar.gz
rockbox-580b307fd791c0997a8831bc800bba87797bfb7e.zip
Sync opus codec to upstream git
Sync opus codec to upstream commit 02fed471a4568852d6618e041c4f2af0d7730ee2 (August 30 2013) This brings in a lot of optimizations but also makes the diff between our codec and the upstream much smaller as most of our optimizations have been upstreamed or supeceded. Speedups across the board for CELT mode files: 64kbps 128kbps H300 9.82MHz 15.48MHz c200 4.86MHz 9.63MHz fuze v1 10.32MHz 15.92MHz For the silk mode test file (16kbps) arm targets get a speedup of about 2MHz while the H300 is 7.8MHz slower, likely because it's now using the pseudostack more rather than the real stack which is in iram. Patches to get around that are upcomming. Change-Id: Ifecf963e461c51ac42e09dac1e91bc4bc3b12fa3
Diffstat (limited to 'lib/rbcodec/codecs/libopus/celt/entcode.c')
-rw-r--r--lib/rbcodec/codecs/libopus/celt/entcode.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/rbcodec/codecs/libopus/celt/entcode.c b/lib/rbcodec/codecs/libopus/celt/entcode.c
index 80e64fefaa..fa5d7c7c2c 100644
--- a/lib/rbcodec/codecs/libopus/celt/entcode.c
+++ b/lib/rbcodec/codecs/libopus/celt/entcode.c
@@ -26,13 +26,18 @@
26*/ 26*/
27 27
28#ifdef HAVE_CONFIG_H 28#ifdef HAVE_CONFIG_H
29#include "opus_config.h" 29#include "config.h"
30#endif 30#endif
31 31
32#include "entcode.h" 32#include "entcode.h"
33#include "arch.h" 33#include "arch.h"
34 34
35#if !defined(EC_CLZ) 35#if !defined(EC_CLZ)
36/*This is a fallback for systems where we don't know how to access
37 a BSR or CLZ instruction (see ecintrin.h).
38 If you are optimizing Opus on a new platform and it has a native CLZ or
39 BZR (e.g. cell, MIPS, x86, etc) then making it available to Opus will be
40 an easy performance win.*/
36int ec_ilog(opus_uint32 _v){ 41int ec_ilog(opus_uint32 _v){
37 /*On a Pentium M, this branchless version tested as the fastest on 42 /*On a Pentium M, this branchless version tested as the fastest on
38 1,000,000,000 random 32-bit integers, edging out a similar version with 43 1,000,000,000 random 32-bit integers, edging out a similar version with