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authorNils Wallménius <nils@rockbox.org>2013-05-20 22:25:57 +0200
committerNils Wallménius <nils@rockbox.org>2013-08-31 08:30:51 +0200
commit580b307fd791c0997a8831bc800bba87797bfb7e (patch)
tree807846056f06fd944a750ce41217a877910ebd59 /lib/rbcodec/codecs/libopus/celt/arm/fixed_armv4.h
parent74761b70acd96cecc0d35450dd56a98ad9ee7d3d (diff)
downloadrockbox-580b307fd791c0997a8831bc800bba87797bfb7e.tar.gz
rockbox-580b307fd791c0997a8831bc800bba87797bfb7e.zip
Sync opus codec to upstream git
Sync opus codec to upstream commit 02fed471a4568852d6618e041c4f2af0d7730ee2 (August 30 2013) This brings in a lot of optimizations but also makes the diff between our codec and the upstream much smaller as most of our optimizations have been upstreamed or supeceded. Speedups across the board for CELT mode files: 64kbps 128kbps H300 9.82MHz 15.48MHz c200 4.86MHz 9.63MHz fuze v1 10.32MHz 15.92MHz For the silk mode test file (16kbps) arm targets get a speedup of about 2MHz while the H300 is 7.8MHz slower, likely because it's now using the pseudostack more rather than the real stack which is in iram. Patches to get around that are upcomming. Change-Id: Ifecf963e461c51ac42e09dac1e91bc4bc3b12fa3
Diffstat (limited to 'lib/rbcodec/codecs/libopus/celt/arm/fixed_armv4.h')
-rw-r--r--lib/rbcodec/codecs/libopus/celt/arm/fixed_armv4.h76
1 files changed, 76 insertions, 0 deletions
diff --git a/lib/rbcodec/codecs/libopus/celt/arm/fixed_armv4.h b/lib/rbcodec/codecs/libopus/celt/arm/fixed_armv4.h
new file mode 100644
index 0000000000..bcacc343e8
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+++ b/lib/rbcodec/codecs/libopus/celt/arm/fixed_armv4.h
@@ -0,0 +1,76 @@
1/* Copyright (C) 2013 Xiph.Org Foundation and contributors */
2/*
3 Redistribution and use in source and binary forms, with or without
4 modification, are permitted provided that the following conditions
5 are met:
6
7 - Redistributions of source code must retain the above copyright
8 notice, this list of conditions and the following disclaimer.
9
10 - Redistributions in binary form must reproduce the above copyright
11 notice, this list of conditions and the following disclaimer in the
12 documentation and/or other materials provided with the distribution.
13
14 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
15 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
16 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
17 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
18 OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
21 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
22 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
23 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25*/
26
27#ifndef FIXED_ARMv4_H
28#define FIXED_ARMv4_H
29
30/** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 bits */
31#undef MULT16_32_Q16
32static inline opus_val32 MULT16_32_Q16_armv4(opus_val16 a, opus_val32 b)
33{
34 unsigned rd_lo;
35 int rd_hi;
36 __asm__(
37 "#MULT16_32_Q16\n\t"
38 "smull %0, %1, %2, %3\n\t"
39 : "=&r"(rd_lo), "=&r"(rd_hi)
40 : "%r"(b),"r"(a<<16)
41 );
42 return rd_hi;
43}
44#define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv4(a, b))
45
46
47/** 16x32 multiplication, followed by a 15-bit shift right. Results fits in 32 bits */
48#undef MULT16_32_Q15
49static inline opus_val32 MULT16_32_Q15_armv4(opus_val16 a, opus_val32 b)
50{
51 unsigned rd_lo;
52 int rd_hi;
53 __asm__(
54 "#MULT16_32_Q15\n\t"
55 "smull %0, %1, %2, %3\n\t"
56 : "=&r"(rd_lo), "=&r"(rd_hi)
57 : "%r"(b), "r"(a<<16)
58 );
59 /*We intentionally don't OR in the high bit of rd_lo for speed.*/
60 return rd_hi<<1;
61}
62#define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv4(a, b))
63
64
65/** 16x32 multiply, followed by a 15-bit shift right and 32-bit add.
66 b must fit in 31 bits.
67 Result fits in 32 bits. */
68#undef MAC16_32_Q15
69#define MAC16_32_Q15(c, a, b) ADD32(c, MULT16_32_Q15(a, b))
70
71
72/** 32x32 multiplication, followed by a 31-bit shift right. Results fits in 32 bits */
73#undef MULT32_32_Q31
74#define MULT32_32_Q31(a,b) (opus_val32)((((opus_int64)(a)) * ((opus_int64)(b)))>>31)
75
76#endif