diff options
author | Nils Wallménius <nils@rockbox.org> | 2013-05-20 22:25:57 +0200 |
---|---|---|
committer | Nils Wallménius <nils@rockbox.org> | 2013-08-31 08:30:51 +0200 |
commit | 580b307fd791c0997a8831bc800bba87797bfb7e (patch) | |
tree | 807846056f06fd944a750ce41217a877910ebd59 /lib/rbcodec/codecs/libopus/celt/_kiss_fft_guts.h | |
parent | 74761b70acd96cecc0d35450dd56a98ad9ee7d3d (diff) | |
download | rockbox-580b307fd791c0997a8831bc800bba87797bfb7e.tar.gz rockbox-580b307fd791c0997a8831bc800bba87797bfb7e.zip |
Sync opus codec to upstream git
Sync opus codec to upstream commit
02fed471a4568852d6618e041c4f2af0d7730ee2 (August 30 2013)
This brings in a lot of optimizations but also makes the diff
between our codec and the upstream much smaller as most of our
optimizations have been upstreamed or supeceded.
Speedups across the board for CELT mode files:
64kbps 128kbps
H300 9.82MHz 15.48MHz
c200 4.86MHz 9.63MHz
fuze v1 10.32MHz 15.92MHz
For the silk mode test file (16kbps) arm targets get a speedup
of about 2MHz while the H300 is 7.8MHz slower, likely because it's
now using the pseudostack more rather than the real stack which
is in iram. Patches to get around that are upcomming.
Change-Id: Ifecf963e461c51ac42e09dac1e91bc4bc3b12fa3
Diffstat (limited to 'lib/rbcodec/codecs/libopus/celt/_kiss_fft_guts.h')
-rw-r--r-- | lib/rbcodec/codecs/libopus/celt/_kiss_fft_guts.h | 79 |
1 files changed, 12 insertions, 67 deletions
diff --git a/lib/rbcodec/codecs/libopus/celt/_kiss_fft_guts.h b/lib/rbcodec/codecs/libopus/celt/_kiss_fft_guts.h index 63e2548843..866a6520ca 100644 --- a/lib/rbcodec/codecs/libopus/celt/_kiss_fft_guts.h +++ b/lib/rbcodec/codecs/libopus/celt/_kiss_fft_guts.h | |||
@@ -61,76 +61,9 @@ | |||
61 | do{ (m).r = SUB32(S_MUL((a).r,(b).r) , S_MUL((a).i,(b).i)); \ | 61 | do{ (m).r = SUB32(S_MUL((a).r,(b).r) , S_MUL((a).i,(b).i)); \ |
62 | (m).i = ADD32(S_MUL((a).r,(b).i) , S_MUL((a).i,(b).r)); }while(0) | 62 | (m).i = ADD32(S_MUL((a).r,(b).i) , S_MUL((a).i,(b).r)); }while(0) |
63 | 63 | ||
64 | #if defined (CPU_COLDFIRE) | ||
65 | # define C_MULC(m,a,b) \ | ||
66 | { \ | ||
67 | asm volatile("move.l (%[bp]), %%d2;" \ | ||
68 | "clr.l %%d3;" \ | ||
69 | "move.w %%d2, %%d3;" \ | ||
70 | "swap %%d3;" \ | ||
71 | "clr.w %%d2;" \ | ||
72 | "movem.l (%[ap]), %%d0-%%d1;" \ | ||
73 | "mac.l %%d0, %%d2, %%acc0;" \ | ||
74 | "mac.l %%d1, %%d3, %%acc0;" \ | ||
75 | "mac.l %%d1, %%d2, %%acc1;" \ | ||
76 | "msac.l %%d0, %%d3, %%acc1;" \ | ||
77 | "movclr.l %%acc0, %[mr];" \ | ||
78 | "movclr.l %%acc1, %[mi];" \ | ||
79 | : [mr] "=r" ((m).r), [mi] "=r" ((m).i) \ | ||
80 | : [ap] "a" (&(a)), [bp] "a" (&(b)) \ | ||
81 | : "d0", "d1", "d2", "d3", "cc"); \ | ||
82 | } | ||
83 | #elif defined(CPU_ARM) | ||
84 | #if (ARM_ARCH < 5) | ||
85 | |||
86 | |||
87 | # define C_MULC(m,a,b) \ | ||
88 | { \ | ||
89 | asm volatile( \ | ||
90 | "ldm %[ap], {r0,r1} \n\t" \ | ||
91 | "ldrsh r2, [%[bp], #0] \n\t" \ | ||
92 | "ldrsh r3, [%[bp], #2] \n\t" \ | ||
93 | \ | ||
94 | "smull r4, %[mr], r0, r2 \n\t" \ | ||
95 | "smlal r4, %[mr], r1, r3 \n\t" \ | ||
96 | "mov r4, r4, lsr #15 \n\t" \ | ||
97 | "orr %[mr], r4, %[mr], lsl #17 \n\t" \ | ||
98 | \ | ||
99 | "smull r4, %[mi], r1, r2 \n\t" \ | ||
100 | "rsb r3, r3, #0 \n\t" \ | ||
101 | "smlal r4, %[mi], r0, r3 \n\t" \ | ||
102 | "mov r4, r4, lsr #15 \n\t" \ | ||
103 | "orr %[mi], r4, %[mi], lsl #17 \n\t" \ | ||
104 | : [mr] "=r" ((m).r), [mi] "=r" ((m).i) \ | ||
105 | : [ap] "r" (&(a)), [bp] "r" (&(b)) \ | ||
106 | : "r0", "r1", "r2", "r3", "r4"); \ | ||
107 | } | ||
108 | #else | ||
109 | /*same as above but using armv5 packed multiplies*/ | ||
110 | # define C_MULC(m,a,b) \ | ||
111 | { \ | ||
112 | asm volatile( \ | ||
113 | "ldm %[ap], {r0,r1} \n\t" \ | ||
114 | "ldr r2, [%[bp], #0] \n\t" \ | ||
115 | \ | ||
116 | "smulwb r4, r0, r2 \n\t" /*r4=a.r*b.r*/ \ | ||
117 | "smlawt %[mr], r1, r2, r4 \n\t" /*m.r=r4+a.i*b.i*/\ | ||
118 | "mov %[mr], %[mr], lsl #1 \n\t" /*Q15 not Q16*/ \ | ||
119 | \ | ||
120 | "smulwb r1, r1, r2 \n\t" /*r1=a.i*b.r*/ \ | ||
121 | "smulwt r4, r0, r2 \n\t" /*r4=a.r*b.i*/ \ | ||
122 | "sub %[mi], r1, r4 \n\t" \ | ||
123 | "mov %[mi], %[mi], lsl #1 \n\t" \ | ||
124 | : [mr] "=r" ((m).r), [mi] "=r" ((m).i) \ | ||
125 | : [ap] "r" (&(a)), [bp] "r" (&(b)) \ | ||
126 | : "r0", "r1", "r2", "r4"); \ | ||
127 | } | ||
128 | #endif /*ARMv5 code*/ | ||
129 | #else | ||
130 | # define C_MULC(m,a,b) \ | 64 | # define C_MULC(m,a,b) \ |
131 | do{ (m).r = ADD32(S_MUL((a).r,(b).r) , S_MUL((a).i,(b).i)); \ | 65 | do{ (m).r = ADD32(S_MUL((a).r,(b).r) , S_MUL((a).i,(b).i)); \ |
132 | (m).i = SUB32(S_MUL((a).i,(b).r) , S_MUL((a).r,(b).i)); }while(0) | 66 | (m).i = SUB32(S_MUL((a).i,(b).r) , S_MUL((a).r,(b).i)); }while(0) |
133 | #endif | ||
134 | 67 | ||
135 | # define C_MUL4(m,a,b) \ | 68 | # define C_MUL4(m,a,b) \ |
136 | do{ (m).r = SHR32(SUB32(S_MUL((a).r,(b).r) , S_MUL((a).i,(b).i)),2); \ | 69 | do{ (m).r = SHR32(SUB32(S_MUL((a).r,(b).r) , S_MUL((a).i,(b).i)),2); \ |
@@ -161,6 +94,18 @@ | |||
161 | do {(res).r = ADD32((res).r,(a).r); (res).i = SUB32((res).i,(a).i); \ | 94 | do {(res).r = ADD32((res).r,(a).r); (res).i = SUB32((res).i,(a).i); \ |
162 | }while(0) | 95 | }while(0) |
163 | 96 | ||
97 | #if defined(ARMv4_ASM) | ||
98 | #include "arm/kiss_fft_armv4.h" | ||
99 | #endif | ||
100 | |||
101 | #if defined(ARMv5E_ASM) | ||
102 | #include "arm/kiss_fft_armv5e.h" | ||
103 | #endif | ||
104 | |||
105 | #if defined(CF_ASM) | ||
106 | #include "cf/kiss_fft_cf.h" | ||
107 | #endif | ||
108 | |||
164 | #else /* not FIXED_POINT*/ | 109 | #else /* not FIXED_POINT*/ |
165 | 110 | ||
166 | # define S_MUL(a,b) ( (a)*(b) ) | 111 | # define S_MUL(a,b) ( (a)*(b) ) |