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authorTomasz Malesinski <tomal@rockbox.org>2006-01-24 23:32:53 +0000
committerTomasz Malesinski <tomal@rockbox.org>2006-01-24 23:32:53 +0000
commite0bb10420d4beab02c7ea3f757e9c57b040c6bf4 (patch)
tree991d333d077319cb0929f0b2ae84588803dff4fc /firmware
parent27c616fd46bbaee58c54eddc9ed406e6810dd3ca (diff)
downloadrockbox-e0bb10420d4beab02c7ea3f757e9c57b040c6bf4.tar.gz
rockbox-e0bb10420d4beab02c7ea3f757e9c57b040c6bf4.zip
added .vectors section for ARM
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@8442 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r--firmware/app.lds37
-rw-r--r--firmware/crt0.S17
2 files changed, 41 insertions, 13 deletions
diff --git a/firmware/app.lds b/firmware/app.lds
index feff264d39..d49949930d 100644
--- a/firmware/app.lds
+++ b/firmware/app.lds
@@ -128,8 +128,8 @@ _pluginbuf = 0;
128#define IRAMSIZE 0xc000 128#define IRAMSIZE 0xc000
129#elif CONFIG_CPU==PNX0101 129#elif CONFIG_CPU==PNX0101
130#define DRAMORIG 0x24000000 + STUBOFFSET 130#define DRAMORIG 0x24000000 + STUBOFFSET
131#define IRAMORIG 0x400100 131#define IRAMORIG 0x400000
132#define IRAMSIZE 0x7f00 132#define IRAMSIZE 0x8000
133#else 133#else
134#define DRAMORIG 0x09000000 + STUBOFFSET 134#define DRAMORIG 0x09000000 + STUBOFFSET
135#define IRAMORIG 0x0f000000 135#define IRAMORIG 0x0f000000
@@ -150,6 +150,7 @@ MEMORY
150 150
151SECTIONS 151SECTIONS
152{ 152{
153#ifndef CPU_ARM
153 .vectors : 154 .vectors :
154 { 155 {
155 loadaddress = .; 156 loadaddress = .;
@@ -162,6 +163,12 @@ SECTIONS
162 163
163 .text : 164 .text :
164 { 165 {
166#else
167 .text :
168 {
169 loadaddress = .;
170 _loadaddress = .;
171#endif
165 . = ALIGN(0x200); 172 . = ALIGN(0x200);
166 *(.init.text) 173 *(.init.text)
167 *(.text*) 174 *(.text*)
@@ -193,7 +200,6 @@ SECTIONS
193 *(.data*) 200 *(.data*)
194 . = ALIGN(0x4); 201 . = ALIGN(0x4);
195 _dataend = .; 202 _dataend = .;
196 _iramcopy = .;
197 } > DRAM 203 } > DRAM
198 204
199 /DISCARD/ : 205 /DISCARD/ :
@@ -201,14 +207,31 @@ SECTIONS
201 *(.eh_frame) 207 *(.eh_frame)
202 } 208 }
203 209
204 .iram IRAMORIG : AT ( _iramcopy) 210#ifdef CPU_ARM
211 .vectors 0x0 :
212 {
213 _vectorsstart = .;
214 *(.vectors);
215 _vectorsend = .;
216 } AT> DRAM
217
218 _vectorscopy = LOADADDR(.vectors);
219#endif
220
221#if CONFIG_CPU==PNX0101
222 .iram IRAMORIG + SIZEOF(.vectors) :
223#else
224 .iram IRAMORIG :
225#endif
205 { 226 {
206 _iramstart = .; 227 _iramstart = .;
207 *(.icode) 228 *(.icode)
208 *(.irodata) 229 *(.irodata)
209 *(.idata) 230 *(.idata)
210 _iramend = .; 231 _iramend = .;
211 } > IRAM 232 } > IRAM AT> DRAM
233
234 _iramcopy = LOADADDR(.iram);
212 235
213 .ibss (NOLOAD) : 236 .ibss (NOLOAD) :
214 { 237 {
@@ -238,8 +261,10 @@ SECTIONS
238 } > DRAM 261 } > DRAM
239#endif 262#endif
240 263
241#if defined(CPU_COLDFIRE) || defined(CPU_ARM) 264#if defined(CPU_COLDFIRE)
242 .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram): 265 .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram):
266#elif defined(CPU_ARM)
267 .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors):
243#else 268#else
244 .bss : 269 .bss :
245#endif 270#endif
diff --git a/firmware/crt0.S b/firmware/crt0.S
index 54432c9731..ba478f804c 100644
--- a/firmware/crt0.S
+++ b/firmware/crt0.S
@@ -84,13 +84,13 @@ remap_end:
84#endif /* PP specific */ 84#endif /* PP specific */
85 85
86 /* Copy exception handler code to address 0 */ 86 /* Copy exception handler code to address 0 */
87 ldr r2, =ecode 87 ldr r2, =_vectorsstart
88 ldr r3, =ecodeend 88 ldr r3, =_vectorsend
89 mov r4, #0 89 ldr r4, =_vectorscopy
901: 901:
91 cmp r3, r2 91 cmp r3, r2
92 ldrhi r5, [r2], #4 92 ldrhi r5, [r4], #4
93 strhi r5, [r4], #4 93 strhi r5, [r2], #4
94 bhi 1b 94 bhi 1b
95 95
96 /* Zero out IBSS */ 96 /* Zero out IBSS */
@@ -259,7 +259,7 @@ boot_table:
259 /* main() should never return */ 259 /* main() should never return */
260 260
261/* Exception handlers. Will be copied to address 0 after memory remapping */ 261/* Exception handlers. Will be copied to address 0 after memory remapping */
262ecode: 262 .section .vectors,"aw"
263 ldr pc, [pc, #24] 263 ldr pc, [pc, #24]
264 ldr pc, [pc, #24] 264 ldr pc, [pc, #24]
265 ldr pc, [pc, #24] 265 ldr pc, [pc, #24]
@@ -270,6 +270,8 @@ ecode:
270 ldr pc, [pc, #24] 270 ldr pc, [pc, #24]
271 271
272 /* Exception vectors */ 272 /* Exception vectors */
273 .global vectors
274vectors:
273 .word start 275 .word start
274 .word undef_instr_handler 276 .word undef_instr_handler
275 .word software_int_handler 277 .word software_int_handler
@@ -278,7 +280,8 @@ ecode:
278 .word reserved_handler 280 .word reserved_handler
279 .word irq_handler 281 .word irq_handler
280 .word fiq_handler 282 .word fiq_handler
281ecodeend: 283
284 .text
282 285
283 .global irq 286 .global irq
284 .global UIE 287 .global UIE