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authorAmaury Pouly <amaury.pouly@gmail.com>2014-02-04 00:28:26 +0100
committerAmaury Pouly <amaury.pouly@gmail.com>2014-02-10 23:14:25 +0100
commitc043ecf9e144b1bf24edf5a8a9bf3e2cad08b97c (patch)
treea7957294218f59f79649acaeebc821ed4990eddf /firmware
parent61dbeb60b73d771abb86270579e8669fe08586cf (diff)
downloadrockbox-c043ecf9e144b1bf24edf5a8a9bf3e2cad08b97c.tar.gz
rockbox-c043ecf9e144b1bf24edf5a8a9bf3e2cad08b97c.zip
imx233: rework early time power init
The current code does hazardous tweaks to the power subsystem: indeed if one boots with USB plugged and some stub powers on the DCDC switch, it will fail. Indeed, a hardware bug prevents from going back to linear regulators (see errata) so we cannot expect to reach a known state (linreg on, dcdc off) on each configuration and in particular, powering down the 4p2 rail in such a configuration will result in a power brownout. This commit works around this issue by not touching the initial power configuration until USB is (un)plugged, which are the best spots to get known states. Change-Id: I8741a3995df8ae61ca1c887a3ecb7903d0ac5136
Diffstat (limited to 'firmware')
-rw-r--r--firmware/target/arm/imx233/powermgmt-imx233.c41
1 files changed, 15 insertions, 26 deletions
diff --git a/firmware/target/arm/imx233/powermgmt-imx233.c b/firmware/target/arm/imx233/powermgmt-imx233.c
index 7a1ea8338e..01d0e3eae1 100644
--- a/firmware/target/arm/imx233/powermgmt-imx233.c
+++ b/firmware/target/arm/imx233/powermgmt-imx233.c
@@ -58,35 +58,13 @@ void imx233_powermgmt_init(void)
58 BF_WR(POWER_VDDDCTRL, LINREG_OFFSET, 2); 58 BF_WR(POWER_VDDDCTRL, LINREG_OFFSET, 2);
59 BF_WR(POWER_VDDACTRL, LINREG_OFFSET, 2); 59 BF_WR(POWER_VDDACTRL, LINREG_OFFSET, 2);
60 BF_WR(POWER_VDDIOCTRL, LINREG_OFFSET, 2); 60 BF_WR(POWER_VDDIOCTRL, LINREG_OFFSET, 2);
61 /* enable DCDC (more efficient) */
62 BF_SET(POWER_5VCTRL, ENABLE_DCDC);
63 BF_CLR(POWER_5VCTRL, DCDC_XFER);
64#else
65 BF_SET(POWER_5VCTRL, LINREG_OFFSET);
66 BF_SET(POWER_5VCTRL, EN_DCDC1);
67 BF_SET(POWER_5VCTRL, EN_DCDC2);
68#endif
69
70#if IMX233_SUBTARGET >= 3780
71 /* adjust arbitration between 4.2 and battery */
72 BF_WR(POWER_DCDC4P2, CMPTRIP, 0); /* 85% */
73 BF_WR(POWER_DCDC4P2, DROPOUT_CTRL, 0xe); /* select greater, 200 mV drop */
74#endif
75
76#if IMX233_SUBTARGET >= 3700
77 /* enable a few bits controlling the DC-DC as recommended by Freescale */ 61 /* enable a few bits controlling the DC-DC as recommended by Freescale */
78 BF_SET(POWER_LOOPCTRL, TOGGLE_DIF); 62 BF_SET(POWER_LOOPCTRL, TOGGLE_DIF);
79 BF_SET(POWER_LOOPCTRL, EN_CM_HYST); 63 BF_SET(POWER_LOOPCTRL, EN_CM_HYST);
80 BF_CLR(POWER_LOOPCTRL, EN_RCSCALE); 64 BF_CLR(POWER_LOOPCTRL, EN_RCSCALE);
81 BF_SETV(POWER_LOOPCTRL, EN_RCSCALE, 1); 65 BF_SETV(POWER_LOOPCTRL, EN_RCSCALE, 1);
82 /* make sure we are in a known state: disable charger */ 66#else
83 BF_SET(POWER_CHARGE, PWD_BATTCHRG); 67 BF_SET(POWER_5VCTRL, LINREG_OFFSET);
84#endif
85#if IMX233_SUBTARGET >= 3780
86 /* make sure we are in a known state: disable 4p2 */
87 BF_WR(POWER_DCDC4P2, ENABLE_DCDC, 0);
88 BF_WR(POWER_DCDC4P2, ENABLE_4P2, 0);
89 BF_SET(POWER_5VCTRL, PWD_CHARGE_4P2);
90#endif 68#endif
91} 69}
92 70
@@ -110,6 +88,7 @@ void charging_algorithm_step(void)
110#if IMX233_SUBTARGET >= 3780 88#if IMX233_SUBTARGET >= 3780
111 BF_WR(POWER_DCDC4P2, ENABLE_DCDC, 0); 89 BF_WR(POWER_DCDC4P2, ENABLE_DCDC, 0);
112 BF_WR(POWER_DCDC4P2, ENABLE_4P2, 0); 90 BF_WR(POWER_DCDC4P2, ENABLE_4P2, 0);
91 BF_WR(POWER_5VCTRL, CHARGE_4P2_ILIMIT, 1);
113 BF_SET(POWER_5VCTRL, PWD_CHARGE_4P2); 92 BF_SET(POWER_5VCTRL, PWD_CHARGE_4P2);
114#endif 93#endif
115 charge_state = DISCHARGING; 94 charge_state = DISCHARGING;
@@ -120,10 +99,14 @@ void charging_algorithm_step(void)
120 logf("pwrmgmt: discharging -> trickle"); 99 logf("pwrmgmt: discharging -> trickle");
121 logf("pwrmgmt: begin charging 4p2"); 100 logf("pwrmgmt: begin charging 4p2");
122#if IMX233_SUBTARGET >= 3780 101#if IMX233_SUBTARGET >= 3780
123 /* 5V has been detected: prepare 4.2V power rail for activation */ 102 /* 5V has been detected: prepare 4.2V power rail for activation
103 * WARNING we can reach this situation when starting after Freescale bootloader
104 * or after RoLo in a state where the DCDC is running. In this case,
105 * we must *NOT* disable it or this will shutdown the device. This procedure
106 * is safe: it will never disable the DCDC and will not reduce the charge
107 * limit on the 4P2 rail. */
124 BF_WR(POWER_DCDC4P2, ENABLE_4P2, 1); 108 BF_WR(POWER_DCDC4P2, ENABLE_4P2, 1);
125 BF_SET(POWER_CHARGE, ENABLE_LOAD); 109 BF_SET(POWER_CHARGE, ENABLE_LOAD);
126 BF_WR(POWER_5VCTRL, CHARGE_4P2_ILIMIT, 1);
127 BF_CLR(POWER_5VCTRL, PWD_CHARGE_4P2);// FIXME: manual error ? 110 BF_CLR(POWER_5VCTRL, PWD_CHARGE_4P2);// FIXME: manual error ?
128 BF_WR(POWER_DCDC4P2, ENABLE_DCDC, 1); 111 BF_WR(POWER_DCDC4P2, ENABLE_DCDC, 1);
129#endif 112#endif
@@ -147,6 +130,12 @@ void charging_algorithm_step(void)
147 { 130 {
148 logf("pwrmgmt: enable dcdc and charger"); 131 logf("pwrmgmt: enable dcdc and charger");
149 logf("pwrmgmt: trickle -> charging"); 132 logf("pwrmgmt: trickle -> charging");
133#if IMX233_SUBTARGET >= 3780
134 /* adjust arbitration between 4.2 and battery */
135 BF_WR(POWER_DCDC4P2, CMPTRIP, 0); /* 85% */
136 BF_WR(POWER_DCDC4P2, DROPOUT_CTRL, 0xe); /* select greater, 200 mV drop */
137#endif
138 /* switch to DCDC */
150 BF_CLR(POWER_5VCTRL, DCDC_XFER); 139 BF_CLR(POWER_5VCTRL, DCDC_XFER);
151 BF_SET(POWER_5VCTRL, ENABLE_DCDC); 140 BF_SET(POWER_5VCTRL, ENABLE_DCDC);
152 /* enable battery charging */ 141 /* enable battery charging */