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author | Amaury Pouly <amaury.pouly@gmail.com> | 2017-11-09 22:24:41 +0100 |
---|---|---|
committer | Solomon Peachy <pizza@shaftnet.org> | 2024-10-27 09:10:08 -0400 |
commit | 977308c95ca57ebbf00139843a8dc03f6c743a11 (patch) | |
tree | 3b84481c5e6695ccfc187f88482dc6fcdbf5c521 /firmware | |
parent | d2dbd36db45dfd41bdc7abb7f08c2c436541f7fd (diff) | |
download | rockbox-977308c95ca57ebbf00139843a8dc03f6c743a11.tar.gz rockbox-977308c95ca57ebbf00139843a8dc03f6c743a11.zip |
rda5802: rewrite detection routine
The current code relies on the initial value of some RDS register(which is
documented) but this assumption will be broken when we start enabling RDS.
This commit changes the code to really read the chip ID, although it is more
involved.
Change-Id: I0ed630322a94523612d2f0297dbcbea5f869eb6d
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/drivers/tuner/rda5802.c | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/firmware/drivers/tuner/rda5802.c b/firmware/drivers/tuner/rda5802.c index 377bdd1e6f..3f122714bd 100644 --- a/firmware/drivers/tuner/rda5802.c +++ b/firmware/drivers/tuner/rda5802.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #define RSSI_MAX 70 | 42 | #define RSSI_MAX 70 |
43 | 43 | ||
44 | /** Registers and bits **/ | 44 | /** Registers and bits **/ |
45 | #define CHIPID 0x0 | ||
45 | #define POWERCFG 0x2 | 46 | #define POWERCFG 0x2 |
46 | #define CHANNEL 0x3 | 47 | #define CHANNEL 0x3 |
47 | #define SYSCONFIG1 0x4 | 48 | #define SYSCONFIG1 0x4 |
@@ -52,7 +53,6 @@ | |||
52 | #define SYSCONFIG6 0x9 /* undocumented */ | 53 | #define SYSCONFIG6 0x9 /* undocumented */ |
53 | #define READCHAN 0xA | 54 | #define READCHAN 0xA |
54 | #define STATUSRSSI 0xB | 55 | #define STATUSRSSI 0xB |
55 | #define IDENT 0xC | ||
56 | 56 | ||
57 | 57 | ||
58 | /* POWERCFG (0x2) */ | 58 | /* POWERCFG (0x2) */ |
@@ -190,7 +190,21 @@ static void rda5802_sleep(int snooze) | |||
190 | 190 | ||
191 | bool rda5802_detect(void) | 191 | bool rda5802_detect(void) |
192 | { | 192 | { |
193 | return ((rda5802_read_reg(IDENT) & 0xFF00) == 0x5800); | 193 | /* The RDA5802 has a weird wrap-around at 0x40. Upon initialisation, it will copy the Chip ID |
194 | * to register 0xC but since this register is also used for RDS, we cannot rely on its content | ||
195 | * until we softreset. But we cannot soft-reset until we confirm the tuner type... So we really | ||
196 | * need to register 0, which means reading 0x40 registers. | ||
197 | * NOTE: the datasheet says that it wraps around at 0x3A but this is wrong. */ | ||
198 | |||
199 | /* we want to read registers 0x00/0x01, aka 0x40/0x41 because of wrapping, tuner starts reading | ||
200 | * at 0xA so we need to read 0x40 - 0xA + 2 registers, each register is two bytes. Thats | ||
201 | * (0x40 - 0xA + 2) * 2 = 0x6e bytes */ | ||
202 | unsigned char buf[0x70]; | ||
203 | fmradio_i2c_read(I2C_ADR, buf, sizeof(buf)); | ||
204 | cache[CHIPID] = buf[0x6c] << 8 | buf[0x6d]; | ||
205 | cache[1] = buf[0x6e] << 8 | buf[0x6f]; /* unknown register, maybe firmware ID or related */ | ||
206 | |||
207 | return ((cache[CHIPID] & 0xFF00) == 0x5800); | ||
194 | } | 208 | } |
195 | 209 | ||
196 | void rda5802_init(void) | 210 | void rda5802_init(void) |