Oops: Sansa and H10 need crt0 included in the bootloader

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11190 a1c6a512-1295-4272-9138-f99709370657

3 files changed, 107 insertions, 2 deletions

diff --git a/firmware/SOURCES b/firmware/SOURCES
index f58ec6d130..c95b37d660 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -169,7 +169,11 @@ rolo.c
 thread.c
 timer.c
 #ifdef CPU_PP
+#if (CONFIG_CPU == PP5024)
+target/arm/crt0-pp5024.S
+#else
 target/arm/crt0-pp.S
+#endif
 #elif defined(CPU_ARM)
 target/arm/crt0.S
 #elif defined(CPU_COLDFIRE)
diff --git a/firmware/boot.lds b/firmware/boot.lds
index 97a9f784c0..0337b816f2 100644
--- a/firmware/boot.lds
+++ b/firmware/boot.lds
@@ -7,10 +7,19 @@ INPUT(target/coldfire/crt0.o)
 #elif defined (CPU_ARM)
 OUTPUT_FORMAT(elf32-littlearm)
 OUTPUT_ARCH(arm)
-#ifndef CPU_PP
-/* PortalPlayer-based machines won't work if crt0 is included */
+#ifndef IPOD_ARCH
+/* the ipods can't have the crt0.o mentioned here, but the others can't do
+   without it! */
+#ifdef CPU_PP
+#if (CONFIG_CPU == PP5024)
+INPUT(target/arm/crt0-pp5024.o)
+#else
+INPUT(target/arm/crt0-pp.o)
+#endif
+#else
 INPUT(target/arm/crt0.o)
 #endif
+#endif
 #else
 OUTPUT_FORMAT(elf32-sh)
 INPUT(target/sh/crt0.o)
diff --git a/firmware/target/arm/crt0-pp5024.S b/firmware/target/arm/crt0-pp5024.S
new file mode 100644
index 0000000000..72edf37052
--- /dev/null
+++ b/firmware/target/arm/crt0-pp5024.S
@@ -0,0 +1,92 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Linus Nielsen Feltzing
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "config.h"
+#include "cpu.h"
+
+#define THUMB_MODE(_r_, _l_)                     \
+        ldr     _r_,=_l_ ## f+1                 ;\
+        bx      _r_                             ;\
+        .pool                                   ;\
+        .code   16                              ;\
+        .thumb_func                             ;\
+ _l_:
+
+// Switch to ARM mode
+#define ARM_MODE(_r_, _l_)                       \
+        ldr     _r_,=_l_ ## f                   ;\
+        bx      _r_                             ;\
+        .pool                                   ;\
+        .code   32                              ;\
+ _l_:
+
+
+.equ    MODE_MASK, 0x1f 
+.equ    T_BIT, 0x20 
+.equ    F_BIT, 0x40 
+.equ    I_BIT, 0x80 
+.equ    MODE_IRQ, 0x12 
+.equ    MODE_SVC, 0x13 
+.equ    MODE_SYS, 0x1f 
+
+
+
+    .section .init.text,"ax",%progbits
+
+    .global    start
+start:
+
+    .equ    PROC_ID,  0x60000000
+    .equ    COP_CTRL, 0x60007004
+    .equ    COP_STATUS, 0x60007004
+    .equ    IIS_CONFIG, 0x70002800
+    .equ    SLEEP,    0x80000000
+    .equ    WAKE,     0x0
+    .equ    SLEEPING, 0x80000000
+
+
+      /* Find out which processor we are */
+    mov    r0, #PROC_ID
+    ldr    r0, [r0]
+    and    r0, r0, #0xff
+    cmp    r0, #0x55
+    beq    1f
+
+    /* put us (co-processor) to sleep */
+    ldr    r4, =COP_CTRL
+    mov    r3, #SLEEP
+    str    r3, [r4]
+    ldr    pc, =cop_wake_start
+
+cop_wake_start:
+    /* jump the COP to startup */
+    ldr    r0, =startup_loc
+    ldr    pc, [r0]
+
+1:
+    msr    cpsr_c, #0xd3
+            
+    ldr     sp, =0x40017f00          /* set stack */
+
+    
+    /* execute the loader - this will load an image to 0x10000000 */
+    bl     main
+
+startup_loc:
+    .word    0x0
+