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author | Christian Gmeiner <christian.gmeiner@gmail.com> | 2005-07-31 08:43:36 +0000 |
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committer | Christian Gmeiner <christian.gmeiner@gmail.com> | 2005-07-31 08:43:36 +0000 |
commit | 6109a3b0bee921ffe4f2a4cd06b5b8dcbc9bfe1f (patch) | |
tree | 0436b070224ce003ad54a9a2410097a80cdb751a /firmware | |
parent | 637887838fdc4de25915dcb5646fda7300649eaa (diff) | |
download | rockbox-6109a3b0bee921ffe4f2a4cd06b5b8dcbc9bfe1f.tar.gz rockbox-6109a3b0bee921ffe4f2a4cd06b5b8dcbc9bfe1f.zip |
iAudio: adding support for mcf5250
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7270 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/export/cpu.h | 3 | ||||
-rw-r--r-- | firmware/export/mcf5250.h | 62 |
2 files changed, 65 insertions, 0 deletions
diff --git a/firmware/export/cpu.h b/firmware/export/cpu.h index 6b7cfd524e..6f817e44cc 100644 --- a/firmware/export/cpu.h +++ b/firmware/export/cpu.h | |||
@@ -24,6 +24,9 @@ | |||
24 | #if CONFIG_CPU == MCF5249 | 24 | #if CONFIG_CPU == MCF5249 |
25 | #include "mcf5249.h" | 25 | #include "mcf5249.h" |
26 | #endif | 26 | #endif |
27 | #if CONFIG_CPU == MCF5250 | ||
28 | #include "mcf5250.h" | ||
29 | #endif | ||
27 | #if CONFIG_CPU == TCC730 | 30 | #if CONFIG_CPU == TCC730 |
28 | #include "tcc730.h" | 31 | #include "tcc730.h" |
29 | #endif | 32 | #endif |
diff --git a/firmware/export/mcf5250.h b/firmware/export/mcf5250.h new file mode 100644 index 0000000000..f47e61d89c --- /dev/null +++ b/firmware/export/mcf5250.h | |||
@@ -0,0 +1,62 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2005 by Christian Gmeiner | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | #ifndef __MCF5250_H__ | ||
20 | #define __MCF5250_H__ | ||
21 | |||
22 | #include "mcf5249.h" | ||
23 | |||
24 | /* here we undefine stuff which is different from mcf5249 */ | ||
25 | #undef SPURVEC | ||
26 | #undef INTBASE | ||
27 | #undef TER0 | ||
28 | #undef TER1 | ||
29 | |||
30 | /* here we remove stuff, which is not included in mfc5250 */ | ||
31 | #undef DACR1 | ||
32 | #undef DMR1 | ||
33 | #undef INTERRUPTSTAT3 | ||
34 | #undef INTERRUPTCLEAR3 | ||
35 | #undef INTERRUPTEN3 | ||
36 | #undef IPERRORADR | ||
37 | |||
38 | /* here we define some new stuff */ | ||
39 | #define IPR (*(volatile unsigned long *)(MBAR + 0x040)) /* interrupt oending register */ | ||
40 | #define IMR (*(volatile unsigned long *)(MBAR + 0x044)) /* Interrupt Mask Register */ | ||
41 | |||
42 | #define ICR1 (*(volatile unsigned long *)(MBAR + 0x04d)) /* Primary interrupt control reg: timer 0 */ | ||
43 | #define ICR2 (*(volatile unsigned long *)(MBAR + 0x04e)) /* Primary interrupt control reg: timer 1 */ | ||
44 | #define ICR3 (*(volatile unsigned long *)(MBAR + 0x04f)) /* Primary interrupt control reg: i2c0 */ | ||
45 | #define ICR5 (*(volatile unsigned long *)(MBAR + 0x051)) /* Primary interrupt control reg: uart1 */ | ||
46 | #define ICR6 (*(volatile unsigned long *)(MBAR + 0x052)) /* Primary interrupt control reg: dma0 */ | ||
47 | #define ICR7 (*(volatile unsigned long *)(MBAR + 0x053)) /* Primary interrupt control reg: dam1 */ | ||
48 | #define ICR9 (*(volatile unsigned long *)(MBAR + 0x055)) /* Primary interrupt control reg: dam3 */ | ||
49 | #define ICR10 (*(volatile unsigned long *)(MBAR + 0x056)) /* Primary interrupt control reg: qspi */ | ||
50 | |||
51 | #define CSAR4 (*(volatile unsigned long *)(MBAR + 0x0b0)) /* Chip Select Address Register Bank 4 */ | ||
52 | #define CSMR4 (*(volatile unsigned long *)(MBAR + 0x0b4)) /* Chip Select Mask Register Bank 4 */ | ||
53 | #define CSCR4 (*(volatile unsigned long *)(MBAR + 0x0b8)) /* Chip Select Control Register Bank 4 */ | ||
54 | |||
55 | /* here we define changed stuff */ | ||
56 | #define TER0 (*(volatile unsigned short *)(MBAR + 0x151)) /* Timer0 Event Register */ | ||
57 | #define TER1 (*(volatile unsigned short *)(MBAR + 0x191)) /* Timer1 Event Register */ | ||
58 | |||
59 | #define SPURVEC (*(volatile unsigned char *)(MBAR2 + 0x164)) /* spurious secondary interrupt vector */ | ||
60 | #define INTBASE (*(volatile unsigned char *)(MBAR2 + 0x168)) /* secondary interrupt base vector register */ | ||
61 | |||
62 | #endif | ||