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authorLinus Nielsen Feltzing <linus@haxx.se>2002-04-25 13:20:43 +0000
committerLinus Nielsen Feltzing <linus@haxx.se>2002-04-25 13:20:43 +0000
commit46daf2b0b3e34e7446b7afe5fcde4f9d5d277ddb (patch)
tree825d5436a651249f9285065a8cdf1b0cf4c275bf /firmware
parent69d9911175abcb542be2aa7cedefd55749e1f67f (diff)
downloadrockbox-46daf2b0b3e34e7446b7afe5fcde4f9d5d277ddb.tar.gz
rockbox-46daf2b0b3e34e7446b7afe5fcde4f9d5d277ddb.zip
More bugs killed. Now it may even work.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@230 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r--firmware/thread.c104
1 files changed, 9 insertions, 95 deletions
diff --git a/firmware/thread.c b/firmware/thread.c
index 5d4c2f76fa..7f0dde6c40 100644
--- a/firmware/thread.c
+++ b/firmware/thread.c
@@ -24,15 +24,12 @@ typedef union
24 { 24 {
25 unsigned int r[7]; /* Registers r8 thru r14 */ 25 unsigned int r[7]; /* Registers r8 thru r14 */
26 void *sp; /* Stack pointer (r15) */ 26 void *sp; /* Stack pointer (r15) */
27 unsigned int mach, 27 unsigned int mach;
28 macl; 28 unsigned int macl;
29 unsigned int sr; /* Status register */ 29 unsigned int sr; /* Status register */
30#if 0
31 void* gbr; /* Global base register */
32#endif
33 void* pr; /* Procedure register */ 30 void* pr; /* Procedure register */
34 } regs; 31 } regs;
35 unsigned int mem[32]; 32 unsigned int mem[12];
36} ctx_t; 33} ctx_t;
37 34
38typedef struct 35typedef struct
@@ -50,68 +47,8 @@ static thread_t threads = {1, 0};
50 */ 47 */
51static inline void stctx(void* addr) 48static inline void stctx(void* addr)
52{ 49{
53 unsigned int tmp; 50 asm volatile ("add #48, %0\n\t"
54 51 "sts.l pr, @-%0\n\t"
55 /*
56 [Alkorr] sorry, this code is totally wrong.
57
58 Why ?
59
60 "mov.l %0,@(imm,%1)"
61
62 must be interpreted as :
63
64 "%0 = ((long *)%1)[imm]"
65
66 not as :
67
68 "%0 = *((long *)(((char *)%1) + imm))"
69
70 real offset = "imm" x 1 if byte access (.b)
71 = "imm" x 2 if 16-bit word access (.w)
72 = "imm" x 4 if 32-bit word access (.l)
73
74 Don't forget, SH doesn't like misaligned address, so
75 remember it doesn't make any sense to have an odd
76 offset ;).
77
78 */
79
80#if 0
81 asm volatile ("mov.l r8, @(0, %1)\n\t"
82 "mov.l r9, @(4, %1)\n\t"
83 "mov.l r10, @(8, %1)\n\t"
84 "mov.l r11, @(12, %1)\n\t"
85 "add #16,%1\n\t"
86 "mov.l r12, @(0, %1)\n\t"
87 "mov.l r13, @(4, %1)\n\t"
88 "mov.l r14, @(8, %1)\n\t"
89 "mov.l r15, @(12, %1)\n\t"
90 "add #16,%1\n\t"
91 "stc sr, %0\n\t"
92 "mov.l %0, @(0, %1)\n\t"
93 "stc gbr, %0\n\t"
94 "mov.l %0, @(4, %1)\n\t"
95 "sts pr, %0\n\t"
96 "mov.l %0, @(8, %1)" : "=r&" (tmp) : "r" (addr));
97#endif
98#if 0
99 /* here the right code */
100 asm volatile ("mov.l r8, @(0,%1)\n\t"
101 "mov.l r9, @(1,%1)\n\t"
102 "mov.l r10, @(2,%1)\n\t"
103 "mov.l r11, @(3,%1)\n\t"
104 "mov.l r12, @(4,%1)\n\t"
105 "mov.l r13, @(5,%1)\n\t"
106 "mov.l r14, @(6,%1)\n\t"
107 "mov.l r15, @(7,%1)\n\t"
108 "stc.l sr, %0\n\t"
109 "mov.l %0, @(8,%1)\n\t"
110 "sts pr, %0\n\t"
111 "mov.l %0, @(9,%1)" : "=r&" (tmp) : "r" (addr));
112#endif
113 /* here a far better code */
114 asm volatile ("sts.l pr, @-%0\n\t"
115 "stc.l sr, @-%0\n\t" 52 "stc.l sr, @-%0\n\t"
116 "sts.l macl,@-%0\n\t" 53 "sts.l macl,@-%0\n\t"
117 "sts.l mach,@-%0\n\t" 54 "sts.l mach,@-%0\n\t"
@@ -122,8 +59,7 @@ static inline void stctx(void* addr)
122 "mov.l r11, @-%0\n\t" 59 "mov.l r11, @-%0\n\t"
123 "mov.l r10, @-%0\n\t" 60 "mov.l r10, @-%0\n\t"
124 "mov.l r9, @-%0\n\t" 61 "mov.l r9, @-%0\n\t"
125 "mov.l r8, @-%0" : : "r" (addr+4*10)); 62 "mov.l r8, @-%0" : : "r" (addr));
126
127} 63}
128 64
129/*--------------------------------------------------------------------------- 65/*---------------------------------------------------------------------------
@@ -132,29 +68,6 @@ static inline void stctx(void* addr)
132 */ 68 */
133static inline void ldctx(void* addr) 69static inline void ldctx(void* addr)
134{ 70{
135 unsigned int tmp;
136
137 /* same remarks than above */
138
139#if 0
140 asm volatile ("mov.l @(0, %1), r8\n\t"
141 "mov.l @(4, %1), r9\n\t"
142 "mov.l @(8, %1), r10\n\t"
143 "mov.l @(12, %1), r11\n\t"
144 "add #16,%1\n\t"
145 "mov.l @(0, %1), r12\n\t"
146 "mov.l @(4, %1), r13\n\t"
147 "mov.l @(8, %1), r14\n\t"
148 "mov.l @(12, %1), r15\n\t"
149 "add #16,%1\n\t"
150 "mov.l @(0, %1), r0\n\t"
151 "ldc %0, sr\n\t"
152 "mov.l @(4, %1), %0\n\t"
153 "ldc %0, gbr\n\t"
154 "mov.l @(8, %1), %0\n\t"
155 "lds %0, pr\n\t"
156 "mov.l %0, @(0, r15)" : "=r&" (tmp) : "r" (addr));
157#endif
158 asm volatile ("mov.l @%0+,r8\n\t" 71 asm volatile ("mov.l @%0+,r8\n\t"
159 "mov.l @%0+,r9\n\t" 72 "mov.l @%0+,r9\n\t"
160 "mov.l @%0+,r10\n\t" 73 "mov.l @%0+,r10\n\t"
@@ -166,8 +79,9 @@ static inline void ldctx(void* addr)
166 "lds.l @%0+,mach\n\t" 79 "lds.l @%0+,mach\n\t"
167 "lds.l @%0+,macl\n\t" 80 "lds.l @%0+,macl\n\t"
168 "ldc.l @%0+,sr\n\t" 81 "ldc.l @%0+,sr\n\t"
169 "lds.l @%0+,pr" : : "r" (addr)); 82 "mov.l @%0,%0\n\t"
170 83 "lds %0,pr\n\t"
84 "mov.l %0, @(0, r15)" : "+r" (addr));
171} 85}
172 86
173/*--------------------------------------------------------------------------- 87/*---------------------------------------------------------------------------