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authorJean-Philippe Bernardy <jeanphilippe.bernardy@gmail.com>2005-02-22 09:55:40 +0000
committerJean-Philippe Bernardy <jeanphilippe.bernardy@gmail.com>2005-02-22 09:55:40 +0000
commit376057d2b67bae0a7b24ae1715d3cbb0b540b7a9 (patch)
treef8740872907575e84dd52b62a25d0385186e1bbd /firmware
parente638eadaffe61143f0ded093936cbbafb1f569ce (diff)
downloadrockbox-376057d2b67bae0a7b24ae1715d3cbb0b540b7a9.tar.gz
rockbox-376057d2b67bae0a7b24ae1715d3cbb0b540b7a9.zip
Gmini SMSC chip improvements
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6030 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r--firmware/drivers/ata.c40
-rw-r--r--firmware/drivers/power.c8
-rw-r--r--firmware/export/system.h2
-rw-r--r--firmware/system.c15
4 files changed, 40 insertions, 25 deletions
diff --git a/firmware/drivers/ata.c b/firmware/drivers/ata.c
index cfdae2c090..12ad11532a 100644
--- a/firmware/drivers/ata.c
+++ b/firmware/drivers/ata.c
@@ -30,6 +30,8 @@
30#include "string.h" 30#include "string.h"
31#include "hwcompat.h" 31#include "hwcompat.h"
32 32
33#define SECTOR_SIZE (512)
34
33#if CONFIG_CPU == MCF5249 35#if CONFIG_CPU == MCF5249
34 36
35/* don't use sh7034 assembler routines */ 37/* don't use sh7034 assembler routines */
@@ -162,8 +164,8 @@
162#define READ_PATTERN3 0xaa 164#define READ_PATTERN3 0xaa
163#define READ_PATTERN4 0x55 165#define READ_PATTERN4 0x55
164 166
165extern int idatastart __attribute__ ((section(".idata")));
166 167
168static unsigned char ide_sector_data[SECTOR_SIZE] __attribute__ ((section(".idata")));
167static unsigned ide_reg_temp __attribute__ ((section(".idata"))); 169static unsigned ide_reg_temp __attribute__ ((section(".idata")));
168 170
169void ide_write_register(int reg, int value) { 171void ide_write_register(int reg, int value) {
@@ -175,7 +177,7 @@ void ide_write_register(int reg, int value) {
175 ide_reg_temp = value; 177 ide_reg_temp = value;
176 178
177 long extAddr = (long)reg << 16; 179 long extAddr = (long)reg << 16;
178 ddma_transfer(1, 1, (char*)&ide_reg_temp - (char*)&idatastart, extAddr, 2); 180 ddma_transfer(1, 1, &ide_reg_temp, extAddr, 2);
179 181
180 /* set the RAM speed to 6 cycles. 182 /* set the RAM speed to 6 cycles.
181 unsigned char miuscfg = MIUSCFG; 183 unsigned char miuscfg = MIUSCFG;
@@ -190,7 +192,7 @@ int ide_read_register(int reg) {
190 MIUSCFG = miuscfg; */ 192 MIUSCFG = miuscfg; */
191 193
192 long extAddr = (long)reg << 16; 194 long extAddr = (long)reg << 16;
193 ddma_transfer(0, 1, (char*)&ide_reg_temp - (char*)&idatastart, extAddr, 2); 195 ddma_transfer(0, 1, &ide_reg_temp, extAddr, 2);
194 196
195 /* This is done like this in the archos firmware... 197 /* This is done like this in the archos firmware...
196 miuscfg = MIUSCFG; 198 miuscfg = MIUSCFG;
@@ -229,7 +231,6 @@ int ide_read_register(int reg) {
229 231
230#define READ_TIMEOUT 5*HZ 232#define READ_TIMEOUT 5*HZ
231 233
232#define SECTOR_SIZE 512
233 234
234static struct mutex ata_mtx; 235static struct mutex ata_mtx;
235char ata_device; /* device 0 (master) or 1 (slave) */ 236char ata_device; /* device 0 (master) or 1 (slave) */
@@ -364,6 +365,16 @@ static void copy_read_sectors(unsigned char* buf, int wordcount)
364 } while (++wbuf < wbufend); /* tail loop is faster */ 365 } while (++wbuf < wbufend); /* tail loop is faster */
365 } 366 }
366#else 367#else
368#if CONFIG_CPU == TCC730
369 int sectorcount = wordcount / 0x100;
370 do {
371 /* Slurp an entire sector with a single dma transfer */
372 ddma_transfer(0, 1, ide_sector_data, ATA_DATA_IDX << 16, SECTOR_SIZE);
373 memcpy(buf, ide_sector_data, SECTOR_SIZE);
374 buf += SECTOR_SIZE;
375 sectorcount--;
376 } while (sectorcount > 0);
377#else
367 /* turbo-charged assembler version */ 378 /* turbo-charged assembler version */
368 /* this assumes wordcount to be a multiple of 4 */ 379 /* this assumes wordcount to be a multiple of 4 */
369 asm ( 380 asm (
@@ -459,6 +470,7 @@ static void copy_read_sectors(unsigned char* buf, int wordcount)
459 "r0","r1","r2","r3" 470 "r0","r1","r2","r3"
460 ); 471 );
461#endif 472#endif
473#endif
462} 474}
463 475
464int ata_read_sectors(IF_MV2(int drive,) 476int ata_read_sectors(IF_MV2(int drive,)
@@ -1071,14 +1083,22 @@ int ata_hard_reset(void)
1071 GPIO_OUT |= 0x00080000; 1083 GPIO_OUT |= 0x00080000;
1072 sleep(1); /* > 25us */ 1084 sleep(1); /* > 25us */
1073#elif CONFIG_CPU == TCC730 1085#elif CONFIG_CPU == TCC730
1086
1087 P6 &= ~0x40;
1088 ddma_transfer(0, 1, ide_sector_data, 0xF00000, SECTOR_SIZE);
1089 P6 |= 0x40;
1090
1091 /*
1092 What can the following do?
1074 P1 |= 0x04; 1093 P1 |= 0x04;
1075 P10CON &= ~0x56; 1094 P10CON &= ~0x56;
1076 sleep(1); /* > ???ms */ 1095 sleep(1);
1077 1096
1078 P10CON |= 0x56; 1097 P10CON |= 0x56;
1079 P10 &= ~0x56; 1098 P10 &= ~0x56;
1080 P1 &= ~0x04; 1099 P1 &= ~0x04;
1081 sleep(1); /* > ???ms */ 1100 sleep(1);
1101 */
1082#endif 1102#endif
1083 1103
1084 /* state HRR2 */ 1104 /* state HRR2 */
@@ -1206,10 +1226,7 @@ void ata_enable(bool on)
1206 GPIO_ENABLE |= 0x00040000; 1226 GPIO_ENABLE |= 0x00040000;
1207 GPIO_FUNCTION |= 0x00040000; 1227 GPIO_FUNCTION |= 0x00040000;
1208#elif CONFIG_CPU == TCC730 1228#elif CONFIG_CPU == TCC730
1209 if(on) 1229
1210 P1 |= 0x08;
1211 else
1212 P1 &= ~0x08;
1213#endif 1230#endif
1214} 1231}
1215 1232
@@ -1358,8 +1375,7 @@ int ata_init(void)
1358{ 1375{
1359 int rc; 1376 int rc;
1360#if CONFIG_CPU == TCC730 1377#if CONFIG_CPU == TCC730
1361 /* TODO: check for cold start (never happenning now) */ 1378 bool coldstart = (P1 & 0x80) == 0;
1362 bool coldstart = false;
1363#elif CONFIG_CPU == MCF5249 1379#elif CONFIG_CPU == MCF5249
1364 bool coldstart = (GPIO_FUNCTION & 0x00080000) == 0; 1380 bool coldstart = (GPIO_FUNCTION & 0x00080000) == 0;
1365#else 1381#else
diff --git a/firmware/drivers/power.c b/firmware/drivers/power.c
index 1c1ce4629f..3a4ae466bc 100644
--- a/firmware/drivers/power.c
+++ b/firmware/drivers/power.c
@@ -139,10 +139,10 @@ void ide_power_enable(bool on)
139 else 139 else
140 GPIO_OUT |= 0x80000000; 140 GPIO_OUT |= 0x80000000;
141#elif defined(GMINI_ARCH) 141#elif defined(GMINI_ARCH)
142 if (on) 142 if(on)
143 P1 |= 0x04; 143 P1 |= 0x08;
144 else 144 else
145 P2 &= ~0x04; 145 P1 &= ~0x08;
146#else 146#else
147 bool touched = false; 147 bool touched = false;
148#ifdef NEEDS_ATA_POWER_ON 148#ifdef NEEDS_ATA_POWER_ON
@@ -190,7 +190,7 @@ bool ide_powered(void)
190#ifdef IRIVER_H100 190#ifdef IRIVER_H100
191 return (GPIO_OUT & 0x80000000)?false:true; 191 return (GPIO_OUT & 0x80000000)?false:true;
192#elif defined(GMINI_ARCH) 192#elif defined(GMINI_ARCH)
193 return (P1 & 0x04?true:false); 193 return (P1 & 0x08?true:false);
194#else 194#else
195#if defined(NEEDS_ATA_POWER_ON) || defined(HAVE_ATA_POWER_OFF) 195#if defined(NEEDS_ATA_POWER_ON) || defined(HAVE_ATA_POWER_OFF)
196#ifdef ATA_POWER_PLAYERSTYLE 196#ifdef ATA_POWER_PLAYERSTYLE
diff --git a/firmware/export/system.h b/firmware/export/system.h
index 626cdfa257..b0f6eb65a0 100644
--- a/firmware/export/system.h
+++ b/firmware/export/system.h
@@ -199,7 +199,7 @@ extern void set_pll_freq(int pll_index, long freq_out);
199 199
200extern void* volatile interrupt_vector[16] __attribute__ ((section(".idata"))); 200extern void* volatile interrupt_vector[16] __attribute__ ((section(".idata")));
201 201
202extern void ddma_transfer(int dir, int mem, long intAddr, long extAddr, 202extern void ddma_transfer(int dir, int mem, void* intAddr, long extAddr,
203 int num); 203 int num);
204 204
205 205
diff --git a/firmware/system.c b/firmware/system.c
index 9d3e2a0dbd..05f5f49034 100644
--- a/firmware/system.c
+++ b/firmware/system.c
@@ -34,13 +34,13 @@ void ddma_wait_idle(void)
34 } while ((DDMACOM & 3) != 0); 34 } while ((DDMACOM & 3) != 0);
35} 35}
36 36
37void ddma_transfer(int dir, int mem, long intAddr, long extAddr, int num) 37void ddma_transfer(int dir, int mem, void* intAddr, long extAddr, int num)
38 __attribute__ ((section (".icode"))); 38 __attribute__ ((section (".icode")));
39void ddma_transfer(int dir, int mem, long intAddr, long extAddr, int num) { 39void ddma_transfer(int dir, int mem, void* intAddr, long extAddr, int num) {
40 int irq = set_irq_level(1); 40 int irq = set_irq_level(1);
41 ddma_wait_idle(); 41 ddma_wait_idle();
42 long externalAddress = (long) extAddr; 42 long externalAddress = (long) extAddr;
43 long internalAddress = (long) intAddr; 43 long internalAddress = ((long) intAddr) & 0xFFFF;
44 /* HW wants those two in word units. */ 44 /* HW wants those two in word units. */
45 num /= 2; 45 num /= 2;
46 externalAddress /= 2; 46 externalAddress /= 2;
@@ -130,10 +130,9 @@ void smsc_delay() {
130} 130}
131 131
132static void extra_init(void) { 132static void extra_init(void) {
133 /* Power on 133 /* Power on stuff */
134 P1 |= 0x01; 134 P1 |= 0x07;
135 P1CON |= 0x01; 135 P1CON |= 0x1f;
136 */
137 136
138 /* SMSC chip config (?) */ 137 /* SMSC chip config (?) */
139 P6CON |= 0x08; 138 P6CON |= 0x08;
@@ -147,7 +146,7 @@ static void extra_init(void) {
147 } 146 }
148 147
149 /* P5 conf 148 /* P5 conf
150 * line 2 & 4 are digital, other analog. : P5CON = 0xec; 149 * lines 0, 1 & 4 are digital, other analog. : P5CON = 0xec;
151 */ 150 */
152 151
153 /* P7 conf 152 /* P7 conf