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authorAmaury Pouly <pamaury@rockbox.org>2011-09-05 18:32:40 +0000
committerAmaury Pouly <pamaury@rockbox.org>2011-09-05 18:32:40 +0000
commit333b9ed2c330bb005456444de0eb16ad422496fa (patch)
tree4d5718001f69101b3c8db6cdc81d64b4b4676b27 /firmware
parent205254097249034a7cab46413cdda0152adc4578 (diff)
downloadrockbox-333b9ed2c330bb005456444de0eb16ad422496fa.tar.gz
rockbox-333b9ed2c330bb005456444de0eb16ad422496fa.zip
imx233/fuze+: fix apps linker script, add comment in bootloader
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30436 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r--firmware/target/arm/imx233/app.lds20
1 files changed, 16 insertions, 4 deletions
diff --git a/firmware/target/arm/imx233/app.lds b/firmware/target/arm/imx233/app.lds
index 5b83fe1c14..a4fb8af0f1 100644
--- a/firmware/target/arm/imx233/app.lds
+++ b/firmware/target/arm/imx233/app.lds
@@ -17,7 +17,7 @@ STARTUP(target/arm/imx233/crt0.o)
17#define DRAMSIZE (DRAM_SIZE - PLUGINSIZE - CODECSIZE - FRAME_SIZE - TTB_SIZE) 17#define DRAMSIZE (DRAM_SIZE - PLUGINSIZE - CODECSIZE - FRAME_SIZE - TTB_SIZE)
18 18
19/* End of the audio buffer, where the codec buffer starts */ 19/* End of the audio buffer, where the codec buffer starts */
20#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) 20#define ENDAUDIOADDR (CACHED_DRAM_ADDR + DRAMSIZE)
21 21
22/* Where the codec buffer ends, and the plugin buffer starts */ 22/* Where the codec buffer ends, and the plugin buffer starts */
23#define ENDADDR (ENDAUDIOADDR + CODEC_SIZE) 23#define ENDADDR (ENDAUDIOADDR + CODEC_SIZE)
@@ -29,15 +29,14 @@ STARTUP(target/arm/imx233/crt0.o)
29MEMORY 29MEMORY
30{ 30{
31 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE 31 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
32 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE 32 DRAM : ORIGIN = CACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
33 UNCACHED_DRAM : ORIGIN = UNCACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
33} 34}
34 35
35SECTIONS 36SECTIONS
36{ 37{
37 .text : 38 .text :
38 { 39 {
39 loadaddress = .;
40 _loadaddress = .;
41 *(.text*) 40 *(.text*)
42 } > DRAM 41 } > DRAM
43 42
@@ -89,10 +88,23 @@ SECTIONS
89 stackend = .; 88 stackend = .;
90 } > DRAM 89 } > DRAM
91 90
91 /* treat .bss and .ncbss as a single section */
92 .bss (NOLOAD) : 92 .bss (NOLOAD) :
93 { 93 {
94 _edata = .; 94 _edata = .;
95 *(.bss*); 95 *(.bss*);
96 } > DRAM
97
98 /* align on cache size boundary to avoid mixing cached and noncached stuff */
99 .ncbss . - CACHED_DRAM_ADDR + UNCACHED_DRAM_ADDR (NOLOAD) :
100 {
101 . = ALIGN(CACHEALIGN_SIZE);
102 *(.ncbss*)
103 . = ALIGN(CACHEALIGN_SIZE);
104 } AT> DRAM
105
106 .bssendadr . - UNCACHED_DRAM_ADDR + CACHED_DRAM_ADDR (NOLOAD) :
107 {
96 _end = .; 108 _end = .;
97 } > DRAM 109 } > DRAM
98 110