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author | Linus Nielsen Feltzing <linus@haxx.se> | 2002-04-25 00:15:04 +0000 |
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committer | Linus Nielsen Feltzing <linus@haxx.se> | 2002-04-25 00:15:04 +0000 |
commit | 7b9581a13148957842ab53e2b28bf0a663a48980 (patch) | |
tree | 04db80bcc15ccb36c50d6e368c5846ec65bcd4f0 /firmware/test/kernel/timer.c | |
parent | 99406a6635f91f5fc716cd0ca28e8364f7a97061 (diff) | |
download | rockbox-7b9581a13148957842ab53e2b28bf0a663a48980.tar.gz rockbox-7b9581a13148957842ab53e2b28bf0a663a48980.zip |
Not yet working
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@220 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/test/kernel/timer.c')
-rw-r--r-- | firmware/test/kernel/timer.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/firmware/test/kernel/timer.c b/firmware/test/kernel/timer.c index be253db2b5..31c6f82baa 100644 --- a/firmware/test/kernel/timer.c +++ b/firmware/test/kernel/timer.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include "sh7034.h" | 19 | #include "sh7034.h" |
20 | #include "system.h" | 20 | #include "system.h" |
21 | #include "debug.h" | 21 | #include "debug.h" |
22 | #include "kernel.h" | ||
22 | 23 | ||
23 | void tick_start(unsigned int interval_in_ms) | 24 | void tick_start(unsigned int interval_in_ms) |
24 | { | 25 | { |
@@ -26,6 +27,7 @@ void tick_start(unsigned int interval_in_ms) | |||
26 | 27 | ||
27 | count = FREQ / 1000 / 8 * interval_in_ms; | 28 | count = FREQ / 1000 / 8 * interval_in_ms; |
28 | 29 | ||
30 | debugf("count = %d\n", count); | ||
29 | if(count > 0xffff) | 31 | if(count > 0xffff) |
30 | { | 32 | { |
31 | debugf("Error! The tick interval is too long (%d ms)\n", | 33 | debugf("Error! The tick interval is too long (%d ms)\n", |
@@ -40,24 +42,22 @@ void tick_start(unsigned int interval_in_ms) | |||
40 | TMDR &= ~0x01; /* Operate normally */ | 42 | TMDR &= ~0x01; /* Operate normally */ |
41 | 43 | ||
42 | TCNT0 = 0; /* Start counting at 0 */ | 44 | TCNT0 = 0; /* Start counting at 0 */ |
43 | GRA0 = 0xfff0; | 45 | GRA0 = count; |
44 | TCR0 = 0x23; /* Clear at GRA match, sysclock/8 */ | 46 | TCR0 = 0x23; /* Clear at GRA match, sysclock/8 */ |
45 | 47 | ||
46 | TSTR |= 0x01; /* Start timer 1 */ | ||
47 | |||
48 | /* Enable interrupt on level 1 */ | 48 | /* Enable interrupt on level 1 */ |
49 | IPRC = (IPRC & ~0x00f0) | 0x0010; | 49 | IPRC = (IPRC & ~0x00f0) | 0x0010; |
50 | |||
51 | TIER0 |= 0x01; /* Enable GRA match interrupt */ | ||
52 | 50 | ||
53 | while(1) | 51 | TSR0 &= ~0x01; |
54 | { | 52 | TIER0 |= 0x01; /* Enable GRA match interrupt */ |
55 | } | 53 | |
54 | TSTR |= 0x01; /* Start timer 1 */ | ||
56 | } | 55 | } |
57 | 56 | ||
58 | #pragma interrupt | 57 | #pragma interrupt |
59 | void IMIA0(void) | 58 | void IMIA0(void) |
60 | { | 59 | { |
60 | current_tick++; | ||
61 | |||
61 | TSR0 &= ~0x01; | 62 | TSR0 &= ~0x01; |
62 | debugf("Yes\n"); | ||
63 | } | 63 | } |