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authorJack Halpin <jack.halpin@gmail.com>2009-12-03 20:06:40 +0000
committerJack Halpin <jack.halpin@gmail.com>2009-12-03 20:06:40 +0000
commitd414b0a02712f2a591fda47e9f892763b77114b9 (patch)
tree7d45cbd4dcfee8e2ad75108c5aaa42e04df3d7ae /firmware/target
parent7f88cc44aa99ee7559f077392a5fc66f0f995326 (diff)
downloadrockbox-d414b0a02712f2a591fda47e9f892763b77114b9.tar.gz
rockbox-d414b0a02712f2a591fda47e9f892763b77114b9.zip
Sansa AMS: Reduce MCICLK speed on SD cards to 31 MHz.
This is within the SD Spec for v2 High Speed cards but still over the 25 MHz limit for v1 and non-HS v2 cards. Test_disk write & verify passes on both internal and uSD. The v1 cards still need to be lowered to 15 MHz but that causes data crc failures at this point. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23835 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r--firmware/target/arm/as3525/ata_sd_as3525.c21
1 files changed, 10 insertions, 11 deletions
diff --git a/firmware/target/arm/as3525/ata_sd_as3525.c b/firmware/target/arm/as3525/ata_sd_as3525.c
index 17f7583f44..e04e439964 100644
--- a/firmware/target/arm/as3525/ata_sd_as3525.c
+++ b/firmware/target/arm/as3525/ata_sd_as3525.c
@@ -312,8 +312,8 @@ static int sd_init_card(const int drive)
312 312
313 /* End of Card Identification Mode ************************************/ 313 /* End of Card Identification Mode ************************************/
314 314
315 /* Boost MCICLK to operating speed */ /* FIXME: 50 MHz is spec limit */ 315 /* Boost MCICLK to operating speed */ /*FIXME: v1 at 31 MHz still too high*/
316 MCI_CLOCK(drive) = (sd_v2 ? MCI_FULLSPEED : MCI_FULLSPEED); 316 MCI_CLOCK(drive) = (sd_v2 ? MCI_HALFSPEED : MCI_HALFSPEED);
317 317
318#ifdef HAVE_MULTIDRIVE /* The internal SDs are v1 */ 318#ifdef HAVE_MULTIDRIVE /* The internal SDs are v1 */
319 319
@@ -741,12 +741,19 @@ static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start,
741 (1<<3) /* DMA */ | 741 (1<<3) /* DMA */ |
742 (9<<4) /* 2^9 = 512 */ ; 742 (9<<4) /* 2^9 = 512 */ ;
743 743
744
745 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK); 744 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
746 745
747 /* Wait for FIFO to empty, card may still be in PRG state for writes */ 746 /* Wait for FIFO to empty, card may still be in PRG state for writes */
748 while(MCI_STATUS(drive) & MCI_TX_ACTIVE); 747 while(MCI_STATUS(drive) & MCI_TX_ACTIVE);
749 748
749 last_disk_activity = current_tick;
750
751 if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_NO_FLAGS, NULL))
752 {
753 ret = -4*20;
754 goto sd_transfer_error;
755 }
756
750 if(!transfer_error[drive]) 757 if(!transfer_error[drive])
751 { 758 {
752 if(!write) 759 if(!write)
@@ -759,14 +766,6 @@ static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start,
759 else if(loops++ > PL180_MAX_TRANSFER_ERRORS) 766 else if(loops++ > PL180_MAX_TRANSFER_ERRORS)
760 panicf("SD Xfer %s err:0x%x Disk%d", (write? "write": "read"), 767 panicf("SD Xfer %s err:0x%x Disk%d", (write? "write": "read"),
761 transfer_error[drive], drive); 768 transfer_error[drive], drive);
762
763 last_disk_activity = current_tick;
764
765 if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_NO_FLAGS, NULL))
766 {
767 ret = -4*20;
768 goto sd_transfer_error;
769 }
770 } 769 }
771 770
772 ret = 0; /* success */ 771 ret = 0; /* success */