re-enable CPU scaling (between 100 and 300MHz again) with a new implementation

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12047 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 8 insertions, 10 deletions

diff --git a/firmware/target/arm/gigabeat/meg-fx/system-meg-fx.c b/firmware/target/arm/gigabeat/meg-fx/system-meg-fx.c
index ca73b38eed..b7e59e66ea 100644
--- a/firmware/target/arm/gigabeat/meg-fx/system-meg-fx.c
+++ b/firmware/target/arm/gigabeat/meg-fx/system-meg-fx.c
@@ -75,22 +75,20 @@ void set_cpu_frequency(long frequency)
 {
     if (frequency == CPUFREQ_MAX)
     {
-        /* FCLK: 300MHz, HCLK: 100MHz, PCLK: 50MHz */
-        /* MDIV: 97, PDIV: 1, SDIV: 2 */
-        /* HDIV: 3, PDIV: 1 */
+        asm volatile("mov r0, #0\n"
+            "mrc p15, 0, r0, c1, c0, 0\n"
+            "orr r0, r0, #3<<30\n" /* set to Asynchronous mode*/
+            "mcr p15, 0, r0, c1, c0, 0" : : : "r0");
 
-        MPLLCON = (97 << 12) | (1 << 4) | 2;
-        CLKDIVN = (3 << 1) | 1;
         FREQ = CPUFREQ_MAX;
     }
     else
     {
-        /* FCLK: 200MHz, HCLK: 100MHz, PCLK: 50MHz */
-        /* MDIV: 62, PDIV: 1, SDIV: 2 */
-        /* HDIV: 1, PDIV: 1 */
+        asm volatile("mov r0, #0\n"
+            "mrc p15, 0, r0, c1, c0, 0\n"
+            "bic r0, r0, #3<<30\n" /* set to FastBus mode*/
+            "mcr p15, 0, r0, c1, c0, 0" : : : "r0");
 
-        MPLLCON = (62 << 12) | (1 << 4) | 2;
-        CLKDIVN = (1 << 1) | 1;
         FREQ = CPUFREQ_NORMAL;
     }
 }