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author | William Wilgus <me.theuser@yahoo.com> | 2017-10-30 22:48:50 +0100 |
---|---|---|
committer | William Wilgus <me.theuser@yahoo.com> | 2018-07-25 06:03:44 +0200 |
commit | c15af64452a03be1362ff2ee56915f5cca24a445 (patch) | |
tree | bf1b404ba27abce3786ea659340a1f68c320b77f /firmware/target | |
parent | 6a568761c88622321b29e338acdb5b52eff6ae3e (diff) | |
download | rockbox-c15af64452a03be1362ff2ee56915f5cca24a445.tar.gz rockbox-c15af64452a03be1362ff2ee56915f5cca24a445.zip |
AMS v1/v2: Fix I2C2_CSPR debug menu entry
I2c controller needs to be enabled in order to read CSPR0, CSPR1
registers function sets CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE
and only clears if it wasn't previously enabled
Use divider set in register to calculate frequency rather than
hard coded divider
Change-Id: I54ecc0c1859e906c00f4c2ae8ae2424a4619df98
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/arm/as3525/ascodec-as3525.c | 15 | ||||
-rw-r--r-- | firmware/target/arm/as3525/debug-as3525.c | 35 | ||||
-rw-r--r-- | firmware/target/arm/as3525/system-target.h | 2 |
3 files changed, 32 insertions, 20 deletions
diff --git a/firmware/target/arm/as3525/ascodec-as3525.c b/firmware/target/arm/as3525/ascodec-as3525.c index a8ad9706f8..14c3ee7a36 100644 --- a/firmware/target/arm/as3525/ascodec-as3525.c +++ b/firmware/target/arm/as3525/ascodec-as3525.c | |||
@@ -675,3 +675,18 @@ void ascodec_init(void) | |||
675 | IFRTC_IRQ_RTC | IRQ_ADC); | 675 | IFRTC_IRQ_RTC | IRQ_ADC); |
676 | #endif | 676 | #endif |
677 | } | 677 | } |
678 | |||
679 | void ams_i2c_get_debug_cpsr(unsigned int *i2c_cpsr) | ||
680 | { | ||
681 | int oldlevel = disable_interrupt_save(IRQ_FIQ_STATUS); | ||
682 | /* must be on to read regs */ | ||
683 | bool i2c_enabled = bitset32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE) & | ||
684 | CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE; | ||
685 | |||
686 | *i2c_cpsr = (I2C2_CPSR1<<8 | I2C2_CPSR0); | ||
687 | |||
688 | if (!i2c_enabled) /* put it back how we found it */ | ||
689 | bitclr32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE); | ||
690 | |||
691 | restore_irq(oldlevel); | ||
692 | } | ||
diff --git a/firmware/target/arm/as3525/debug-as3525.c b/firmware/target/arm/as3525/debug-as3525.c index 24cee12cf4..bb731242aa 100644 --- a/firmware/target/arm/as3525/debug-as3525.c +++ b/firmware/target/arm/as3525/debug-as3525.c | |||
@@ -57,8 +57,6 @@ | |||
57 | #define CLK_SD_MCLK_MSD 12 | 57 | #define CLK_SD_MCLK_MSD 12 |
58 | #define CLK_USB 13 | 58 | #define CLK_USB 13 |
59 | 59 | ||
60 | #define I2C2_CPSR0 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x1C)) | ||
61 | #define I2C2_CPSR1 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x20)) | ||
62 | #define MCI_NAND *((volatile unsigned long *)(NAND_FLASH_BASE + 0x04)) | 60 | #define MCI_NAND *((volatile unsigned long *)(NAND_FLASH_BASE + 0x04)) |
63 | #define MCI_SD *((volatile unsigned long *)(SD_MCI_BASE + 0x04)) | 61 | #define MCI_SD *((volatile unsigned long *)(SD_MCI_BASE + 0x04)) |
64 | 62 | ||
@@ -79,9 +77,8 @@ static int calc_freq(int clk) | |||
79 | { | 77 | { |
80 | unsigned int prediv = ((unsigned int)CGU_PROC>>2) & 0x3; | 78 | unsigned int prediv = ((unsigned int)CGU_PROC>>2) & 0x3; |
81 | unsigned int postdiv = ((unsigned int)CGU_PROC>>4) & 0xf; | 79 | unsigned int postdiv = ((unsigned int)CGU_PROC>>4) & 0xf; |
80 | unsigned int u_out_div; | ||
82 | #if CONFIG_CPU == AS3525 | 81 | #if CONFIG_CPU == AS3525 |
83 | int out_div; | ||
84 | |||
85 | switch(clk) { | 82 | switch(clk) { |
86 | /* clk_main = clk_int = 24MHz oscillator */ | 83 | /* clk_main = clk_int = 24MHz oscillator */ |
87 | case CLK_PLLA: | 84 | case CLK_PLLA: |
@@ -89,28 +86,27 @@ static int calc_freq(int clk) | |||
89 | return 0; | 86 | return 0; |
90 | 87 | ||
91 | /*assume 24MHz oscillator only input available */ | 88 | /*assume 24MHz oscillator only input available */ |
92 | out_div = ((CGU_PLLA>>13) & 0x3); /* bits 13:14 */ | 89 | u_out_div = ((CGU_PLLA>>13) & 0x3); /* bits 13:14 */ |
93 | if (out_div == 3) /* for 11 NO=4 */ | 90 | if (u_out_div == 3) /* for 11 NO=4 */ |
94 | out_div=4; | 91 | u_out_div=4; |
95 | if(out_div) /* NO = 0 not allowed */ | 92 | if(u_out_div) /* NO = 0 not allowed */ |
96 | return ((2 * (CGU_PLLA & 0xff))*CLK_MAIN)/ | 93 | return ((2 * (CGU_PLLA & 0xff))*CLK_MAIN)/ |
97 | (((CGU_PLLA>>8) & 0x1f)*out_div); | 94 | (((CGU_PLLA>>8) & 0x1f)*u_out_div); |
98 | return 0; | 95 | return 0; |
99 | case CLK_PLLB: | 96 | case CLK_PLLB: |
100 | if(CGU_PLLBSUP & (1<<3)) | 97 | if(CGU_PLLBSUP & (1<<3)) |
101 | return 0; | 98 | return 0; |
102 | 99 | ||
103 | /*assume 24MHz oscillator only input available */ | 100 | /*assume 24MHz oscillator only input available */ |
104 | out_div = ((CGU_PLLB>>13) & 0x3); /* bits 13:14 */ | 101 | u_out_div = ((CGU_PLLB>>13) & 0x3); /* bits 13:14 */ |
105 | if (out_div == 3) /* for 11 NO=4 */ | 102 | if (u_out_div == 3) /* for 11 NO=4 */ |
106 | out_div=4; | 103 | u_out_div=4; |
107 | if(out_div) /* NO = 0 not allowed */ | 104 | if(u_out_div) /* NO = 0 not allowed */ |
108 | return ((2 * (CGU_PLLB & 0xff))*CLK_MAIN)/ | 105 | return ((2 * (CGU_PLLB & 0xff))*CLK_MAIN)/ |
109 | (((CGU_PLLB>>8) & 0x1f)*out_div); | 106 | (((CGU_PLLB>>8) & 0x1f)*u_out_div); |
110 | return 0; | 107 | return 0; |
111 | #else | 108 | #else |
112 | int od, f, r; | 109 | int od, f, r; |
113 | |||
114 | /* AS3525v2 */ | 110 | /* AS3525v2 */ |
115 | switch(clk) { | 111 | switch(clk) { |
116 | case CLK_PLLA: | 112 | case CLK_PLLA: |
@@ -182,7 +178,8 @@ static int calc_freq(int clk) | |||
182 | return 0; | 178 | return 0; |
183 | } | 179 | } |
184 | case CLK_I2C: | 180 | case CLK_I2C: |
185 | return calc_freq(CLK_PCLK)/AS3525_I2C_PRESCALER; | 181 | ams_i2c_get_debug_cpsr(&u_out_div); |
182 | return calc_freq(CLK_PCLK)/(u_out_div); | ||
186 | case CLK_I2SI: | 183 | case CLK_I2SI: |
187 | switch((CGU_AUDIO>>12) & 3) { | 184 | switch((CGU_AUDIO>>12) & 3) { |
188 | case 0: | 185 | case 0: |
@@ -395,9 +392,9 @@ bool dbg_hw_info(void) | |||
395 | lcd_clear_display(); | 392 | lcd_clear_display(); |
396 | line = 0; | 393 | line = 0; |
397 | #endif /* LCD_HEIGHT < 176 */ | 394 | #endif /* LCD_HEIGHT < 176 */ |
398 | 395 | unsigned int i2c_cpsr; | |
399 | lcd_putsf(0, line++, "I2C2_CPSR :%8x", (unsigned int)(I2C2_CPSR1<<8 | | 396 | ams_i2c_get_debug_cpsr(&i2c_cpsr); |
400 | I2C2_CPSR0)); | 397 | lcd_putsf(0, line++, "I2C2_CPSR :%8x", i2c_cpsr); |
401 | #if CONFIG_CPU == AS3525 | 398 | #if CONFIG_CPU == AS3525 |
402 | lcd_putsf(0, line++, "MCI_NAND :%8x", (unsigned int)(MCI_NAND)); | 399 | lcd_putsf(0, line++, "MCI_NAND :%8x", (unsigned int)(MCI_NAND)); |
403 | lcd_putsf(0, line++, "MCI_SD :%8x", (unsigned int)(MCI_SD)); | 400 | lcd_putsf(0, line++, "MCI_SD :%8x", (unsigned int)(MCI_SD)); |
diff --git a/firmware/target/arm/as3525/system-target.h b/firmware/target/arm/as3525/system-target.h index aca30e52e1..5cdc573a1b 100644 --- a/firmware/target/arm/as3525/system-target.h +++ b/firmware/target/arm/as3525/system-target.h | |||
@@ -96,6 +96,6 @@ struct ams_sd_debug_info | |||
96 | }; | 96 | }; |
97 | 97 | ||
98 | void ams_sd_get_debug_info(struct ams_sd_debug_info *info); | 98 | void ams_sd_get_debug_info(struct ams_sd_debug_info *info); |
99 | 99 | void ams_i2c_get_debug_cpsr(unsigned int *i2c_cpsr); | |
100 | 100 | ||
101 | #endif /* SYSTEM_TARGET_H */ | 101 | #endif /* SYSTEM_TARGET_H */ |