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author | Michael Sevakis <jethead71@rockbox.org> | 2007-03-13 15:05:46 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2007-03-13 15:05:46 +0000 |
commit | abf41e34811adc426ac932d350abc3f1d151e449 (patch) | |
tree | 462b098eb879682e774a2a7b6fc0be91a4d37adf /firmware/target | |
parent | 93ff3c10812dfb352bff37730cebb7394fd8aea3 (diff) | |
download | rockbox-abf41e34811adc426ac932d350abc3f1d151e449.tar.gz rockbox-abf41e34811adc426ac932d350abc3f1d151e449.zip |
H100 Series: Fix FS#6810 - Distortion on Bass/Treble usage. Coldfire PCM needed a refinement in the init sequence for the UDA1380 after audio init changes. Apparently it doesn't like its registers altered before the Coldfire I2S is properly initialized.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12752 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/coldfire/pcm-coldfire.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/firmware/target/coldfire/pcm-coldfire.c b/firmware/target/coldfire/pcm-coldfire.c index 0662e289a0..b827887636 100644 --- a/firmware/target/coldfire/pcm-coldfire.c +++ b/firmware/target/coldfire/pcm-coldfire.c | |||
@@ -135,6 +135,10 @@ bool _pcm_apply_settings(bool clear_reset) | |||
135 | /* Reprogramming bits 15-12 requires FIFO to be in a reset | 135 | /* Reprogramming bits 15-12 requires FIFO to be in a reset |
136 | condition - Users Manual 17-8, Note 11 */ | 136 | condition - Users Manual 17-8, Note 11 */ |
137 | or_l(IIS_FIFO_RESET, &IIS_PLAY); | 137 | or_l(IIS_FIFO_RESET, &IIS_PLAY); |
138 | /* Important for TLV320 - this must happen in the correct order | ||
139 | or starting recording will sound absolutely awful once in | ||
140 | awhile - audiohw_set_frequency then coldfire_set_pllcr_audio_bits | ||
141 | */ | ||
138 | audiohw_set_frequency(freq_ent[FPARM_FSEL]); | 142 | audiohw_set_frequency(freq_ent[FPARM_FSEL]); |
139 | coldfire_set_pllcr_audio_bits(PLLCR_SET_AUDIO_BITS_DEFPARM); | 143 | coldfire_set_pllcr_audio_bits(PLLCR_SET_AUDIO_BITS_DEFPARM); |
140 | did_reset = true; | 144 | did_reset = true; |
@@ -252,14 +256,20 @@ void pcm_init(void) | |||
252 | /* Call pcm_close_recording to put in closed state */ | 256 | /* Call pcm_close_recording to put in closed state */ |
253 | pcm_close_recording(); | 257 | pcm_close_recording(); |
254 | 258 | ||
259 | /* Setup Coldfire I2S before initializing hardware or changing | ||
260 | other settings. */ | ||
261 | or_l(IIS_FIFO_RESET, &IIS_PLAY); | ||
262 | pcm_set_frequency(HW_FREQ_DEFAULT); | ||
263 | audio_set_output_source(AUDIO_SRC_PLAYBACK); | ||
264 | SET_IIS_PLAY(IIS_FIFO_RESET | IIS_PLAY_DEFPARM); | ||
265 | |||
255 | /* Initialize default register values. */ | 266 | /* Initialize default register values. */ |
256 | audiohw_init(); | 267 | audiohw_init(); |
257 | 268 | ||
258 | audio_set_output_source(AUDIO_SRC_PLAYBACK); | ||
259 | audio_set_source(AUDIO_SRC_PLAYBACK, SRCF_PLAYBACK); | 269 | audio_set_source(AUDIO_SRC_PLAYBACK, SRCF_PLAYBACK); |
260 | pcm_set_frequency(HW_FREQ_DEFAULT); | ||
261 | 270 | ||
262 | _pcm_apply_settings(false); | 271 | audiohw_set_frequency(freq_ent[FPARM_FSEL]); |
272 | coldfire_set_pllcr_audio_bits(PLLCR_SET_AUDIO_BITS_DEFPARM); | ||
263 | 273 | ||
264 | #if defined(HAVE_SPDIF_IN) || defined(HAVE_SPDIF_OUT) | 274 | #if defined(HAVE_SPDIF_IN) || defined(HAVE_SPDIF_OUT) |
265 | spdif_init(); | 275 | spdif_init(); |