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author | Rafaël Carré <rafael.carre@gmail.com> | 2010-06-18 19:56:29 +0000 |
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committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-06-18 19:56:29 +0000 |
commit | 3a0c6fb34b9957f6f6e78d62e151d5a155542f4c (patch) | |
tree | c048b0142fa30a997362ed5f20d6f00dd209ed00 /firmware/target | |
parent | 61c90fbf3ff14847d22cdc1162e5ba98a4928164 (diff) | |
download | rockbox-3a0c6fb34b9957f6f6e78d62e151d5a155542f4c.tar.gz rockbox-3a0c6fb34b9957f6f6e78d62e151d5a155542f4c.zip |
as3525v2: use 248MHz PLL (reverse engineered by bertrik)
- cpufreq is now the same than AMSv1
- audio playback frequency should be more accurate
- adjust pclk (24.8MHz on clipv2/clip+, 41.333..MHz on fuzev2) : it is
still lower than the AMSv1 which use 62MHz on every model
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26937 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/arm/as3525/clock-target.h | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h index 1689c59448..b8cb718592 100644 --- a/firmware/target/arm/as3525/clock-target.h +++ b/firmware/target/arm/as3525/clock-target.h | |||
@@ -70,8 +70,8 @@ | |||
70 | * - bit 12 = unknown (always set to 1) | 70 | * - bit 12 = unknown (always set to 1) |
71 | * Fpll = Fin * F / (R * OD), where Fin = 12 MHz | 71 | * Fpll = Fin * F / (R * OD), where Fin = 12 MHz |
72 | */ | 72 | */ |
73 | #define AS3525_PLLA_FREQ 240000000 | 73 | #define AS3525_PLLA_FREQ 248000000 |
74 | #define AS3525_PLLA_SETTING 0x113B | 74 | #define AS3525_PLLA_SETTING 0x113D |
75 | 75 | ||
76 | #define AS3525_PLLB_FREQ 192000000 | 76 | #define AS3525_PLLB_FREQ 192000000 |
77 | #define AS3525_PLLB_SETTING 0x155F | 77 | #define AS3525_PLLB_SETTING 0x155F |
@@ -87,11 +87,10 @@ | |||
87 | */ | 87 | */ |
88 | 88 | ||
89 | #ifdef SANSA_FUZEV2 | 89 | #ifdef SANSA_FUZEV2 |
90 | /* display is unbearably slow at 24MHz | 90 | /* display is unbearably slow at ~24MHz */ |
91 | * 34285715 HZ works ok but 40MHz works even better*/ | 91 | #define AS3525_DRAM_FREQ 41333334 /* Initial DRAM frequency */ |
92 | #define AS3525_DRAM_FREQ 40000000 /* Initial DRAM frequency */ | ||
93 | #else | 92 | #else |
94 | #define AS3525_DRAM_FREQ 24000000 /* Initial DRAM frequency */ | 93 | #define AS3525_DRAM_FREQ 24800000 /* Initial DRAM frequency */ |
95 | #endif /* SANSA_FUZEV2 */ | 94 | #endif /* SANSA_FUZEV2 */ |
96 | 95 | ||
97 | #else | 96 | #else |