diff options
author | Jens Arnold <amiconn@rockbox.org> | 2006-12-03 22:13:44 +0000 |
---|---|---|
committer | Jens Arnold <amiconn@rockbox.org> | 2006-12-03 22:13:44 +0000 |
commit | 31ffd7b1540c42e9cc051dc73a1f3acf77885e5d (patch) | |
tree | 4e854ed96739301d22b3ddb7c0213a57d633137f /firmware/target | |
parent | dc956ce993ad01d8304415d4524f4217198a3102 (diff) | |
download | rockbox-31ffd7b1540c42e9cc051dc73a1f3acf77885e5d.tar.gz rockbox-31ffd7b1540c42e9cc051dc73a1f3acf77885e5d.zip |
Completed target tree move of the ata driver code. Some code cleanup.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11655 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/arm/ata-target.h | 2 | ||||
-rw-r--r-- | firmware/target/arm/gigabeat/meg-fx/ata-target.h | 2 | ||||
-rwxr-xr-x | firmware/target/coldfire/ata-as-coldfire.S | 459 | ||||
-rwxr-xr-x | firmware/target/coldfire/ata-target.h | 6 | ||||
-rwxr-xr-x | firmware/target/sh/archos/ata-archos.c | 76 | ||||
-rwxr-xr-x | firmware/target/sh/archos/ata-as-archos.S | 231 | ||||
-rwxr-xr-x | firmware/target/sh/archos/ata-target.h | 80 |
7 files changed, 850 insertions, 6 deletions
diff --git a/firmware/target/arm/ata-target.h b/firmware/target/arm/ata-target.h index 0e4c187e27..0f25f89d6b 100644 --- a/firmware/target/arm/ata-target.h +++ b/firmware/target/arm/ata-target.h | |||
@@ -20,8 +20,6 @@ | |||
20 | #if (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) | 20 | #if (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) |
21 | 21 | ||
22 | /* Plain C read & write loops */ | 22 | /* Plain C read & write loops */ |
23 | #define PREFER_C_READING | ||
24 | #define PREFER_C_WRITING | ||
25 | 23 | ||
26 | #if (CONFIG_CPU == PP5002) | 24 | #if (CONFIG_CPU == PP5002) |
27 | #define ATA_IOBASE 0xc00031e0 | 25 | #define ATA_IOBASE 0xc00031e0 |
diff --git a/firmware/target/arm/gigabeat/meg-fx/ata-target.h b/firmware/target/arm/gigabeat/meg-fx/ata-target.h index 95b66ab1bd..1d49a1b874 100644 --- a/firmware/target/arm/gigabeat/meg-fx/ata-target.h +++ b/firmware/target/arm/gigabeat/meg-fx/ata-target.h | |||
@@ -20,8 +20,6 @@ | |||
20 | #define ATA_TARGET_H | 20 | #define ATA_TARGET_H |
21 | 21 | ||
22 | /* Plain C read & write loops */ | 22 | /* Plain C read & write loops */ |
23 | #define PREFER_C_READING | ||
24 | #define PREFER_C_WRITING | ||
25 | 23 | ||
26 | #define ATA_IOBASE 0x18000000 | 24 | #define ATA_IOBASE 0x18000000 |
27 | #define ATA_DATA (*((volatile unsigned short*)(ATA_IOBASE))) | 25 | #define ATA_DATA (*((volatile unsigned short*)(ATA_IOBASE))) |
diff --git a/firmware/target/coldfire/ata-as-coldfire.S b/firmware/target/coldfire/ata-as-coldfire.S new file mode 100755 index 0000000000..3b0d67f8e4 --- /dev/null +++ b/firmware/target/coldfire/ata-as-coldfire.S | |||
@@ -0,0 +1,459 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2006 by Jens Arnold | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | |||
20 | .section .icode,"ax",@progbits | ||
21 | |||
22 | .equ .ata_port, 0x20000020 | ||
23 | |||
24 | .align 2 | ||
25 | .global copy_read_sectors | ||
26 | .type copy_read_sectors,@function | ||
27 | |||
28 | /* Read a number of words from the ATA data port | ||
29 | * | ||
30 | * Utilises line bursts, assumes there is at least one full line to copy. | ||
31 | * | ||
32 | * Arguments: | ||
33 | * (4,%sp) - buffer address | ||
34 | * (8,%sp) - word count | ||
35 | * | ||
36 | * Register usage: | ||
37 | * %a0 - current address | ||
38 | * %a1 - end address | ||
39 | * %a2 - ata port | ||
40 | * %d0 - scratch | ||
41 | * %d1 - shift count | ||
42 | * %d2-%d6 - read buffers | ||
43 | */ | ||
44 | |||
45 | copy_read_sectors: | ||
46 | lea.l (-24, %sp), %sp | ||
47 | movem.l %d2-%d6/%a2, (%sp) | ||
48 | movem.l (28, %sp), %a0-%a1 | ||
49 | add.l %a1, %a1 | ||
50 | add.l %a0, %a1 | ||
51 | lea.l .ata_port, %a2 | ||
52 | |||
53 | move.l %a0, %d0 | ||
54 | btst.l #0, %d0 /* 16-bit aligned? */ | ||
55 | jeq .r_aligned /* yes, do word copy */ | ||
56 | |||
57 | /* not 16-bit aligned */ | ||
58 | subq.l #1, %a1 /* last byte is done unconditionally */ | ||
59 | moveq.l #24, %d1 /* preload shift count */ | ||
60 | |||
61 | move.w (%a2), %d2 /* load initial word */ | ||
62 | move.l %d2, %d3 | ||
63 | lsr.l #8, %d3 | ||
64 | move.b %d3, (%a0)+ /* write high byte of it, aligns dest addr */ | ||
65 | |||
66 | btst.l #1, %d0 /* longword aligned? */ | ||
67 | beq.b .r_end_u_w1 /* yes, skip leading word handling */ | ||
68 | |||
69 | swap %d2 /* move initial word up */ | ||
70 | move.w (%a2), %d2 /* combine with second word */ | ||
71 | move.l %d2, %d3 | ||
72 | lsr.l #8, %d3 | ||
73 | move.w %d3, (%a0)+ /* write bytes 2 and 3 as word */ | ||
74 | |||
75 | .r_end_u_w1: | ||
76 | moveq.l #12, %d0 | ||
77 | add.l %a0, %d0 | ||
78 | and.l #0xFFFFFFF0,%d0 /* d0 == first line bound */ | ||
79 | cmp.l %a0, %d0 /* any leading longwords? */ | ||
80 | bls.b .r_end_u_l1 /* no: skip loop */ | ||
81 | |||
82 | .r_loop_u_l1: | ||
83 | move.w (%a2), %d3 /* load first word */ | ||
84 | swap %d3 /* move to upper 16 bit */ | ||
85 | move.w (%a2), %d3 /* load second word */ | ||
86 | move.l %d3, %d4 | ||
87 | lsl.l %d1, %d2 | ||
88 | lsr.l #8, %d3 | ||
89 | or.l %d3, %d2 /* combine old low byte with new top 3 bytes */ | ||
90 | move.l %d2, (%a0)+ /* store as long */ | ||
91 | move.l %d4, %d2 | ||
92 | cmp.l %a0, %d0 /* run up to first line bound */ | ||
93 | bhi.b .r_loop_u_l1 | ||
94 | |||
95 | .r_end_u_l1: | ||
96 | lea.l (-14, %a1), %a1 /* adjust end addr. to 16 bytes/pass */ | ||
97 | |||
98 | .r_loop_u_line: | ||
99 | move.w (%a2), %d3 /* load 1st word */ | ||
100 | swap %d3 /* move to upper 16 bit */ | ||
101 | move.w (%a2), %d3 /* load 2nd word */ | ||
102 | move.l %d3, %d0 | ||
103 | lsl.l %d1, %d2 | ||
104 | lsr.l #8, %d0 | ||
105 | or.l %d0, %d2 /* combine old low byte with new top 3 bytes */ | ||
106 | move.w (%a2), %d4 /* load 3rd word */ | ||
107 | swap %d4 /* move to upper 16 bit */ | ||
108 | move.w (%a2), %d4 /* load 4th word */ | ||
109 | move.l %d4, %d0 | ||
110 | lsl.l %d1, %d3 | ||
111 | lsr.l #8, %d0 | ||
112 | or.l %d0, %d3 /* combine old low byte with new top 3 bytes */ | ||
113 | move.w (%a2), %d5 /* load 5th word */ | ||
114 | swap %d5 /* move to upper 16 bit */ | ||
115 | move.w (%a2), %d5 /* load 6th word */ | ||
116 | move.l %d5, %d0 | ||
117 | lsl.l %d1, %d4 | ||
118 | lsr.l #8, %d0 | ||
119 | or.l %d0, %d4 /* combine old low byte with new top 3 bytes */ | ||
120 | move.w (%a2), %d6 /* load 7th word */ | ||
121 | swap %d6 /* move to upper 16 bit */ | ||
122 | move.w (%a2), %d6 /* load 8th word */ | ||
123 | move.l %d6, %d0 | ||
124 | lsl.l %d1, %d5 | ||
125 | lsr.l #8, %d0 | ||
126 | or.l %d0, %d5 /* combine old low byte with new top 3 bytes */ | ||
127 | movem.l %d2-%d5, (%a0) /* store line */ | ||
128 | lea.l (16, %a0), %a0 | ||
129 | move.l %d6, %d2 | ||
130 | cmp.l %a0, %a1 /* run up to last line bound */ | ||
131 | bhi.b .r_loop_u_line | ||
132 | |||
133 | lea.l (12, %a1), %a1 /* readjust for longword loop */ | ||
134 | cmp.l %a0, %a1 /* any trailing longwords? */ | ||
135 | bls.b .r_end_u_l2 /* no: skip loop */ | ||
136 | |||
137 | .r_loop_u_l2: | ||
138 | move.w (%a2), %d3 /* load first word */ | ||
139 | swap %d3 /* move to upper 16 bit */ | ||
140 | move.w (%a2), %d3 /* load second word */ | ||
141 | move.l %d3, %d4 | ||
142 | lsl.l %d1, %d2 | ||
143 | lsr.l #8, %d3 | ||
144 | or.l %d3, %d2 /* combine old low byte with new top 3 bytes */ | ||
145 | move.l %d2, (%a0)+ /* store as long */ | ||
146 | move.l %d4, %d2 | ||
147 | cmp.l %a0, %a1 /* run up to last long bound */ | ||
148 | bhi.b .r_loop_u_l2 | ||
149 | |||
150 | .r_end_u_l2: | ||
151 | addq.l #2, %a1 /* back to final end address */ | ||
152 | cmp.l %a0, %a1 /* one word left? */ | ||
153 | bls.b .r_end_u_w2 | ||
154 | |||
155 | swap %d2 /* move old word to upper 16 bits */ | ||
156 | move.w (%a2), %d2 /* load final word */ | ||
157 | move.l %d2, %d3 | ||
158 | lsr.l #8, %d3 | ||
159 | move.w %d3, (%a0)+ /* write bytes 2 and 3 as word */ | ||
160 | |||
161 | .r_end_u_w2: | ||
162 | move.b %d2, (%a0)+ /* store final byte */ | ||
163 | bra.b .r_exit | ||
164 | |||
165 | /* 16-bit aligned */ | ||
166 | .r_aligned: | ||
167 | btst.l #1, %d0 /* longword aligned? */ | ||
168 | beq.b .r_end_a_w1 /* yes, skip leading word handling */ | ||
169 | |||
170 | move.w (%a2), (%a0)+ /* copy initial word */ | ||
171 | |||
172 | .r_end_a_w1: | ||
173 | moveq.l #12, %d0 | ||
174 | add.l %a0, %d0 | ||
175 | and.l #0xFFFFFFF0,%d0 /* d0 == first line bound */ | ||
176 | cmp.l %a0, %d0 /* any leading longwords? */ | ||
177 | bls.b .r_end_a_l1 /* no: skip loop */ | ||
178 | |||
179 | .r_loop_a_l1: | ||
180 | move.w (%a2), %d1 /* load first word */ | ||
181 | swap %d1 /* move it to upper 16 bits */ | ||
182 | move.w (%a2), %d1 /* load second word */ | ||
183 | move.l %d1, (%a0)+ /* store as long */ | ||
184 | cmp.l %a0, %d0 /* run up to first line bound */ | ||
185 | bhi.b .r_loop_a_l1 | ||
186 | |||
187 | .r_end_a_l1: | ||
188 | lea.l (-14, %a1), %a1 /* adjust end addr. to 16 bytes/pass */ | ||
189 | |||
190 | .r_loop_a_line: | ||
191 | move.w (%a2), %d0 /* load 1st word */ | ||
192 | swap %d0 /* move it to upper 16 bits */ | ||
193 | move.w (%a2), %d0 /* load 2nd word */ | ||
194 | move.w (%a2), %d1 /* load 3rd word */ | ||
195 | swap %d1 /* move it to upper 16 bits */ | ||
196 | move.w (%a2), %d1 /* load 4th word */ | ||
197 | move.w (%a2), %d2 /* load 5th word */ | ||
198 | swap %d2 /* move it to upper 16 bits */ | ||
199 | move.w (%a2), %d2 /* load 6th word */ | ||
200 | move.w (%a2), %d3 /* load 7th word */ | ||
201 | swap %d3 /* move it to upper 16 bits */ | ||
202 | move.w (%a2), %d3 /* load 8th word */ | ||
203 | movem.l %d0-%d3, (%a0) /* store line */ | ||
204 | lea.l (16, %a0), %a0 | ||
205 | cmp.l %a0, %a1 /* run up to last line bound */ | ||
206 | bhi.b .r_loop_a_line | ||
207 | |||
208 | lea.l (12, %a1), %a1 /* readjust for longword loop */ | ||
209 | cmp.l %a0, %a1 /* any trailing longwords? */ | ||
210 | bls.b .r_end_a_l2 /* no: skip loop */ | ||
211 | |||
212 | .r_loop_a_l2: | ||
213 | move.w (%a2), %d1 /* read first word */ | ||
214 | swap %d1 /* move it to upper 16 bits */ | ||
215 | move.w (%a2), %d1 /* read second word */ | ||
216 | move.l %d1, (%a0)+ /* store as long */ | ||
217 | cmp.l %a0, %a1 /* run up to last long bound */ | ||
218 | bhi.b .r_loop_a_l2 | ||
219 | |||
220 | .r_end_a_l2: | ||
221 | addq.l #2, %a1 /* back to final end address */ | ||
222 | cmp.l %a0, %a1 /* one word left? */ | ||
223 | bls.b .r_end_a_w2 | ||
224 | |||
225 | move.w (%a2), (%a0)+ /* copy final word */ | ||
226 | |||
227 | .r_end_a_w2: | ||
228 | |||
229 | .r_exit: | ||
230 | movem.l (%sp), %d2-%d6/%a2 | ||
231 | lea.l (24, %sp), %sp | ||
232 | rts | ||
233 | |||
234 | .r_end: | ||
235 | .size copy_read_sectors,.r_end-copy_read_sectors | ||
236 | |||
237 | .align 2 | ||
238 | .global copy_write_sectors | ||
239 | .type copy_write_sectors,@function | ||
240 | |||
241 | /* Write a number of words to the ATA data port | ||
242 | * | ||
243 | * Utilises line bursts, assumes there is at least one full line to copy. | ||
244 | * | ||
245 | * Arguments: | ||
246 | * (4,%sp) - buffer address | ||
247 | * (8,%sp) - word count | ||
248 | * | ||
249 | * Register usage: | ||
250 | * %a0 - current address | ||
251 | * %a1 - end address | ||
252 | * %a2 - ata port | ||
253 | * %d0 - scratch | ||
254 | * %d1 - shift count | ||
255 | * %d2-%d6 - read buffers | ||
256 | */ | ||
257 | |||
258 | copy_write_sectors: | ||
259 | lea.l (-24, %sp), %sp | ||
260 | movem.l %d2-%d6/%a2, (%sp) | ||
261 | movem.l (28, %sp), %a0-%a1 | ||
262 | add.l %a1, %a1 | ||
263 | add.l %a0, %a1 | ||
264 | lea.l .ata_port, %a2 | ||
265 | |||
266 | move.l %a0, %d0 | ||
267 | btst.l #0, %d0 /* 16-bit aligned? */ | ||
268 | jeq .w_aligned /* yes, do word copy */ | ||
269 | |||
270 | /* not 16-bit aligned */ | ||
271 | subq.l #1, %a1 /* last byte is done unconditionally */ | ||
272 | moveq.l #24, %d1 /* preload shift count */ | ||
273 | |||
274 | move.b (%a0)+, %d2 | ||
275 | |||
276 | btst.l #1, %d0 /* longword aligned? */ | ||
277 | beq.b .w_end_u_w1 /* yes, skip leading word handling */ | ||
278 | |||
279 | swap %d2 | ||
280 | move.w (%a0)+, %d2 | ||
281 | move.l %d2, %d3 | ||
282 | lsr.l #8, %d3 | ||
283 | move.w %d3, (%a2) | ||
284 | |||
285 | .w_end_u_w1: | ||
286 | moveq.l #12, %d0 | ||
287 | add.l %a0, %d0 | ||
288 | and.l #0xFFFFFFF0,%d0 /* d0 == first line bound */ | ||
289 | cmp.l %a0, %d0 /* any leading longwords? */ | ||
290 | bls.b .w_end_u_l1 /* no: skip loop */ | ||
291 | |||
292 | .w_loop_u_l1: | ||
293 | move.l (%a0)+, %d3 | ||
294 | move.l %d3, %d4 | ||
295 | lsl.l %d1, %d2 | ||
296 | lsr.l #8, %d3 | ||
297 | or.l %d3, %d2 | ||
298 | swap %d2 | ||
299 | move.w %d2, (%a2) | ||
300 | swap %d2 | ||
301 | move.w %d2, (%a2) | ||
302 | move.l %d4, %d2 | ||
303 | cmp.l %a0, %d0 /* run up to first line bound */ | ||
304 | bhi.b .w_loop_u_l1 | ||
305 | |||
306 | .w_end_u_l1: | ||
307 | lea.l (-14, %a1), %a1 /* adjust end addr. to 16 bytes/pass */ | ||
308 | |||
309 | .w_loop_u_line: | ||
310 | movem.l (%a0), %d3-%d6 | ||
311 | lea.l (16, %a0), %a0 | ||
312 | move.l %d3, %d0 | ||
313 | lsl.l %d1, %d2 | ||
314 | lsr.l #8, %d0 | ||
315 | or.l %d0, %d2 | ||
316 | swap %d2 | ||
317 | move.w %d2, (%a2) | ||
318 | swap %d2 | ||
319 | move.w %d2, (%a2) | ||
320 | move.l %d4, %d0 | ||
321 | lsl.l %d1, %d3 | ||
322 | lsr.l #8, %d0 | ||
323 | or.l %d0, %d3 | ||
324 | swap %d3 | ||
325 | move.w %d3, (%a2) | ||
326 | swap %d3 | ||
327 | move.w %d3, (%a2) | ||
328 | move.l %d5, %d0 | ||
329 | lsl.l %d1, %d4 | ||
330 | lsr.l #8, %d0 | ||
331 | or.l %d0, %d4 | ||
332 | swap %d4 | ||
333 | move.w %d4, (%a2) | ||
334 | swap %d4 | ||
335 | move.w %d4, (%a2) | ||
336 | move.l %d6, %d0 | ||
337 | lsl.l %d1, %d5 | ||
338 | lsr.l #8, %d0 | ||
339 | or.l %d0, %d5 | ||
340 | swap %d5 | ||
341 | move.w %d5, (%a2) | ||
342 | swap %d5 | ||
343 | move.w %d5, (%a2) | ||
344 | move.l %d6, %d2 | ||
345 | cmp.l %a0, %a1 /* run up to last line bound */ | ||
346 | bhi.b .w_loop_u_line | ||
347 | |||
348 | lea.l (12, %a1), %a1 /* readjust for longword loop */ | ||
349 | cmp.l %a0, %a1 /* any trailing longwords? */ | ||
350 | bls.b .w_end_u_l2 /* no: skip loop */ | ||
351 | |||
352 | .w_loop_u_l2: | ||
353 | move.l (%a0)+, %d3 | ||
354 | move.l %d3, %d4 | ||
355 | lsl.l %d1, %d2 | ||
356 | lsr.l #8, %d3 | ||
357 | or.l %d3, %d2 | ||
358 | swap %d2 | ||
359 | move.w %d2, (%a2) | ||
360 | swap %d2 | ||
361 | move.w %d2, (%a2) | ||
362 | move.l %d4, %d2 | ||
363 | cmp.l %a0, %a1 /* run up to first line bound */ | ||
364 | bhi.b .w_loop_u_l2 | ||
365 | |||
366 | .w_end_u_l2: | ||
367 | addq.l #2, %a1 /* back to final end address */ | ||
368 | cmp.l %a0, %a1 /* one word left? */ | ||
369 | bls.b .w_end_u_w2 | ||
370 | |||
371 | swap %d2 | ||
372 | move.w (%a0)+, %d2 | ||
373 | move.l %d2, %d3 | ||
374 | lsr.l #8, %d3 | ||
375 | move.w %d3, (%a2) | ||
376 | |||
377 | .w_end_u_w2: | ||
378 | lsl.l #8, %d2 | ||
379 | move.b (%a0)+, %d2 | ||
380 | move.w %d2, (%a2) | ||
381 | bra.b .w_exit | ||
382 | |||
383 | /* 16-bit aligned */ | ||
384 | .w_aligned: | ||
385 | btst.l #1, %d0 | ||
386 | beq.b .w_end_a_w1 | ||
387 | |||
388 | move.w (%a0)+, (%a2) /* copy initial word */ | ||
389 | |||
390 | .w_end_a_w1: | ||
391 | moveq.l #12, %d0 | ||
392 | add.l %a0, %d0 | ||
393 | and.l #0xFFFFFFF0,%d0 /* d0 == first line bound */ | ||
394 | cmp.l %a0, %d0 /* any leading longwords? */ | ||
395 | bls.b .w_end_a_l1 /* no: skip loop */ | ||
396 | |||
397 | .w_loop_a_l1: | ||
398 | move.l (%a0)+, %d1 | ||
399 | swap %d1 | ||
400 | move.w %d1, (%a2) | ||
401 | swap %d1 | ||
402 | move.w %d1, (%a2) | ||
403 | cmp.l %a0, %d0 /* run up to first line bound */ | ||
404 | bhi.b .w_loop_a_l1 | ||
405 | |||
406 | .w_end_a_l1: | ||
407 | lea.l (-14, %a1), %a1 /* adjust end addr. to 16 bytes/pass */ | ||
408 | |||
409 | .w_loop_a_line: | ||
410 | movem.l (%a0), %d0-%d3 | ||
411 | lea.l (16, %a0), %a0 | ||
412 | swap %d0 | ||
413 | move.w %d0, (%a2) | ||
414 | swap %d0 | ||
415 | move.w %d0, (%a2) | ||
416 | swap %d1 | ||
417 | move.w %d1, (%a2) | ||
418 | swap %d1 | ||
419 | move.w %d1, (%a2) | ||
420 | swap %d2 | ||
421 | move.w %d2, (%a2) | ||
422 | swap %d2 | ||
423 | move.w %d2, (%a2) | ||
424 | swap %d3 | ||
425 | move.w %d3, (%a2) | ||
426 | swap %d3 | ||
427 | move.w %d3, (%a2) | ||
428 | cmp.l %a0, %a1 /* run up to last line bound */ | ||
429 | bhi.b .w_loop_a_line | ||
430 | |||
431 | lea.l (12, %a1), %a1 /* readjust for longword loop */ | ||
432 | cmp.l %a0, %a1 /* any trailing longwords? */ | ||
433 | bls.b .w_end_a_l2 /* no: skip loop */ | ||
434 | |||
435 | .w_loop_a_l2: | ||
436 | move.l (%a0)+, %d1 | ||
437 | swap %d1 | ||
438 | move.w %d1, (%a2) | ||
439 | swap %d1 | ||
440 | move.w %d1, (%a2) | ||
441 | cmp.l %a0, %a1 /* run up to first line bound */ | ||
442 | bhi.b .w_loop_a_l2 | ||
443 | |||
444 | .w_end_a_l2: | ||
445 | addq.l #2, %a1 /* back to final end address */ | ||
446 | cmp.l %a0, %a1 /* one word left? */ | ||
447 | bls.b .w_end_a_w2 | ||
448 | |||
449 | move.w (%a0)+, (%a2) /* copy final word */ | ||
450 | |||
451 | .w_end_a_w2: | ||
452 | |||
453 | .w_exit: | ||
454 | movem.l (%sp), %d2-%d6/%a2 | ||
455 | lea.l (24, %sp), %sp | ||
456 | rts | ||
457 | |||
458 | .w_end: | ||
459 | .size copy_write_sectors,.w_end-copy_write_sectors | ||
diff --git a/firmware/target/coldfire/ata-target.h b/firmware/target/coldfire/ata-target.h index 4a28c3ae3f..e246dc7af1 100755 --- a/firmware/target/coldfire/ata-target.h +++ b/firmware/target/coldfire/ata-target.h | |||
@@ -20,8 +20,8 @@ | |||
20 | #define ATA_TARGET_H | 20 | #define ATA_TARGET_H |
21 | 21 | ||
22 | /* asm optimised read & write loops */ | 22 | /* asm optimised read & write loops */ |
23 | 23 | #define ATA_OPTIMIZED_READING | |
24 | #define NOINLINE_ATTR __attribute__((noinline)) /* don't inline the loops */ | 24 | #define ATA_OPTIMIZED_WRITING |
25 | 25 | ||
26 | #define ATA_IOBASE 0x20000000 | 26 | #define ATA_IOBASE 0x20000000 |
27 | #define ATA_DATA (*((volatile unsigned short*)(ATA_IOBASE + 0x20))) | 27 | #define ATA_DATA (*((volatile unsigned short*)(ATA_IOBASE + 0x20))) |
@@ -65,4 +65,6 @@ void ata_reset(void); | |||
65 | void ata_device_init(void); | 65 | void ata_device_init(void); |
66 | bool ata_is_coldstart(void); | 66 | bool ata_is_coldstart(void); |
67 | 67 | ||
68 | void copy_read_sectors(unsigned char* buf, int wordcount); | ||
69 | void copy_write_sectors(const unsigned char* buf, int wordcount); | ||
68 | #endif | 70 | #endif |
diff --git a/firmware/target/sh/archos/ata-archos.c b/firmware/target/sh/archos/ata-archos.c new file mode 100755 index 0000000000..73e56b8d84 --- /dev/null +++ b/firmware/target/sh/archos/ata-archos.c | |||
@@ -0,0 +1,76 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2006 by Jens Arnold | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | |||
20 | #include "config.h" | ||
21 | #include "cpu.h" | ||
22 | #include <stdbool.h> | ||
23 | #include "kernel.h" | ||
24 | #include "system.h" | ||
25 | #include "ata-target.h" | ||
26 | #include "hwcompat.h" | ||
27 | |||
28 | volatile unsigned char* ata_control; | ||
29 | int ata_io_address; /* 0x300 or 0x200 */ | ||
30 | |||
31 | void ata_reset(void) | ||
32 | { | ||
33 | /* state HRR0 */ | ||
34 | and_b(~0x02, &PADRH); /* assert _RESET */ | ||
35 | sleep(1); /* > 25us */ | ||
36 | |||
37 | /* state HRR1 */ | ||
38 | or_b(0x02, &PADRH); /* negate _RESET */ | ||
39 | sleep(1); /* > 2ms */ | ||
40 | } | ||
41 | |||
42 | void ata_address_detect(void) | ||
43 | { | ||
44 | if (read_hw_mask() & ATA_ADDRESS_200) | ||
45 | { | ||
46 | ata_io_address = 0x200; /* For debug purposes only */ | ||
47 | ata_control = ATA_CONTROL1; | ||
48 | } | ||
49 | else | ||
50 | { | ||
51 | ata_io_address = 0x300; /* For debug purposes only */ | ||
52 | ata_control = ATA_CONTROL2; | ||
53 | } | ||
54 | } | ||
55 | |||
56 | void ata_enable(bool on) | ||
57 | { | ||
58 | if(on) | ||
59 | and_b(~0x80, &PADRL); /* enable ATA */ | ||
60 | else | ||
61 | or_b(0x80, &PADRL); /* disable ATA */ | ||
62 | |||
63 | or_b(0x80, &PAIORL); | ||
64 | } | ||
65 | |||
66 | void ata_device_init(void) | ||
67 | { | ||
68 | or_b(0x02, &PAIORH); /* output for ATA reset */ | ||
69 | or_b(0x02, &PADRH); /* release ATA reset */ | ||
70 | PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */ | ||
71 | } | ||
72 | |||
73 | bool ata_is_coldstart(void) | ||
74 | { | ||
75 | return (PACR2 & 0x4000) != 0; | ||
76 | } | ||
diff --git a/firmware/target/sh/archos/ata-as-archos.S b/firmware/target/sh/archos/ata-as-archos.S new file mode 100755 index 0000000000..4a4e7e4b94 --- /dev/null +++ b/firmware/target/sh/archos/ata-as-archos.S | |||
@@ -0,0 +1,231 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2004-2006 by Jens Arnold | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | |||
20 | .section .icode,"ax",@progbits | ||
21 | |||
22 | .align 2 | ||
23 | .global _copy_read_sectors | ||
24 | .type _copy_read_sectors,@function | ||
25 | |||
26 | /* Read a number of words from the ATA data port | ||
27 | * | ||
28 | * Assumes wordcount to be a multiple of 4 | ||
29 | * | ||
30 | * Arguments: | ||
31 | * r4 - buffer address | ||
32 | * r5 - word count | ||
33 | * | ||
34 | * Register usage: | ||
35 | * r0 - scratch | ||
36 | * r1/r2 - read buffers | ||
37 | * r3 - mask (if unaligned) | ||
38 | * r4 - current address | ||
39 | * r5 - end address | ||
40 | * r6 - ata port | ||
41 | */ | ||
42 | |||
43 | _copy_read_sectors: | ||
44 | add r5, r5 /* words -> bytes */ | ||
45 | add r4, r5 /* bytes -> end address */ | ||
46 | add #-12, r5 /* adjust for offsets */ | ||
47 | mov.l .ata_data, r6 | ||
48 | |||
49 | mov r4, r0 | ||
50 | tst #1, r0 /* 16-bit aligned ? */ | ||
51 | bt .r_aligned /* yes, do word copy */ | ||
52 | |||
53 | /* not 16-bit aligned */ | ||
54 | mov #-1, r3 /* prepare a bit mask for high byte */ | ||
55 | shll8 r3 /* r3 = 0xFFFFFF00 */ | ||
56 | |||
57 | mov.w @r6, r2 /* read first word (1st round) */ | ||
58 | mov.b r2, @r4 /* store low byte of first word */ | ||
59 | bra .r_start_b /* jump into loop after next instr. */ | ||
60 | add #-5, r4 /* adjust for dest. offsets; now even */ | ||
61 | |||
62 | .align 2 | ||
63 | .r_loop_b: /* main loop: copy 4 words in a row */ | ||
64 | mov.w @r6, r2 /* read first word (2+ round) */ | ||
65 | and r3, r1 /* get high byte of fourth word (2+ round) */ | ||
66 | extu.b r2, r0 /* get low byte of first word (2+ round) */ | ||
67 | or r1, r0 /* combine with high byte of fourth word */ | ||
68 | mov.w r0, @(4, r4) /* store at buf[4] */ | ||
69 | nop /* maintain alignment */ | ||
70 | .r_start_b: | ||
71 | mov.w @r6, r1 /* read second word */ | ||
72 | and r3, r2 /* get high byte of first word */ | ||
73 | extu.b r1, r0 /* get low byte of second word */ | ||
74 | or r2, r0 /* combine with high byte of first word */ | ||
75 | mov.w r0, @(6, r4) /* store at buf[6] */ | ||
76 | add #8, r4 /* buf += 8 */ | ||
77 | mov.w @r6, r2 /* read third word */ | ||
78 | and r3, r1 /* get high byte of second word */ | ||
79 | extu.b r2, r0 /* get low byte of third word */ | ||
80 | or r1, r0 /* combine with high byte of second word */ | ||
81 | mov.w r0, @r4 /* store at buf[0] */ | ||
82 | cmp/hi r4, r5 /* check for end */ | ||
83 | mov.w @r6, r1 /* read fourth word */ | ||
84 | and r3, r2 /* get high byte of third word */ | ||
85 | extu.b r1, r0 /* get low byte of fourth word */ | ||
86 | or r2, r0 /* combine with high byte of third word */ | ||
87 | mov.w r0, @(2, r4) /* store at buf[2] */ | ||
88 | bt .r_loop_b | ||
89 | /* 24 instructions for 4 copies, takes 30 clock cycles (4 wait) */ | ||
90 | /* avg. 7.5 cycles per word */ | ||
91 | |||
92 | swap.b r1, r0 /* get high byte of last word */ | ||
93 | rts | ||
94 | mov.b r0, @(4, r4) /* and store it */ | ||
95 | |||
96 | /* 16-bit aligned, loop(read and store word) */ | ||
97 | .r_aligned: | ||
98 | mov.w @r6, r2 /* read first word (1st round) */ | ||
99 | bra .r_start_w /* jump into loop after next instr. */ | ||
100 | add #-6, r4 /* adjust for destination offsets */ | ||
101 | |||
102 | .align 2 | ||
103 | .r_loop_w: /* main loop: copy 4 words in a row */ | ||
104 | mov.w @r6, r2 /* read first word (2+ round) */ | ||
105 | swap.b r1, r0 /* swap fourth word (2+ round) */ | ||
106 | mov.w r0, @(4, r4) /* store fourth word (2+ round) */ | ||
107 | nop /* maintain alignment */ | ||
108 | .r_start_w: | ||
109 | mov.w @r6, r1 /* read second word */ | ||
110 | swap.b r2, r0 /* swap first word */ | ||
111 | mov.w r0, @(6, r4) /* store first word in buf[6] */ | ||
112 | add #8, r4 /* buf += 8 */ | ||
113 | mov.w @r6, r2 /* read third word */ | ||
114 | swap.b r1, r0 /* swap second word */ | ||
115 | mov.w r0, @r4 /* store second word in buf[0] */ | ||
116 | cmp/hi r4, r5 /* check for end */ | ||
117 | mov.w @r6, r1 /* read fourth word */ | ||
118 | swap.b r2, r0 /* swap third word */ | ||
119 | mov.w r0, @(2, r4) /* store third word */ | ||
120 | bt .r_loop_w | ||
121 | /* 16 instructions for 4 copies, takes 22 clock cycles (4 wait) */ | ||
122 | /* avg. 5.5 cycles per word */ | ||
123 | |||
124 | swap.b r1, r0 /* swap fourth word (last round) */ | ||
125 | rts | ||
126 | mov.w r0, @(4, r4) /* and store it */ | ||
127 | |||
128 | .r_end: | ||
129 | .size _copy_read_sectors,.r_end-_copy_read_sectors | ||
130 | |||
131 | .align 2 | ||
132 | .global _copy_write_sectors | ||
133 | .type _copy_write_sectors,@function | ||
134 | |||
135 | /* Write a number of words to the ATA data port | ||
136 | * | ||
137 | * Assumes wordcount to be a multiple of 2. | ||
138 | * Writing is not unrolled as much as reading, for several reasons: | ||
139 | * | ||
140 | * - a similar instruction sequence is faster for writing than for reading | ||
141 | * because the auto-incrementing load inctructions can be used | ||
142 | * - writing profits from warp mode | ||
143 | * | ||
144 | * Both of these add up to have writing faster than the more unrolled reading. | ||
145 | * | ||
146 | * Arguments: | ||
147 | * r4 - buffer address | ||
148 | * r5 - word count | ||
149 | * | ||
150 | * Register usage: | ||
151 | * r0/r1 - scratch | ||
152 | * r2/r3 - write buffers | ||
153 | * r4 - current address | ||
154 | * r5 - end address | ||
155 | * r6 - mask (if unaligned) | ||
156 | * r7 - ata port | ||
157 | */ | ||
158 | |||
159 | _copy_write_sectors: | ||
160 | add r5, r5 /* words -> bytes */ | ||
161 | add r4, r5 /* bytes -> end address */ | ||
162 | add #-4, r5 /* adjust for offsets */ | ||
163 | mov.l .ata_data, r7 | ||
164 | |||
165 | mov r4, r0 | ||
166 | tst #1, r0 /* 16-bit aligned ? */ | ||
167 | bt .w_aligned /* yes, do word copy */ | ||
168 | |||
169 | /* not 16-bit aligned */ | ||
170 | mov #-1, r6 /* prepare a bit mask for high byte */ | ||
171 | shll8 r6 /* r6 = 0xFFFFFF00 */ | ||
172 | |||
173 | mov.b @r4+, r2 /* load (initial old second) first byte */ | ||
174 | mov.w @r4+, r3 /* load (initial) first word */ | ||
175 | bra .w_start_b | ||
176 | extu.b r2, r0 /* extend unsigned */ | ||
177 | |||
178 | .align 2 | ||
179 | .w_loop_b: /* main loop: copy 2 words in a row */ | ||
180 | mov.w @r4+, r3 /* load first word (2+ round) */ | ||
181 | extu.b r2, r0 /* put away low byte of second word (2+ round) */ | ||
182 | and r6, r2 /* get high byte of second word (2+ round) */ | ||
183 | or r1, r2 /* combine with low byte of old first word */ | ||
184 | mov.w r2, @r7 /* write that */ | ||
185 | .w_start_b: | ||
186 | cmp/hi r4, r5 /* check for end */ | ||
187 | mov.w @r4+, r2 /* load second word */ | ||
188 | extu.b r3, r1 /* put away low byte of first word */ | ||
189 | and r6, r3 /* get high byte of first word */ | ||
190 | or r0, r3 /* combine with high byte of old second word */ | ||
191 | mov.w r3, @r7 /* write that */ | ||
192 | bt .w_loop_b | ||
193 | /* 12 instructions for 2 copies, takes 14 clock cycles */ | ||
194 | /* avg. 7 cycles per word */ | ||
195 | |||
196 | /* the loop "overreads" 1 byte past the buffer end, however, the last */ | ||
197 | /* byte is not written to disk */ | ||
198 | and r6, r2 /* get high byte of last word */ | ||
199 | or r1, r2 /* combine with low byte of old first word */ | ||
200 | rts | ||
201 | mov.w r2, @r7 /* write last word */ | ||
202 | |||
203 | /* 16-bit aligned, loop(load and write word) */ | ||
204 | .w_aligned: | ||
205 | bra .w_start_w /* jump into loop after next instr. */ | ||
206 | mov.w @r4+, r2 /* load first word (1st round) */ | ||
207 | |||
208 | .align 2 | ||
209 | .w_loop_w: /* main loop: copy 2 words in a row */ | ||
210 | mov.w @r4+, r2 /* load first word (2+ round) */ | ||
211 | swap.b r1, r0 /* swap second word (2+ round) */ | ||
212 | mov.w r0, @r7 /* write second word (2+ round) */ | ||
213 | .w_start_w: | ||
214 | cmp/hi r4, r5 /* check for end */ | ||
215 | mov.w @r4+, r1 /* load second word */ | ||
216 | swap.b r2, r0 /* swap first word */ | ||
217 | mov.w r0, @r7 /* write first word */ | ||
218 | bt .w_loop_w | ||
219 | /* 8 instructions for 2 copies, takes 10 clock cycles */ | ||
220 | /* avg. 5 cycles per word */ | ||
221 | |||
222 | swap.b r1, r0 /* swap second word (last round) */ | ||
223 | rts | ||
224 | mov.w r0, @r7 /* and write it */ | ||
225 | |||
226 | .w_end: | ||
227 | .size _copy_write_sectors,.w_end-_copy_write_sectors | ||
228 | |||
229 | .align 2 | ||
230 | .ata_data: | ||
231 | .long 0x06104100 /* ATA data port */ | ||
diff --git a/firmware/target/sh/archos/ata-target.h b/firmware/target/sh/archos/ata-target.h new file mode 100755 index 0000000000..ddffb34f5a --- /dev/null +++ b/firmware/target/sh/archos/ata-target.h | |||
@@ -0,0 +1,80 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2006 by Jens Arnold | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | #ifndef ATA_TARGET_H | ||
20 | #define ATA_TARGET_H | ||
21 | |||
22 | /* asm optimised read & write loops */ | ||
23 | #define ATA_OPTIMIZED_READING | ||
24 | #define ATA_OPTIMIZED_WRITING | ||
25 | #define ATA_ADDRESS_DETECT /* need address detection */ | ||
26 | |||
27 | #define SWAP_WORDS | ||
28 | |||
29 | #define ATA_IOBASE 0x06100100 | ||
30 | #define ATA_DATA (*((volatile unsigned short*)0x06104100)) | ||
31 | #define ATA_CONTROL1 ((volatile unsigned char*)0x06200206) | ||
32 | #define ATA_CONTROL2 ((volatile unsigned char*)0x06200306) | ||
33 | #define ATA_CONTROL (*ata_control) | ||
34 | |||
35 | #define ATA_ERROR (*((volatile unsigned char*)ATA_IOBASE + 1)) | ||
36 | #define ATA_NSECTOR (*((volatile unsigned char*)ATA_IOBASE + 2)) | ||
37 | #define ATA_SECTOR (*((volatile unsigned char*)ATA_IOBASE + 3)) | ||
38 | #define ATA_LCYL (*((volatile unsigned char*)ATA_IOBASE + 4)) | ||
39 | #define ATA_HCYL (*((volatile unsigned char*)ATA_IOBASE + 5)) | ||
40 | #define ATA_SELECT (*((volatile unsigned char*)ATA_IOBASE + 6)) | ||
41 | #define ATA_COMMAND (*((volatile unsigned char*)ATA_IOBASE + 7)) | ||
42 | |||
43 | #define STATUS_BSY 0x80 | ||
44 | #define STATUS_RDY 0x40 | ||
45 | #define STATUS_DF 0x20 | ||
46 | #define STATUS_DRQ 0x08 | ||
47 | #define STATUS_ERR 0x01 | ||
48 | |||
49 | #define ERROR_ABRT 0x04 | ||
50 | |||
51 | #define WRITE_PATTERN1 0xa5 | ||
52 | #define WRITE_PATTERN2 0x5a | ||
53 | #define WRITE_PATTERN3 0xaa | ||
54 | #define WRITE_PATTERN4 0x55 | ||
55 | |||
56 | #define READ_PATTERN1 0xa5 | ||
57 | #define READ_PATTERN2 0x5a | ||
58 | #define READ_PATTERN3 0xaa | ||
59 | #define READ_PATTERN4 0x55 | ||
60 | |||
61 | #define READ_PATTERN1_MASK 0xff | ||
62 | #define READ_PATTERN2_MASK 0xff | ||
63 | #define READ_PATTERN3_MASK 0xff | ||
64 | #define READ_PATTERN4_MASK 0xff | ||
65 | |||
66 | #define SET_REG(reg,val) reg = (val) | ||
67 | #define SET_16BITREG(reg,val) reg = (val) | ||
68 | |||
69 | extern volatile unsigned char* ata_control; | ||
70 | extern int ata_io_address; | ||
71 | |||
72 | void ata_reset(void); | ||
73 | void ata_address_detect(void); | ||
74 | void ata_enable(bool on); | ||
75 | void ata_device_init(void); | ||
76 | bool ata_is_coldstart(void); | ||
77 | |||
78 | void copy_read_sectors(unsigned char* buf, int wordcount); | ||
79 | void copy_write_sectors(const unsigned char* buf, int wordcount); | ||
80 | #endif | ||