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authorJack Halpin <jack.halpin@gmail.com>2010-03-23 17:00:59 +0000
committerJack Halpin <jack.halpin@gmail.com>2010-03-23 17:00:59 +0000
commit19fc7297bae8225bfaab51bd8b1f2f8c3aa67858 (patch)
tree29cd8b2c40bb0f8f442f68db959838776ef097a9 /firmware/target
parent2d174af4433aae8cf407c7c42e1f7b90e363c5b5 (diff)
downloadrockbox-19fc7297bae8225bfaab51bd8b1f2f8c3aa67858.tar.gz
rockbox-19fc7297bae8225bfaab51bd8b1f2f8c3aa67858.zip
SansaAMSv2: Give register CGU_BASE + 0x3C the name CGU_SDSLOT.
Move CLKDIV macros into clock-target.h. Only enable the necessary interfaces for the 3 clock registers used for SD. Add MEMSTICK and SDSLOT registers to bottom of register display in View HW info debug page. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25309 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r--firmware/target/arm/as3525/clock-target.h5
-rw-r--r--firmware/target/arm/as3525/debug-as3525.c3
-rw-r--r--firmware/target/arm/as3525/sd-as3525v2.c18
3 files changed, 17 insertions, 9 deletions
diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h
index dceefb7284..65fc681d24 100644
--- a/firmware/target/arm/as3525/clock-target.h
+++ b/firmware/target/arm/as3525/clock-target.h
@@ -156,7 +156,10 @@
156#define AS3525_IDE_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1)/*div=1/(n+1)*/ 156#define AS3525_IDE_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1)/*div=1/(n+1)*/
157 157
158#if CONFIG_CPU == AS3525v2 158#if CONFIG_CPU == AS3525v2
159#define AS3525_MS_FREQ 120000000 159#define AS3525_MS_FREQ 120000000
160#define AS3525_MS_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_MS_FREQ) -1)
161#define AS3525_SDSLOT_FREQ 24000000
162#define AS3525_SDSLOT_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_SDSLOT_FREQ) -1)
160#define AS3525_IDE_FREQ 80000000 163#define AS3525_IDE_FREQ 80000000
161#else 164#else
162#define AS3525_IDE_FREQ 50000000 /* The OF uses 66MHz maximal freq */ 165#define AS3525_IDE_FREQ 50000000 /* The OF uses 66MHz maximal freq */
diff --git a/firmware/target/arm/as3525/debug-as3525.c b/firmware/target/arm/as3525/debug-as3525.c
index a32eb3735a..8c9ff15859 100644
--- a/firmware/target/arm/as3525/debug-as3525.c
+++ b/firmware/target/arm/as3525/debug-as3525.c
@@ -380,6 +380,9 @@ bool __dbg_hw_info(void)
380#if CONFIG_CPU == AS3525 380#if CONFIG_CPU == AS3525
381 lcd_putsf(0, line++, "MCI_NAND :%8x", (unsigned int)(MCI_NAND)); 381 lcd_putsf(0, line++, "MCI_NAND :%8x", (unsigned int)(MCI_NAND));
382 lcd_putsf(0, line++, "MCI_SD :%8x", (unsigned int)(MCI_SD)); 382 lcd_putsf(0, line++, "MCI_SD :%8x", (unsigned int)(MCI_SD));
383#else
384 lcd_putsf(0, line++, "CGU_MEMSTK:%8x", (unsigned int)(CGU_MEMSTICK));
385 lcd_putsf(0, line++, "CGU_SDSLOT:%8x", (unsigned int)(CGU_SDSLOT));
383#endif 386#endif
384 387
385 lcd_update(); 388 lcd_update();
diff --git a/firmware/target/arm/as3525/sd-as3525v2.c b/firmware/target/arm/as3525/sd-as3525v2.c
index 945d6e5302..250dfca784 100644
--- a/firmware/target/arm/as3525/sd-as3525v2.c
+++ b/firmware/target/arm/as3525/sd-as3525v2.c
@@ -641,18 +641,20 @@ static void init_controller(void)
641int sd_init(void) 641int sd_init(void)
642{ 642{
643 int ret; 643 int ret;
644
644 CGU_PERI |= CGU_MCI_CLOCK_ENABLE; 645 CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
645 646
646 CGU_IDE = (1<<7) /* AHB interface enable */ | 647 CGU_IDE = (1<<7) /* AHB interface enable */
647 (1<<6) /* interface enable */ | 648 | (AS3525_IDE_DIV << 2)
648 ((CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1) << 2) | 649 | 1; /* clock source = PLLA */
649 1; /* clock source = PLLA */
650 650
651 CGU_MEMSTICK = (1<<8) | (1<<7) | 651 CGU_MEMSTICK = (1<<7) /* interface enable */
652 ((CLK_DIV(AS3525_PLLA_FREQ, AS3525_MS_FREQ) -1) << 2) | 1; 652 | (AS3525_MS_DIV << 2)
653 | 1; /* clock source = PLLA */
653 654
654 *(volatile int*)(CGU_BASE+0x3C) = (1<<7) | 655 CGU_SDSLOT = (1<<7) /* interface enable */
655 (CLK_DIV(AS3525_PLLA_FREQ, 24000000) -1)<<2 | 1; 656 | (AS3525_SDSLOT_DIV << 2)
657 | 1; /* clock source = PLLA */
656 658
657 wakeup_init(&transfer_completion_signal); 659 wakeup_init(&transfer_completion_signal);
658 660